# generated_app.mk## Machine generated for a CPU named "cpu" as defined in:# d:\GX_CIDE_SOPC\EP3C80\projects\cide_7f\software\syslib\..\..\nios2_7f.ptf## Generated: 2008-09-09 10:17:53.0# DO NOT MODIFY THIS FILE##   Changing this file will have subtle consequences#   which will almost certainly lead to a nonfunctioning#   system. If you do modify this file, be aware that your#   changes will be overwritten and lost when this file#   is generated again.## DO NOT MODIFY THIS FILE# assuming the Quartus project directory is the same as the PTF directoryQUARTUS_PROJECT_DIR = D:/GX_CIDE_SOPC/EP3C80/projects/cide_7f# the simulation directory is a subdirectory of the PTF directorySIMDIR = $(QUARTUS_PROJECT_DIR)/nios2_7f_simDBL_QUOTE := "# macros defined by/for epcs_controller & flashEPCS_CONTROLLER_BOOT_ROM_FLASHTARGET_ALT_SIM_PREFIX = $(EPCS_CONTROLLER_BOOT_ROM_FLASHTARGET_TMP1:0=)EPCS_CONTROLLER_BOOT_ROM_FLASHTARGET_TMP1 = $(ALT_SIM_OPTIMIZE:1=RUN_ON_HDL_SIMULATOR_ONLY_)BOOTS_FROM_EPCS = 0BOOT_COPIER_EPCS = boot_loader_epcs.srecCPU_CLASS = altera_nios2CPU_RESET_ADDRESS = 0x1200000FLASH_FLASHTARGET_ALT_SIM_PREFIX = $(FLASH_FLASHTARGET_TMP1:0=)FLASH_FLASHTARGET_TMP1 = $(ALT_SIM_OPTIMIZE:1=RUN_ON_HDL_SIMULATOR_ONLY_)BOOT_COPIER = boot_loader_cfi.srecall: delete_placeholder_warning sim flashfiles hexdelete_placeholder_warning: do_delete_placeholder_warning.PHONY: delete_placeholder_warningsim: $(SIMDIR)/dummy_file.PHONY: simverifysysid: dummy_verifysysid_file.PHONY: verifysysidflashfiles: $(EPCS_CONTROLLER_BOOT_ROM_FLASHTARGET_ALT_SIM_PREFIX)epcs_controller_boot_rom.flash $(FLASH_FLASHTARGET_ALT_SIM_PREFIX)flash.flash.PHONY: flashfileshex: $(QUARTUS_PROJECT_DIR)/message_buffer_ram.hex.PHONY: hexdo_delete_placeholder_warning:	rm -f $(SIMDIR)/contents_file_warning.txt.PHONY: do_delete_placeholder_warning$(SIMDIR)/dummy_file: $(ELF)	if [ ! -d $(SIMDIR) ]; then mkdir $(SIMDIR) ; fi	@echo Hardware simulation is not enabled for the target SOPC Builder system. Skipping creation of hardware simulation model contents and simulation symbol files. \(Note: This does not affect the instruction set simulator.\)	touch $(SIMDIR)/dummy_filedummy_verifysysid_file:	nios2-download $(JTAG_CABLE)                                --sidp=0x01502890 --id=291233203 --timestamp=1220925038.PHONY: dummy_verifysysid_file$(EPCS_CONTROLLER_BOOT_ROM_FLASHTARGET_ALT_SIM_PREFIX)epcs_controller_boot_rom.flash: $(ELF)	@if [ $(BOOTS_FROM_EPCS) -eq 1 ]; then echo Post-processing to create $(notdir $@) ; elf2flash --input=$(ELF) --flash= --boot=$(DBL_QUOTE)$(shell $(DBL_QUOTE)$(QUARTUS_ROOTDIR)/sopc_builder/bin/find_sopc_component_dir$(DBL_QUOTE) $(CPU_CLASS) $(QUARTUS_PROJECT_DIR))/$(BOOT_COPIER_EPCS)$(DBL_QUOTE) --outfile=$(EPCS_CONTROLLER_BOOT_ROM_FLASHTARGET_ALT_SIM_PREFIX)epcs_controller_boot_rom.flash --sim_optimize=$(ALT_SIM_OPTIMIZE) --epcs --base=0x0 --end=0x7FFFFFFF  ; fi$(FLASH_FLASHTARGET_ALT_SIM_PREFIX)flash.flash: $(ELF)	@echo Post-processing to create $(notdir $@)	elf2flash --input=$(ELF) --flash= --boot=$(DBL_QUOTE)$(shell $(DBL_QUOTE)$(QUARTUS_ROOTDIR)/sopc_builder/bin/find_sopc_component_dir$(DBL_QUOTE) $(CPU_CLASS) $(QUARTUS_PROJECT_DIR))/$(BOOT_COPIER)$(DBL_QUOTE) --outfile=$(FLASH_FLASHTARGET_ALT_SIM_PREFIX)flash.flash --sim_optimize=$(ALT_SIM_OPTIMIZE) --base=0x1200000 --end=0x13FFFFF --reset=$(CPU_RESET_ADDRESS)$(QUARTUS_PROJECT_DIR)/message_buffer_ram.hex: $(ELF)	@echo Post-processing to create $(notdir $@)	elf2hex $(ELF) 0x01502000 0x15027FF --width=16 $(QUARTUS_PROJECT_DIR)/message_buffer_ram.hex --create-lanes=0generated_app_clean:	$(RM) $(SIMDIR)/dummy_file	$(RM) $(EPCS_CONTROLLER_BOOT_ROM_FLASHTARGET_ALT_SIM_PREFIX)epcs_controller_boot_rom.flash	$(RM) $(FLASH_FLASHTARGET_ALT_SIM_PREFIX)flash.flash	$(RM) $(QUARTUS_PROJECT_DIR)/message_buffer_ram.hex.PHONY: generated_app_clean