;@Id: boot.tpl#238 @
;=============================================================================
;  FILENAME:   boot.asm
;  VERSION:    4.07
;  DATE:       9 March 2005
;
;  DESCRIPTION:
;  M8C Boot Code for CY7C63900 microcontroller family.
;  This file also contains the Interrupt Service Routines for enCoRe II GPIO
;  interrupts: INT0, INT1, INT2, as well as the GPIO Port interrupts for
;  port 0, port 1, port 2, port 3 and port 4.
;
;  Copyright (C) Cypress Semiconductor 2004, 2005. All rights reserved.
;
; NOTES:
; PSoC Designer's Device Editor uses a template file, BOOT.TPL, located in
; the project's root directory to create BOOT.ASM. Any changes made to 
; BOOT.ASM will be  overwritten every time the project is generated; therfore
; changes should be made to BOOT.TPL not BOOT.ASM. Care must be taken when
; modifying BOOT.TPL so that replacement strings (such as @PROJECT_NAME)
; are not accidentally modified.
;
;=============================================================================

include ".\lib\GlobalParams.inc"
include "m8c.inc"
include "m8ssc.inc"

;-----------------------------------------------------------------------------
; Optimization flags
;-----------------------------------------------------------------------------
C_LANGUAGE_SUPPORT: equ 1   ;Set to 0 to optimize for ASM only

;-----------------------------------------------------------------------------
; Export Declarations
;-----------------------------------------------------------------------------

export __Start
export __Exit
export __bss_start

export __lit_start
export __idata_start
export __data_start
export __func_lit_start
export __text_start
export __usermodules_start
export __psoc_config_start

;-----------------------------------------------------------------------------
; Interrupt Vector Table
;-----------------------------------------------------------------------------
;
; Interrupt vector table entries are 4 bytes long and contain the code that
; services the interrupt (or causes it to be serviced).
;
;-----------------------------------------------------------------------------

    AREA    TOP(ROM,ABS,CON)

    org 0                   ;Reset Interrupt Vector
    ljmp __Start            ;First instruction executed following a Reset

    org 04h                 ;Supply Monitor Interrupt Vector
    halt                    ;Stop execution if power falls too low

    org 08h                 ;INT0 Interrupt Vector
    ljmp    INT0_ISR
    reti

    org 0Ch                 ;SPI TX Empty Interrupt Vector
    `@INTERRUPT_3`
    reti

    org 10h                 ;SPI RX Full Interrupt Vector
    `@INTERRUPT_4`
    reti

    org 14h                 ;GPIO Port 0 Interrupt Vector
    ljmp    PORT0_ISR
    reti
    
    org 18h                 ;GPIO Port 1 Interrupt Vector
    ljmp    PORT1_ISR
    reti
    
    org 1Ch                 ;INT1 Interrupt Vector
    ljmp    INT1_ISR
    reti
    
    org 20h                 ;USB Endpoint 0 Interrupt Vector
    `@INTERRUPT_8`
    reti

    org 24h                 ;USB Endpoint 1 Interrupt Vector
    `@INTERRUPT_9`
    reti

    org 28h                 ;USB Endpoint 2 Interrupt Vector
    `@INTERRUPT_10`
    reti

    org 2Ch                 ;USB Bus Reset Interrupt Vector
    `@INTERRUPT_11`
    reti

    org 30h                 ;USB Bus Activity Interrupt Vector
    `@INTERRUPT_12`
    reti

    org 34h                 ;One Millisecond Interval Timer Interrupt Vector
    `@INTERRUPT_13`
    reti

    org 38h                 ;Programmable Interval Timer Interrupt Vector
    `@INTERRUPT_14`
    reti

    org 3Ch                 ;Timer Capture 0 Interrupt Vector
    `@INTERRUPT_15`
    reti
	
    org 40h                 ;Timer Capture 1 Interrupt Vector
    `@INTERRUPT_16`
    reti

    org 44h                 ;Free Running Counter Wrap Interrupt Vector
    `@INTERRUPT_17`
    reti

    org 48h                 ;INT 2 Interrupt Vector
    ljmp    INT2_ISR
    reti

    org 4Ch                 ;PS2 Data Low
    `@INTERRUPT_19`
    reti

    org 50h                 ;GPIO Port 2 Interrupt Vector
    ljmp    PORT2_ISR
    reti

    org 54h                 ;GPIO Port 3 Interrupt Vector
    ljmp    PORT3_ISR
    reti

    org 58h                 ;GPIO Port 4 Interrupt Vector
    ljmp    PORT4_ISR
    reti

    org 5Ch                 ;Reserved
    `@INTERRUPT_23`
    reti

    org 60h                 ;Reserved
    `@INTERRUPT_24`
    reti

    org 64h                 ;Sleep Timer Interrupt Vector
    `@INTERRUPT_25`
    reti

;-----------------------------------------------------------------------------
;  Start of Execution
;  CPU is operating at 3 MHz
;  IO Bank is Bank0
;-----------------------------------------------------------------------------
    org 68h
__Start:

IF ( WATCHDOG_ENABLE )             ; WDT selected in Global Params
    M8C_EnableWatchDog
ENDIF
    ;------------------
    ; Set up the clocks
    ;------------------
    ; Configure the external oscillator, EFTB Filter, and clock out
    ;  It is configured with an 'OR' in case a USB Bus Reset occurred and
    ;  the external oscillator has already been started.  This way
    ;  it does not get unselected.
IF XOSC_ENABLE
    MOV  REG[XOSCTR], XOSC_XGM_JUST        ; Set the external OSC XGM
    OR   REG[CLKIOCR], (XOSC_ENABLE_JUST | EFTB_JUST | CLOCK_OUT_JUST)
    ; If the external oscillator has been selected, wait for it to stabilize
    ;   then select it 
    M8C_SetBank1
    AND  REG[OSC_CR0], ~OSC_CR0_SLEEP
    OR   REG[OSC_CR0],  OSC_CR0_SLEEP_512Hz ; Wait ~2 mSec
    M8C_SetBank0
    M8C_ClearWDTAndSleep                   ; Restart the sleep timer
    MOV  REG[INT_VC], 0                    ; Clear all pending interrupts
.WaitForStableXOSC:
    TST  REG[INT_CLR0], INT_MSK0_SLEEP     ; Test the SleepTimer Interrupt Status
    JZ   .WaitForStableXOSC                ; Wait until ~2 mSec has elapsed

    OR   REG[CLKIOCR], CLKIOCR_XOSC_SELECT ; Now, select the external oscillator
ELSE
    OR   REG[CLKIOCR], (EFTB_JUST | CLOCK_OUT_JUST)
ENDIF

    mov  [bSSC_KEY1],0             ; Lockout Flash and Supervisiory operations
    mov  [bSSC_KEYSP],0      

    ;------------------
    ; Set up the stack
    ;------------------
    mov   A, __ramareas_end        ; Set top of stack to end of used RAM
    swap  SP, A                    ; This is only temporary if going to LMM

    ;-------------------------------------------------------------------------
    ; All the user selections and UserModule selections are now loaded,
    ; except CPU frequency (CPU is runing at 12 MHz).  Load the PSoC 
    ; configuration with a 12 MHz CPU clock to keep config time short.
    ;-------------------------------------------------------------------------
    lcall LoadConfigInit           ; Configure PSoC blocks per Dev Editor


IF (C_LANGUAGE_SUPPORT)
    call InitCRunTime              ; Initialize for C language
ENDIF ;(C_LANGUAGE_SUPPORT)

    ;-------------------------------------------------------------------------
    ; Global Interrupt are NOT enabled, this should be done in main().
    ; LVD is set but will not occur unless Global Interrupts are enabled. 
    ; Global Interrupts should be as soon as possible in main().
    ;-------------------------------------------------------------------------
    mov  reg[INT_VC],0              ; Clear any pending interrupts which may
                                    ; have been set during the boot process. 
    lcall _main                     ; Call main

__Exit:
    jmp  __Exit                     ; Wait here till power is turned off



;-----------------------------------------------------------------------------
; C Runtime Environment Initialization
; The following code is conditionally assembled.
;-----------------------------------------------------------------------------