ldil    L%irq_stat,%r19	ldo     R%irq_stat(%r19),%r19	LDIL_FIXUP(%r19)#ifdef CONFIG_SMP	copy    %r30,%r1	/* FIXME! depi below has hardcoded dependency on kernel stack size */	depi    0,31,14,%r1 /* get task pointer */	ldw     TASK_PROCESSOR(%r1),%r20 /* get cpu # - int */#if (IRQSTAT_SZ == 32)	dep     %r20,26,27,%r20 /* shift left 5 bits */#else#error IRQSTAT_SZ changed, fix dep#endif /* IRQSTAT_SZ */	add     %r19,%r20,%r19#endif /* CONFIG_SMP */	ldw     IRQSTAT_SI_ACTIVE(%r19),%r20	/* hardirq.h: unsigned int */	ldw     IRQSTAT_SI_MASK(%r19),%r19	/* hardirq.h: unsigned int */	and     %r19,%r20,%r20	comib,<>,n 0,%r20,intr_do_softirq /* forward */intr_check_resched:	/* check for reschedule */	copy    %r30,%r1	/* FIXME! depi below has hardcoded dependency on kernel stack size */	depi    0,31,14,%r1 /* get task pointer */	LDREG     TASK_NEED_RESCHED(%r1),%r19	/* sched.h: long need_resched */	comib,<>,n 0,%r19,intr_do_resched /* forward */intr_check_sig:	/* As above */	copy    %r30,%r1	depi    0,31,14,%r1 /* get task pointer */	ldw	TASK_SIGPENDING(%r1),%r19	/* sched.h: int sigpending */	comib,<>,n 0,%r19,intr_do_signal /* forward */intr_restore:	copy	    	%r16, %r29	ldo		PT_FR31(%r29), %r29	rest_fp		%r29	copy    	%r16, %r29	rest_general 	%r29	ssm		0,%r0	nop	nop	nop	nop	nop	nop	nop	tophys		%r29	mtsm		%r0	rest_specials	%r29	rest_stack	%r29	rfi	nop	nop	nop	nop	nop	nop	nop	nop	.import do_softirq,codeintr_do_softirq:	bl      do_softirq,%r2	nop	b       intr_check_resched	nop	.import schedule,codeintr_do_resched:	/* Only do reschedule if we are returning to user space */	LDREG     PT_SR7(%r16), %r20	comib,= 0,%r20,intr_restore /* backward */	nop	bl      schedule,%r2	ssm     PSW_SM_I, %r0	/* It's OK to leave I bit on */	b       intr_return /* start over if we got a resched */	nop	.import do_signal,codeintr_do_signal:	/* Only do signals if we are returning to user space */	LDREG   PT_SR7(%r16), %r20	comib,= 0,%r20,intr_restore /* backward */	nop	copy	%r0, %r24			/* unsigned long in_syscall */	copy	%r16, %r25			/* struct pt_regs *regs */	ssm     PSW_SM_I, %r0	bl	do_signal,%r2	copy	%r0, %r26			/* sigset_t *oldset = NULL */	b	intr_restore	nop	/* CR28 - saved GR1	 * CR29 - argument for do_irq_mask */	/* External interrupts */intr_extint:	get_stack	save_specials	%r29	virt_map	rfi	save_general	%r29	ldo		PT_FR0(%r29), %r24	save_fp		%r24		loadgp	copy		%r29, %r24	/* arg2 is pt_regs */	copy		%r29, %r16	/* save pt_regs */#ifdef CONFIG_KWDB	copy		%r29, %r3	/* KWDB - update frame pointer (gr3) */#endif	/* sorry to put this cruft in the interrupt path */	ldil		L%cpu_irq_region, %r25	ldo		R%cpu_irq_region(%r25), %r25	bl		do_irq_mask,%r2#ifdef __LP64__	LDIL_FIXUP(%r25)#else	nop#endif	b		intr_return	nop	/* Generic interruptions (illegal insn, unaligned, page fault, etc) */	.export         intr_save, code /* for os_hpmc */intr_save:	get_stack	save_specials	%r29	mfctl		%cr20, %r1	STREG		%r1, PT_ISR(%r29)	mfctl		%cr21, %r1	STREG		%r1, PT_IOR(%r29)	virt_map	rfi	save_general	%r29	ldo		PT_FR0(%r29), %r25	save_fp		%r25		loadgp	copy		%r29, %r25	/* arg1 is pt_regs */#ifdef CONFIG_KWDB	copy		%r29, %r3	/* KWDB - update frame pointer (gr3) */#endif	bl		handle_interruption,%r2	copy		%r29, %r16	/* save pt_regs */	b		intr_return	nop	/*	 * Note for all tlb miss handlers:	 *	 * cr24 contains a pointer to the kernel address space	 * page directory.	 *	 * cr25 contains a pointer to the current user address	 * space page directory.	 *	 * sr3 will contain the space id of the user address space	 * of the current running thread while that thread is	 * running in the kernel.	 */	/*	 * register number allocations.  Note that these are all	 * in the shadowed registers	 */	t0 = r1		/* temporary register 0 */	va = r8		/* virtual address for which the trap occured */	t1 = r9		/* temporary register 1 */	pte  = r16	/* pte/phys page # */	prot = r17	/* prot bits */	spc  = r24	/* space for which the trap occured */	ptp = r25	/* page directory/page table pointer */#ifdef __LP64__dtlb_miss_20w:	extrd,u         spc,31,7,t1     /* adjust va */	depd            t1,31,7,va      /* adjust va */	depdi           0,31,7,spc      /* adjust space */	mfctl           %cr25,ptp	/* Assume user space miss */	or,*<>          %r0,spc,%r0     /* If it is user space, nullify */	mfctl           %cr24,ptp	/* Load kernel pgd instead */	extrd,u         va,33,9,t1      /* Get pgd index */	mfsp            %sr7,t0		/* Get current space */	or,*=           %r0,t0,%r0      /* If kernel, nullify following test */	comb,<>,n       t0,spc,dtlb_fault /* forward */	/* First level page table lookup */	ldd,s           t1(ptp),ptp	extrd,u         va,42,9,t0     /* get second-level index */	bb,>=,n 	ptp,_PAGE_PRESENT_BIT,dtlb_fault	depdi           0,63,12,ptp     /* clear prot bits */	/* Second level page table lookup */	ldd,s           t0(ptp),ptp	extrd,u         va,51,9,t0     /* get third-level index */	bb,>=,n 	ptp,_PAGE_PRESENT_BIT,dtlb_fault	depdi           0,63,12,ptp     /* clear prot bits */	/* Third level page table lookup */	shladd           t0,3,ptp,ptp	ldi		_PAGE_ACCESSED,t1	ldd              0(ptp),pte	bb,>=,n          pte,_PAGE_PRESENT_BIT,dtlb_fault	/* Check whether the "accessed" bit was set, otherwise do so */	or		t1,pte,t0	/* t0 has R bit set */	and,*<>         t1,pte,%r0      /* test and nullify if already set */	std             t0,0(ptp)       /* write back pte */	copy            spc,prot	/* init prot with faulting space */		depd		pte,8,7,prot	extrd,u,*=	pte,_PAGE_NO_CACHE_BIT+32,1,r0	depdi		1,12,1,prot	extrd,u,*=      pte,_PAGE_USER_BIT+32,1,r0	depdi		7,11,3,prot   /* Set for user space (1 rsvd for read) */	extrd,u,*= 	pte,_PAGE_GATEWAY_BIT+32,1,r0	depdi		0,11,2,prot	/* If Gateway, Set PL2 to 0 */	/* Get rid of prot bits and convert to page addr for idtlbt */	depdi		0,63,12,pte	extrd,u         pte,56,32,pte	idtlbt		%r16,%r17	rfir	nop#elsedtlb_miss_11:	mfctl           %cr25,ptp	/* Assume user space miss */	or,<>           %r0,spc,%r0	/* If it is user space, nullify */	mfctl           %cr24,ptp	/* Load kernel pgd instead */	extru		va,9,10,t1	/* Get pgd index */	mfsp            %sr7,t0		/* Get current space */	or,=            %r0,t0,%r0	/* If kernel, nullify following test */	comb,<>,n       t0,spc,dtlb_fault /* forward */	/* First level page table lookup */	ldwx,s		t1(ptp),ptp	extru		va,19,10,t0	/* get second-level index */	bb,>=,n 	ptp,_PAGE_PRESENT_BIT,dtlb_fault	depi		0,31,12,ptp	/* clear prot bits */	/* Second level page table lookup */	sh2addl 	 t0,ptp,ptp	ldi		_PAGE_ACCESSED,t1	ldw		 0(ptp),pte	bb,>=,n 	 pte,_PAGE_PRESENT_BIT,dtlb_fault	/* Check whether the "accessed" bit was set, otherwise do so */	or		t1,pte,t0	/* t0 has R bit set */	and,<>		t1,pte,%r0	/* test and nullify if already set */	stw		t0,0(ptp)	/* write back pte */	copy            spc,prot	/* init prot with faulting space */	dep		pte,8,7,prot	extru,=		pte,_PAGE_NO_CACHE_BIT,1,r0	depi		1,12,1,prot	extru,=         pte,_PAGE_USER_BIT,1,r0	depi		7,11,3,prot   /* Set for user space (1 rsvd for read) */	extru,= 	pte,_PAGE_GATEWAY_BIT,1,r0	depi		0,11,2,prot	/* If Gateway, Set PL2 to 0 */	/* Get rid of prot bits and convert to page addr for idtlba */	depi		0,31,12,pte	extru		pte,24,25,pte	mfsp		%sr1,t0  /* Save sr1 so we can use it in tlb inserts */	mtsp		spc,%sr1	idtlba		pte,(%sr1,va)	idtlbp		prot,(%sr1,va)	mtsp		t0, %sr1	/* Restore sr1 */	rfir	nopdtlb_miss_20:	.level 2.0	mfctl           %cr25,ptp	/* Assume user space miss */	or,<>           %r0,spc,%r0	/* If it is user space, nullify */	mfctl           %cr24,ptp	/* Load kernel pgd instead */	extru		va,9,10,t1	/* Get pgd index */	mfsp            %sr7,t0		/* Get current space */	or,=            %r0,t0,%r0	/* If kernel, nullify following test */	comb,<>,n       t0,spc,dtlb_fault /* forward */	/* First level page table lookup */	ldwx,s		t1(ptp),ptp	extru		va,19,10,t0	/* get second-level index */	bb,>=,n 	ptp,_PAGE_PRESENT_BIT,dtlb_fault	depi		0,31,12,ptp	/* clear prot bits */	/* Second level page table lookup */	sh2addl 	 t0,ptp,ptp	ldi		_PAGE_ACCESSED,t1	ldw		 0(ptp),pte	bb,>=,n 	 pte,_PAGE_PRESENT_BIT,dtlb_fault	/* Check whether the "accessed" bit was set, otherwise do so */	or		t1,pte,t0	/* t0 has R bit set */	and,<>		t1,pte,%r0	/* test and nullify if already set */	stw		t0,0(ptp)	/* write back pte */	copy            spc,prot	/* init prot with faulting space */		depd		pte,8,7,prot	extrd,u,*=	pte,_PAGE_NO_CACHE_BIT+32,1,r0	depdi		1,12,1,prot	extrd,u,*=      pte,_PAGE_USER_BIT+32,1,r0	depdi		7,11,3,prot   /* Set for user space (1 rsvd for read) */	extrd,u,*= 	pte,_PAGE_GATEWAY_BIT+32,1,r0	depdi		0,11,2,prot	/* If Gateway, Set PL2 to 0 */	/* Get rid of prot bits and convert to page addr for idtlbt */	depdi		0,63,12,pte	extrd,u		pte,56,25,pte	idtlbt		%r16,%r17	.level		1.1	rfir	nop#endif#ifdef __LP64__itlb_miss_20w:	/*	 * I miss is a little different, since we allow users to fault	 * on the gateway page which is in the kernel address space.	 */	extrd,u         spc,31,7,t1     /* adjust va */	depd            t1,31,7,va      /* adjust va */	depdi           0,31,7,spc      /* adjust space */	cmpib,*=        0,spc,itlb_miss_kernel_20w	extrd,u         va,33,9,t1      /* Get pgd index */	mfctl           %cr25,ptp	/* load user pgd */	mfsp            %sr7,t0		/* Get current space */	or,*=           %r0,t0,%r0      /* If kernel, nullify following test */	cmpb,*<>,n      t0,spc,itlb_fault /* forward */	/* First level page table lookup */itlb_miss_common_20w:	ldd,s           t1(ptp),ptp	extrd,u         va,42,9,t0     /* get second-level index */	bb,>=,n 	ptp,_PAGE_PRESENT_BIT,itlb_fault	depdi           0,63,12,ptp     /* clear prot bits */	/* Second level page table lookup */	ldd,s           t0(ptp),ptp	extrd,u         va,51,9,t0     /* get third-level index */	bb,>=,n         ptp,_PAGE_PRESENT_BIT,itlb_fault	depdi           0,63,12,ptp     /* clear prot bits */	/* Third level page table lookup */	shladd           t0,3,ptp,ptp	ldi		_PAGE_ACCESSED,t1	ldd              0(ptp),pte	bb,>=,n          pte,_PAGE_PRESENT_BIT,itlb_fault	/* Check whether the "accessed" bit was set, otherwise do so */	or		t1,pte,t0	/* t0 has R bit set */	and,*<>         t1,pte,%r0      /* test and nullify if already set */	std             t0,0(ptp)       /* write back pte */	copy            spc,prot        /* init prot with faulting space */		depd		pte,8,7,prot	extrd,u,*=	pte,_PAGE_NO_CACHE_BIT+32,1,r0	depdi		1,12,1,prot	extrd,u,*=      pte,_PAGE_USER_BIT+32,1,r0	depdi		7,11,3,prot   /* Set for user space (1 rsvd for read) */	extrd,u,*= 	pte,_PAGE_GATEWAY_BIT+32,1,r0	depdi		0,11,2,prot	/* If Gateway, Set PL2 to 0 */	/* Get rid of prot bits and convert to page addr for iitlbt */	depdi		0,63,12,pte	extrd,u         pte,56,32,pte	iitlbt          %r16,%r17	rfir	nopitlb_miss_kernel_20w:	b               itlb_miss_common_20w	mfctl           %cr24,ptp	/* Load kernel pgd */#elseitlb_miss_11:	/*	 * I miss is a little different, since we allow users to fault	 * on the gateway page which is in the kernel address space.	 */	comib,=         0,spc,itlb_miss_kernel_11	extru		va,9,10,t1	/* Get pgd index */	mfctl           %cr25,ptp	/* load user pgd */	mfsp            %sr7,t0		/* Get current space */	or,=            %r0,t0,%r0	/* If kernel, nullify following test */	comb,<>,n       t0,spc,itlb_fault /* forward */	/* First level page table lookup */itlb_miss_common_11:	ldwx,s		t1(ptp),ptp	extru		va,19,10,t0	/* get second-level index */	bb,>=,n 	ptp,_PAGE_PRESENT_BIT,itlb_fault	depi		0,31,12,ptp	/* clear prot bits */	/* Second level page table lookup */	sh2addl 	 t0,ptp,ptp	ldi		_PAGE_ACCESSED,t1	ldw		 0(ptp),pte	bb,>=,n 	 pte,_PAGE_PRESENT_BIT,itlb_fault	/* Check whether the "accessed" bit was set, otherwise do so */	or		t1,pte,t0	/* t0 has R bit set */	and,<>		t1,pte,%r0	/* test and nullify if already set */	stw		t0,0(ptp)	/* write back pte */	copy            spc,prot        /* init prot with faulting space */	dep		pte,8,7,prot	extru,=		pte,_PAGE_NO_CACHE_BIT,1,r0	depi		1,12,1,prot	extru,=         pte,_PAGE_USER_BIT,1,r0	depi		7,11,3,prot   /* Set for user space (1 rsvd for read) */	extru,= 	pte,_PAGE_GATEWAY_BIT,1,r0	depi		0,11,2,prot	/* If Gateway, Set PL2 to 0 */	/* Get rid of prot bits and convert to page addr for iitlba */	depi		0,31,12,pte	extru		pte,24,25,pte	mfsp		%sr1,t0  /* Save sr1 so we can use it in tlb inserts */	mtsp		spc,%sr1	iitlba		pte,(%sr1,va)	iitlbp		prot,(%sr1,va)	mtsp		t0, %sr1	/* Restore sr1 */	rfir	nopitlb_miss_kernel_11:	b               itlb_miss_common_11	mfctl           %cr24,ptp	/* Load kernel pgd */itlb_miss_20:	/*	 * I miss is a little different, since we allow users to fault	 * on the gateway page which is in the kernel address space.	 */	comib,=         0,spc,itlb_miss_kernel_20	extru		va,9,10,t1	/* Get pgd index */	mfctl           %cr25,ptp	/* load user pgd */	mfsp            %sr7,t0		/* Get current space */	or,=            %r0,t0,%r0	/* If kernel, nullify following test */	comb,<>,n       t0,spc,itlb_fault /* forward */	/* First level page table lookup */itlb_miss_common_20:	ldwx,s		t1(ptp),ptp	extru		va,19,10,t0	/* get second-level index */	bb,>=,n 	ptp,_PAGE_PRESENT_BIT,itlb_fault	depi		0,31,12,ptp	/* clear prot bits */	/* Second level page table lookup */	sh2addl 	 t0,ptp,ptp	ldi		_PAGE_ACCESSED,t1	ldw		 0(ptp),pte	bb,>=,n 	 pte,_PAGE_PRESENT_BIT,itlb_fault	/* Check whether the "accessed" bit was set, otherwise do so */	or		t1,pte,t0	/* t0 has R bit set */	and,<>		t1,pte,%r0	/* test and nullify if already set */	stw		t0,0(ptp)	/* write back pte */	copy            spc,prot        /* init prot with faulting space */		.level 2.0	depd		pte,8,7,prot	extrd,u,*=	pte,_PAGE_NO_CACHE_BIT+32,1,r0	depdi		1,12,1,prot	extrd,u,*=      pte,_PAGE_USER_BIT+32,1,r0	depdi		7,11,3,prot   /* Set for user space (1 rsvd for read) */	extrd,u,*= 	pte,_PAGE_GATEWAY_BIT+32,1,r0	depdi		0,11,2,prot	/* If Gateway, Set PL2 to 0 */	/* Get rid of prot bits and convert to page addr for iitlbt */	depdi		0,63,12,pte	extrd,u		pte,56,25,pte	iitlbt          %r16,%r17	.level		1.1	rfir	nopitlb_miss_kernel_20:	b               itlb_miss_common_20	mfctl           %cr24,ptp	/* Load kernel pgd */#endif#ifdef __LP64__dbit_trap_20w:	extrd,u         spc,31,7,t1     /* adjust va */	depd            t1,31,7,va      /* adjust va */	depdi           0,1,2,va        /* adjust va */	depdi           0,31,7,spc      /* adjust space */	mfctl           %cr25,ptp	/* Assume user space miss */	or,*<>          %r0,spc,%r0     /* If it is user space, nullify */	mfctl           %cr24,ptp	/* Load kernel pgd instead */	extrd,u         va,33,9,t1      /* Get pgd index */	mfsp            %sr7,t0		/* Get current space */	or,*=           %r0,t0,%r0      /* If kernel, nullify following test */	comb,<>,n       t0,spc,dbit_fault /* forward */	/* First level page table lookup */	ldd,s           t1(ptp),ptp	extrd,u         va,42,9,t0     /* get second-level index */	bb,>=,n         ptp,_PAGE_PRESENT_BIT,dbit_fault	depdi           0,63,12,ptp     /* clear prot bits */	/* Second level page table lookup */	ldd,s           t0(ptp),ptp	extrd,u         va,51,9,t0     /* get third-level index */	bb,>=,n         ptp,_PAGE_PRESENT_BIT,dbit_fault	depdi           0,63,12,ptp     /* clear prot bits */	/* Third level page table lookup */	shladd           t0,3,ptp,ptp	ldi		(_PAGE_ACCESSED|_PAGE_DIRTY),t1	ldd              0(ptp),pte	bb,>=,n          pte,_PAGE_PRESENT_BIT,dbit_fault	/* Set Accessed and Dirty bits in the pte */	or		t1,pte,pte	std             pte,0(ptp)      /* write back pte */	copy            spc,prot	/* init prot with faulting space */		depd		pte,8,7,prot	extrd,u,*=	pte,_PAGE_NO_CACHE_BIT+32,1,r0	depdi		1,12,1,prot	extrd,u,*=      pte,_PAGE_USER_BIT+32,1,r0