?? at91sam9xe128.h
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AT91_REG DBGU_CSR; // Channel Status Register
AT91_REG DBGU_RHR; // Receiver Holding Register
AT91_REG DBGU_THR; // Transmitter Holding Register
AT91_REG DBGU_BRGR; // Baud Rate Generator Register
AT91_REG Reserved14[7]; //
AT91_REG DBGU_CIDR; // Chip ID Register
AT91_REG DBGU_EXID; // Chip ID Extension Register
AT91_REG DBGU_FNTR; // Force NTRST Register
AT91_REG Reserved15[45]; //
AT91_REG DBGU_RPR; // Receive Pointer Register
AT91_REG DBGU_RCR; // Receive Counter Register
AT91_REG DBGU_TPR; // Transmit Pointer Register
AT91_REG DBGU_TCR; // Transmit Counter Register
AT91_REG DBGU_RNPR; // Receive Next Pointer Register
AT91_REG DBGU_RNCR; // Receive Next Counter Register
AT91_REG DBGU_TNPR; // Transmit Next Pointer Register
AT91_REG DBGU_TNCR; // Transmit Next Counter Register
AT91_REG DBGU_PTCR; // PDC Transfer Control Register
AT91_REG DBGU_PTSR; // PDC Transfer Status Register
AT91_REG Reserved16[54]; //
AT91_REG PIOA_PER; // PIO Enable Register
AT91_REG PIOA_PDR; // PIO Disable Register
AT91_REG PIOA_PSR; // PIO Status Register
AT91_REG Reserved17[1]; //
AT91_REG PIOA_OER; // Output Enable Register
AT91_REG PIOA_ODR; // Output Disable Registerr
AT91_REG PIOA_OSR; // Output Status Register
AT91_REG Reserved18[1]; //
AT91_REG PIOA_IFER; // Input Filter Enable Register
AT91_REG PIOA_IFDR; // Input Filter Disable Register
AT91_REG PIOA_IFSR; // Input Filter Status Register
AT91_REG Reserved19[1]; //
AT91_REG PIOA_SODR; // Set Output Data Register
AT91_REG PIOA_CODR; // Clear Output Data Register
AT91_REG PIOA_ODSR; // Output Data Status Register
AT91_REG PIOA_PDSR; // Pin Data Status Register
AT91_REG PIOA_IER; // Interrupt Enable Register
AT91_REG PIOA_IDR; // Interrupt Disable Register
AT91_REG PIOA_IMR; // Interrupt Mask Register
AT91_REG PIOA_ISR; // Interrupt Status Register
AT91_REG PIOA_MDER; // Multi-driver Enable Register
AT91_REG PIOA_MDDR; // Multi-driver Disable Register
AT91_REG PIOA_MDSR; // Multi-driver Status Register
AT91_REG Reserved20[1]; //
AT91_REG PIOA_PPUDR; // Pull-up Disable Register
AT91_REG PIOA_PPUER; // Pull-up Enable Register
AT91_REG PIOA_PPUSR; // Pull-up Status Register
AT91_REG Reserved21[1]; //
AT91_REG PIOA_ASR; // Select A Register
AT91_REG PIOA_BSR; // Select B Register
AT91_REG PIOA_ABSR; // AB Select Status Register
AT91_REG Reserved22[9]; //
AT91_REG PIOA_OWER; // Output Write Enable Register
AT91_REG PIOA_OWDR; // Output Write Disable Register
AT91_REG PIOA_OWSR; // Output Write Status Register
AT91_REG Reserved23[213]; //
AT91_REG PIOB_PER; // PIO Enable Register
AT91_REG PIOB_PDR; // PIO Disable Register
AT91_REG PIOB_PSR; // PIO Status Register
AT91_REG Reserved24[1]; //
AT91_REG PIOB_OER; // Output Enable Register
AT91_REG PIOB_ODR; // Output Disable Registerr
AT91_REG PIOB_OSR; // Output Status Register
AT91_REG Reserved25[1]; //
AT91_REG PIOB_IFER; // Input Filter Enable Register
AT91_REG PIOB_IFDR; // Input Filter Disable Register
AT91_REG PIOB_IFSR; // Input Filter Status Register
AT91_REG Reserved26[1]; //
AT91_REG PIOB_SODR; // Set Output Data Register
AT91_REG PIOB_CODR; // Clear Output Data Register
AT91_REG PIOB_ODSR; // Output Data Status Register
AT91_REG PIOB_PDSR; // Pin Data Status Register
AT91_REG PIOB_IER; // Interrupt Enable Register
AT91_REG PIOB_IDR; // Interrupt Disable Register
AT91_REG PIOB_IMR; // Interrupt Mask Register
AT91_REG PIOB_ISR; // Interrupt Status Register
AT91_REG PIOB_MDER; // Multi-driver Enable Register
AT91_REG PIOB_MDDR; // Multi-driver Disable Register
AT91_REG PIOB_MDSR; // Multi-driver Status Register
AT91_REG Reserved27[1]; //
AT91_REG PIOB_PPUDR; // Pull-up Disable Register
AT91_REG PIOB_PPUER; // Pull-up Enable Register
AT91_REG PIOB_PPUSR; // Pull-up Status Register
AT91_REG Reserved28[1]; //
AT91_REG PIOB_ASR; // Select A Register
AT91_REG PIOB_BSR; // Select B Register
AT91_REG PIOB_ABSR; // AB Select Status Register
AT91_REG Reserved29[9]; //
AT91_REG PIOB_OWER; // Output Write Enable Register
AT91_REG PIOB_OWDR; // Output Write Disable Register
AT91_REG PIOB_OWSR; // Output Write Status Register
AT91_REG Reserved30[85]; //
AT91_REG PIOC_PER; // PIO Enable Register
AT91_REG PIOC_PDR; // PIO Disable Register
AT91_REG PIOC_PSR; // PIO Status Register
AT91_REG Reserved31[1]; //
AT91_REG PIOC_OER; // Output Enable Register
AT91_REG PIOC_ODR; // Output Disable Registerr
AT91_REG PIOC_OSR; // Output Status Register
AT91_REG Reserved32[1]; //
AT91_REG PIOC_IFER; // Input Filter Enable Register
AT91_REG PIOC_IFDR; // Input Filter Disable Register
AT91_REG PIOC_IFSR; // Input Filter Status Register
AT91_REG Reserved33[1]; //
AT91_REG PIOC_SODR; // Set Output Data Register
AT91_REG PIOC_CODR; // Clear Output Data Register
AT91_REG PIOC_ODSR; // Output Data Status Register
AT91_REG PIOC_PDSR; // Pin Data Status Register
AT91_REG PIOC_IER; // Interrupt Enable Register
AT91_REG PIOC_IDR; // Interrupt Disable Register
AT91_REG PIOC_IMR; // Interrupt Mask Register
AT91_REG PIOC_ISR; // Interrupt Status Register
AT91_REG PIOC_MDER; // Multi-driver Enable Register
AT91_REG PIOC_MDDR; // Multi-driver Disable Register
AT91_REG PIOC_MDSR; // Multi-driver Status Register
AT91_REG Reserved34[1]; //
AT91_REG PIOC_PPUDR; // Pull-up Disable Register
AT91_REG PIOC_PPUER; // Pull-up Enable Register
AT91_REG PIOC_PPUSR; // Pull-up Status Register
AT91_REG Reserved35[1]; //
AT91_REG PIOC_ASR; // Select A Register
AT91_REG PIOC_BSR; // Select B Register
AT91_REG PIOC_ABSR; // AB Select Status Register
AT91_REG Reserved36[9]; //
AT91_REG PIOC_OWER; // Output Write Enable Register
AT91_REG PIOC_OWDR; // Output Write Disable Register
AT91_REG PIOC_OWSR; // Output Write Status Register
AT91_REG Reserved37[85]; //
AT91_REG PMC_SCER; // System Clock Enable Register
AT91_REG PMC_SCDR; // System Clock Disable Register
AT91_REG PMC_SCSR; // System Clock Status Register
AT91_REG Reserved38[1]; //
AT91_REG PMC_PCER; // Peripheral Clock Enable Register
AT91_REG PMC_PCDR; // Peripheral Clock Disable Register
AT91_REG PMC_PCSR; // Peripheral Clock Status Register
AT91_REG Reserved39[1]; //
AT91_REG PMC_MOR; // Main Oscillator Register
AT91_REG PMC_MCFR; // Main Clock Frequency Register
AT91_REG PMC_PLLAR; // PLL A Register
AT91_REG PMC_PLLBR; // PLL B Register
AT91_REG PMC_MCKR; // Master Clock Register
AT91_REG Reserved40[3]; //
AT91_REG PMC_PCKR[8]; // Programmable Clock Register
AT91_REG PMC_IER; // Interrupt Enable Register
AT91_REG PMC_IDR; // Interrupt Disable Register
AT91_REG PMC_SR; // Status Register
AT91_REG PMC_IMR; // Interrupt Mask Register
AT91_REG Reserved41[36]; //
AT91_REG RSTC_RCR; // Reset Control Register
AT91_REG RSTC_RSR; // Reset Status Register
AT91_REG RSTC_RMR; // Reset Mode Register
AT91_REG Reserved42[1]; //
AT91_REG SHDWC_SHCR; // Shut Down Control Register
AT91_REG SHDWC_SHMR; // Shut Down Mode Register
AT91_REG SHDWC_SHSR; // Shut Down Status Register
AT91_REG Reserved43[1]; //
AT91_REG RTTC_RTMR; // Real-time Mode Register
AT91_REG RTTC_RTAR; // Real-time Alarm Register
AT91_REG RTTC_RTVR; // Real-time Value Register
AT91_REG RTTC_RTSR; // Real-time Status Register
AT91_REG PITC_PIMR; // Period Interval Mode Register
AT91_REG PITC_PISR; // Period Interval Status Register
AT91_REG PITC_PIVR; // Period Interval Value Register
AT91_REG PITC_PIIR; // Period Interval Image Register
AT91_REG WDTC_WDCR; // Watchdog Control Register
AT91_REG WDTC_WDMR; // Watchdog Mode Register
AT91_REG WDTC_WDSR; // Watchdog Status Register
AT91_REG Reserved44[1]; //
AT91_REG SYS_GPBR[4]; // General Purpose Register
} AT91S_SYS, *AT91PS_SYS;
#else
#define SYS_GPBR (AT91_CAST(AT91_REG *) 0x00003D50) // (SYS_GPBR) General Purpose Register
#endif
// -------- GPBR : (SYS Offset: 0x3d50) GPBR General Purpose Register --------
#define AT91C_GPBR_GPRV (0x0 << 0) // (SYS) General Purpose Register Value
// *****************************************************************************
// SOFTWARE API DEFINITION FOR External Bus Interface
// *****************************************************************************
#ifndef __ASSEMBLY__
typedef struct _AT91S_EBI {
AT91_REG EBI_DUMMY; // Dummy register - Do not use
} AT91S_EBI, *AT91PS_EBI;
#else
#define EBI_DUMMY (AT91_CAST(AT91_REG *) 0x00000000) // (EBI_DUMMY) Dummy register - Do not use
#endif
// *****************************************************************************
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