?? k401.h
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/************************************************************************/
/* S3C3410X Special Function Register Difinition */
/************************************************************************/
/* Modified and programmed by Yong-Hyeon Kim */
/* Description : 1999. 12. 20 first edited */
/************************************************************************/
#ifndef __40100_H__
#define __40100_H__
#ifdef __cplusplus
extern "C" {
#endif
#include "option.h"
/* System */
#define rSYSCFG (*(volatile unsigned *)(_CPU_ASICBASE+0x1000))
#define rEXTCON0 (*(volatile unsigned *)(_CPU_ASICBASE+0x2030))
#define rEXTCON1 (*(volatile unsigned *)(_CPU_ASICBASE+0x2034))
#define rEXTPOT (*(volatile unsigned short *)(_CPU_ASICBASE+0x203e))
#define rEXTDAT0 (*(volatile unsigned short *)(_CPU_ASICBASE+0x202c))
#define rEXTDAT1 (*(volatile unsigned short *)(_CPU_ASICBASE+0x202e))
/* DMA0 Control */
#define rDMASRC0 (*(volatile unsigned *)(_CPU_ASICBASE+0x3000))
#define rDMADST0 (*(volatile unsigned *)(_CPU_ASICBASE+0x3004))
#define rDMACNT0 (*(volatile unsigned *)(_CPU_ASICBASE+0x3008))
#define rDMACON0 (*(volatile unsigned *)(_CPU_ASICBASE+0x300c))
/* DMA1 Control */
#define rDMASRC1 (*(volatile unsigned *)(_CPU_ASICBASE+0x4000))
#define rDMADST1 (*(volatile unsigned *)(_CPU_ASICBASE+0x4004))
#define rDMACNT1 (*(volatile unsigned *)(_CPU_ASICBASE+0x4008))
#define rDMACON1 (*(volatile unsigned *)(_CPU_ASICBASE+0x400c))
/* I/O Port */
#define rPCON0 (*(volatile unsigned short *)(_CPU_ASICBASE+0xb010))
#define rPDAT0 (*(volatile unsigned char *)(_CPU_ASICBASE+0xb000))
#define rPUR0 (*(volatile unsigned char *)(_CPU_ASICBASE+0xb028))
#define rPCON1 (*(volatile unsigned short *)(_CPU_ASICBASE+0xb012))
#define rPDAT1 (*(volatile unsigned char *)(_CPU_ASICBASE+0xb001))
#define rPDR1 (*(volatile unsigned char *)(_CPU_ASICBASE+0xb029))
#define rPDAT2 (*(volatile unsigned char *)(_CPU_ASICBASE+0xb002))
#define rPUR2 (*(volatile unsigned char *)(_CPU_ASICBASE+0xb02a))
#define rPCON3 (*(volatile unsigned short *)(_CPU_ASICBASE+0xb016))
#define rPDAT3 (*(volatile unsigned char *)(_CPU_ASICBASE+0xb003))
#define rPUR3 (*(volatile unsigned char *)(_CPU_ASICBASE+0xb02b))
#define rPCON4 (*(volatile unsigned short *)(_CPU_ASICBASE+0xb018))
#define rPDAT4 (*(volatile unsigned char *)(_CPU_ASICBASE+0xb004))
#define rPDR4 (*(volatile unsigned char *)(_CPU_ASICBASE+0xb02c))
#define rPCON5 (*(volatile unsigned *)(_CPU_ASICBASE+0xb01c))
#define rPDAT5 (*(volatile unsigned char *)(_CPU_ASICBASE+0xb005))
#define rPUR5 (*(volatile unsigned char *)(_CPU_ASICBASE+0xb02d))
#define rPCON6 (*(volatile unsigned *)(_CPU_ASICBASE+0xb020))
#define rPDAT6 (*(volatile unsigned char *)(_CPU_ASICBASE+0xb006))
#define rPUR6 (*(volatile unsigned char *)(_CPU_ASICBASE+0xb02e))
#define rPCON7 (*(volatile unsigned short *)(_CPU_ASICBASE+0xb024))
#define rPDAT7 (*(volatile unsigned char *)(_CPU_ASICBASE+0xb007))
#define rPUR7 (*(volatile unsigned char *)(_CPU_ASICBASE+0xb02f))
#define rPCON8 (*(volatile unsigned char *)(_CPU_ASICBASE+0xb026))
#define rPDAT8 (*(volatile unsigned char *)(_CPU_ASICBASE+0xb008))
#define rPUR8 (*(volatile unsigned char *)(_CPU_ASICBASE+0xb03c))
#define rPCON9 (*(volatile unsigned char *)(_CPU_ASICBASE+0xb027))
#define rPDAT9 (*(volatile unsigned char *)(_CPU_ASICBASE+0xb009))
#define rEINTPND (*(volatile unsigned char *)(_CPU_ASICBASE+0xb031))
#define rEINTCON (*(volatile unsigned short *)(_CPU_ASICBASE+0xb032))
#define rEINTMOD (*(volatile unsigned *)(_CPU_ASICBASE+0xb034))
/* Timer 0 */
#define rTDAT0 (*(volatile unsigned short *)(_CPU_ASICBASE+0x9000))
#define rTPRE0 (*(volatile unsigned char *)(_CPU_ASICBASE+0x9002))
#define rTCON0 (*(volatile unsigned char *)(_CPU_ASICBASE+0x9003))
#define rTCNT0 (*(volatile unsigned short *)(_CPU_ASICBASE+0x9006))
/* Timer 1 */
#define rTDAT1 (*(volatile unsigned short *)(_CPU_ASICBASE+0x9010))
#define rTPRE1 (*(volatile unsigned char *)(_CPU_ASICBASE+0x9012))
#define rTCON1 (*(volatile unsigned char *)(_CPU_ASICBASE+0x9013))
#define rTCNT1 (*(volatile unsigned short *)(_CPU_ASICBASE+0x9016))
/* Timer 2 */
#define rTDAT2 (*(volatile unsigned short *)(_CPU_ASICBASE+0x9020))
#define rTPRE2 (*(volatile unsigned char *)(_CPU_ASICBASE+0x9022))
#define rTCON2 (*(volatile unsigned char *)(_CPU_ASICBASE+0x9023))
#define rTCNT2 (*(volatile unsigned short *)(_CPU_ASICBASE+0x9026))
/* Timer 3 */
#define rTDAT3 (*(volatile unsigned char *)(_CPU_ASICBASE+0x9030))
#define rTPRE3 (*(volatile unsigned char *)(_CPU_ASICBASE+0x9032))
#define rTCON3 (*(volatile unsigned char *)(_CPU_ASICBASE+0x9033))
#define rTCNT3 (*(volatile unsigned char *)(_CPU_ASICBASE+0x9037))
/* Timer 4 */
#define rTDAT4 (*(volatile unsigned char *)(_CPU_ASICBASE+0x9040))
#define rTPRE4 (*(volatile unsigned char *)(_CPU_ASICBASE+0x9042))
#define rTCON4 (*(volatile unsigned char *)(_CPU_ASICBASE+0x9043))
#define rTCNT4 (*(volatile unsigned char *)(_CPU_ASICBASE+0x9047))
#define rTFCON (*(volatile unsigned char *)(_CPU_ASICBASE+0x904f))
#define rTFSTAT (*(volatile unsigned char *)(_CPU_ASICBASE+0x904e))
#define rTFB4 (*(volatile unsigned char *)(_CPU_ASICBASE+0x904b))
#define rTFHW4 (*(volatile unsigned short *)(_CPU_ASICBASE+0x904a))
#define rTFW4 (*(volatile unsigned *)(_CPU_ASICBASE+0x9048))
/* UART */
#define rULCON (*(volatile unsigned char *)(_CPU_ASICBASE+0x5003))
#define rUCON (*(volatile unsigned char *)(_CPU_ASICBASE+0x5007))
#define rUSTAT (*(volatile unsigned char *)(_CPU_ASICBASE+0x500b))
#define rUFCON (*(volatile unsigned char *)(_CPU_ASICBASE+0x500f))
#define rUFSTAT (*(volatile unsigned char *)(_CPU_ASICBASE+0x5012))
#define rUTXH (*(volatile unsigned char *)(_CPU_ASICBASE+0x5017))
#define rUTXH_B (*(volatile unsigned char *)(_CPU_ASICBASE+0x5017))
#define rUTXH_HW (*(volatile unsigned short *)(_CPU_ASICBASE+0x5016))
#define rUTXH_W (*(volatile unsigned *)(_CPU_ASICBASE+0x5014))
#define rURXH (*(volatile unsigned char *)(_CPU_ASICBASE+0x501b))
#define rURXH_B (*(volatile unsigned char *)(_CPU_ASICBASE+0x501b))
#define rURXH_HW (*(volatile unsigned short *)(_CPU_ASICBASE+0x501a))
#define rURXH_W (*(volatile unsigned *)(_CPU_ASICBASE+0x5018))
#define rUBRDIV (*(volatile unsigned short *)(_CPU_ASICBASE+0x501e))
/* SIO 0 */
#define rITVCNT0 (*(volatile unsigned char *)(_CPU_ASICBASE+0x6000))
#define rSBRDR0 (*(volatile unsigned char *)(_CPU_ASICBASE+0x6001))
#define rSIODAT0 (*(volatile unsigned char *)(_CPU_ASICBASE+0x6002))
#define rSIOCON0 (*(volatile unsigned char *)(_CPU_ASICBASE+0x6003))
/* SIO 1 */
#define rITVCNT1 (*(volatile unsigned char *)(_CPU_ASICBASE+0x7000))
#define rSBRDR1 (*(volatile unsigned char *)(_CPU_ASICBASE+0x7001))
#define rSIODAT1 (*(volatile unsigned char *)(_CPU_ASICBASE+0x7002))
#define rSIOCON1 (*(volatile unsigned char *)(_CPU_ASICBASE+0x7003))
/* Interrupt Control */
#define rINTMOD (*(volatile unsigned *)(_CPU_ASICBASE+0xc000))
#define rINTPND (*(volatile unsigned *)(_CPU_ASICBASE+0xc004))
#define rINTMSK (*(volatile unsigned *)(_CPU_ASICBASE+0xc008))
#define rINTPRI0 (*(volatile unsigned *)(_CPU_ASICBASE+0xc00c))
#define rINTPRI1 (*(volatile unsigned *)(_CPU_ASICBASE+0xc010))
#define rINTPRI2 (*(volatile unsigned *)(_CPU_ASICBASE+0xc014))
#define rINTPRI3 (*(volatile unsigned *)(_CPU_ASICBASE+0xc018))
#define rINTPRI4 (*(volatile unsigned *)(_CPU_ASICBASE+0xc01c))
#define rINTPRI5 (*(volatile unsigned *)(_CPU_ASICBASE+0xc020))
#define rINTPRI6 (*(volatile unsigned *)(_CPU_ASICBASE+0xc024))
#define rINTPRI7 (*(volatile unsigned *)(_CPU_ASICBASE+0xc028))
/* ADC */
#define rADCCON (*(volatile unsigned short *)(_CPU_ASICBASE+0x8002))
#define rADCDAT (*(volatile unsigned short *)(_CPU_ASICBASE+0x8006))
/* Basic Timer */
#define rBTCON (*(volatile unsigned short *)(_CPU_ASICBASE+0xa002))
#define rBTCNT (*(volatile unsigned char *)(_CPU_ASICBASE+0xa007))
/* IIC */
#define rIICCON (*(volatile unsigned char *)(_CPU_ASICBASE+0xe000))
#define rIICSTAT (*(volatile unsigned char *)(_CPU_ASICBASE+0xe001))
#define rIICADD (*(volatile unsigned char *)(_CPU_ASICBASE+0xe002))
#define rIICDS (*(volatile unsigned char *)(_CPU_ASICBASE+0xe003))
#define rIICPS (*(volatile unsigned char *)(_CPU_ASICBASE+0xe004))
#define rIICPCNT (*(volatile unsigned char *)(_CPU_ASICBASE+0xe005))
/* Power Manager */
#define rSYSCON (*(volatile unsigned char *)(_CPU_ASICBASE+0xd003))
/* RTC */
#define rRTCCON (*(volatile unsigned char *)(_CPU_ASICBASE+0xa013))
#define rRTCALM (*(volatile unsigned char *)(_CPU_ASICBASE+0xa012))
#define rRINTCON (*(volatile unsigned char *)(_CPU_ASICBASE+0xa011))
#define rRINTPND (*(volatile unsigned char *)(_CPU_ASICBASE+0xa010))
#define rALMSEC (*(volatile unsigned char *)(_CPU_ASICBASE+0xa033))
#define rALMMIN (*(volatile unsigned char *)(_CPU_ASICBASE+0xa032))
#define rALMHOUR (*(volatile unsigned char *)(_CPU_ASICBASE+0xa031))
#define rALMDAY (*(volatile unsigned char *)(_CPU_ASICBASE+0xa037))
#define rALMMON (*(volatile unsigned char *)(_CPU_ASICBASE+0xa036))
#define rALMYEAR (*(volatile unsigned char *)(_CPU_ASICBASE+0xa035))
#define rBCDSEC (*(volatile unsigned char *)(_CPU_ASICBASE+0xa023))
#define rBCDMIN (*(volatile unsigned char *)(_CPU_ASICBASE+0xa022))
#define rBCDHOUR (*(volatile unsigned char *)(_CPU_ASICBASE+0xa021))
#define rBCDDAY (*(volatile unsigned char *)(_CPU_ASICBASE+0xa027))
#define rBCDDATE (*(volatile unsigned char *)(_CPU_ASICBASE+0xa020))
#define rBCDMON (*(volatile unsigned char *)(_CPU_ASICBASE+0xa026))
#define rBCDYEAR (*(volatile unsigned char *)(_CPU_ASICBASE+0xa025))
#define pISR_RESET (*(unsigned *)(_ISR_STARTADDRESS+0x0))
#define pISR_UNDEF (*(unsigned *)(_ISR_STARTADDRESS+0x4))
#define pISR_SWI (*(unsigned *)(_ISR_STARTADDRESS+0x8))
#define pISR_PABORT (*(unsigned *)(_ISR_STARTADDRESS+0xc))
#define pISR_DABORT (*(unsigned *)(_ISR_STARTADDRESS+0x10))
#define pISR_RESERVED (*(unsigned *)(_ISR_STARTADDRESS+0x14))
#define pISR_IRQ (*(unsigned *)(_ISR_STARTADDRESS+0x18))
#define pISR_FIQ (*(unsigned *)(_ISR_STARTADDRESS+0x1c))
#define pISR_EINT0 (*(unsigned *)(_ISR_STARTADDRESS+0x20))
#define pISR_EINT1 (*(unsigned *)(_ISR_STARTADDRESS+0x24))
#define pISR_URX (*(unsigned *)(_ISR_STARTADDRESS+0x28))
#define pISR_UTX (*(unsigned *)(_ISR_STARTADDRESS+0x2c))
#define pISR_UERR (*(unsigned *)(_ISR_STARTADDRESS+0x30))
#define pISR_DMA0 (*(unsigned *)(_ISR_STARTADDRESS+0x34))
#define pISR_DMA1 (*(unsigned *)(_ISR_STARTADDRESS+0x38))
#define pISR_TOF0 (*(unsigned *)(_ISR_STARTADDRESS+0x3c))
#define pISR_TMC0 (*(unsigned *)(_ISR_STARTADDRESS+0x40))
#define pISR_TOF1 (*(unsigned *)(_ISR_STARTADDRESS+0x44))
#define pISR_TMC1 (*(unsigned *)(_ISR_STARTADDRESS+0x48))
#define pISR_TOF2 (*(unsigned *)(_ISR_STARTADDRESS+0x4c))
#define pISR_TMC2 (*(unsigned *)(_ISR_STARTADDRESS+0x50))
#define pISR_TOF3 (*(unsigned *)(_ISR_STARTADDRESS+0x54))
#define pISR_TMC3 (*(unsigned *)(_ISR_STARTADDRESS+0x58))
#define pISR_TOF4 (*(unsigned *)(_ISR_STARTADDRESS+0x5c))
#define pISR_TMC4 (*(unsigned *)(_ISR_STARTADDRESS+0x60))
#define pISR_BT (*(unsigned *)(_ISR_STARTADDRESS+0x64))
#define pISR_SIO0 (*(unsigned *)(_ISR_STARTADDRESS+0x68))
#define pISR_SIO1 (*(unsigned *)(_ISR_STARTADDRESS+0x6c))
#define pISR_IIC (*(unsigned *)(_ISR_STARTADDRESS+0x70))
#define pISR_RTCA (*(unsigned *)(_ISR_STARTADDRESS+0x74))
#define pISR_RTCT (*(unsigned *)(_ISR_STARTADDRESS+0x78))
#define pISR_TF (*(unsigned *)(_ISR_STARTADDRESS+0x7c))
#define pISR_EINT2 (*(unsigned *)(_ISR_STARTADDRESS+0x80))
#define pISR_EINT3 (*(unsigned *)(_ISR_STARTADDRESS+0x84))
#define pISR_EINT4 (*(unsigned *)(_ISR_STARTADDRESS+0x88))
#define pISR_ADC (*(unsigned *)(_ISR_STARTADDRESS+0x8c))
#define pISR_EINT8 (*(unsigned *)(_ISR_STARTADDRESS+0x90))
#define pISR_EINT9 (*(unsigned *)(_ISR_STARTADDRESS+0x94))
#define pISR_EINT10 (*(unsigned *)(_ISR_STARTADDRESS+0x98))
#define pISR_EINT11 (*(unsigned *)(_ISR_STARTADDRESS+0x9c))
#define BIT_EINT0 (0x1)
#define BIT_EINT1 (0x1<<1)
#define BIT_URX (0x1<<2)
#define BIT_UTX (0x1<<3)
#define BIT_UERR (0x1<<4)
#define BIT_DMA0 (0x1<<5)
#define BIT_DMA1 (0x1<<6)
#define BIT_TOF0 (0x1<<7)
#define BIT_TMC0 (0x1<<8)
#define BIT_TOF1 (0x1<<9)
#define BIT_TMC1 (0x1<<10)
#define BIT_TOF2 (0x1<<11)
#define BIT_TMC2 (0x1<<12)
#define BIT_TOF3 (0x1<<13)
#define BIT_TMC3 (0x1<<14)
#define BIT_TOF4 (0x1<<15)
#define BIT_TMC4 (0x1<<16)
#define BIT_BT (0x1<<17)
#define BIT_SIO0 (0x1<<18)
#define BIT_SIO1 (0x1<<19)
#define BIT_IIC (0x1<<20)
#define BIT_RTCA (0x1<<21)
#define BIT_RTCT (0x1<<22)
#define BIT_TF (0x1<<23)
#define BIT_EINT2 (0x1<<24)
#define BIT_EINT3 (0x1<<25)
#define BIT_EINT4 (0x1<<26)
#define BIT_ADC (0x1<<27)
#define BIT_EINT8 (0x1<<28)
#define BIT_EINT9 (0x1<<29)
#define BIT_EINT10 (0x1<<30)
#define BIT_EINT11 (0x1<<31)
#define BIT_GLOBAL (0x1<<6)
#ifdef __cplusplus
}
#endif
#endif /*__41000_H___*/?? 快捷鍵說明
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