?? sfr26a.h
字號:
union byte_def pur2_addr;
#define pur2 pur2_addr.byte
#define pu20 pur2_addr.bit.b0 /* P80 to P83 pull-up */
#define pu21 pur2_addr.bit.b1 /* P84 to P87 pull-up (Except P85) */
#define pu22 pur2_addr.bit.b2 /* P90 to P93 pull-up */
#define pu24 pur2_addr.bit.b4 /* P100 to P103 pull-up */
#define pu25 pur2_addr.bit.b5 /* P104 to P107 pull-up */
/*------------------------------------------------------
Port control register
------------------------------------------------------*/
union byte_def pcr_addr;
#define pcr pcr_addr.byte
#define pcr0 pcr_addr.bit.b0 /* Port P1 control register */
/********************************************************
* declare SFR char *
********************************************************/
/********************************************************
* declare SFR short *
********************************************************/
/*--------------------------------------------------------
Timer registers : Read and write data in 16-bit units.
--------------------------------------------------------*/
unsigned short ta11_addr; /* Timer A1-1 register */
#define ta11 ta11_addr
unsigned short ta21_addr; /* Timer A2-1 register */
#define ta21 ta21_addr
unsigned short ta41_addr; /* Timer A4-1 register */
#define ta41 ta41_addr
unsigned short ta0_addr; /* Timer A0 register */
#define ta0 ta0_addr
unsigned short ta1_addr; /* Timer A1 register */
#define ta1 ta1_addr
unsigned short ta2_addr; /* Timer A2 register */
#define ta2 ta2_addr
unsigned short ta3_addr; /* Timer A3 register */
#define ta3 ta3_addr
unsigned short ta4_addr; /* Timer A4 register */
#define ta4 ta4_addr
unsigned short tb0_addr; /* Timer B0 register */
#define tb0 tb0_addr
unsigned short tb1_addr; /* Timer B1 register */
#define tb1 tb1_addr
unsigned short tb2_addr; /* Timer B2 register */
#define tb2 tb2_addr
/********************************************************
* declare SFR union *
********************************************************/
/*------------------------------------------------------
DMAi control register union
------------------------------------------------------*/
/*------------------------------------------------------
dm0con
------------------------------------------------------*/
union byte_def dm0con_addr;
#define dm0con dm0con_addr.byte
#define dmbit_dm0con dm0con_addr.bit.b0 /* Transfer unit bit select bit */
#define dmasl_dm0con dm0con_addr.bit.b1 /* Repeat transfer mode select bit */
#define dmas_dm0con dm0con_addr.bit.b2 /* DMA request bit */
#define dmae_dm0con dm0con_addr.bit.b3 /* DMA enable bit */
#define dsd_dm0con dm0con_addr.bit.b4 /* Source address direction select bit */
#define dad_dm0con dm0con_addr.bit.b5 /* Destination address direction select bit */
/*------------------------------------------------------
dm1con
------------------------------------------------------*/
union byte_def dm1con_addr;
#define dm1con dm1con_addr.byte
#define dmbit_dm1con dm1con_addr.bit.b0 /* Transfer unit bit select bit */
#define dmasl_dm1con dm1con_addr.bit.b1 /* Repeat transfer mode select bit */
#define dmas_dm1con dm1con_addr.bit.b2 /* DMA request bit */
#define dmae_dm1con dm1con_addr.bit.b3 /* DMA enable bit */
#define dsd_dm1con dm1con_addr.bit.b4 /* Source address direction select bit */
#define dad_dm1con dm1con_addr.bit.b5 /* Destination address direction select bit */
/*------------------------------------------------------
interrupt control registers
------------------------------------------------------*/
/*------------------------------------------------------
int3ic
------------------------------------------------------*/
union byte_def int3ic_addr;
#define int3ic int3ic_addr.byte
#define ilvl0_int3ic int3ic_addr.bit.b0 /* Interrupt priority level select bit */
#define ilvl1_int3ic int3ic_addr.bit.b1 /* Interrupt priority level select bit */
#define ilvl2_int3ic int3ic_addr.bit.b2 /* Interrupt priority level select bit */
#define ir_int3ic int3ic_addr.bit.b3 /* Interrupt request bit */
#define pol_int3ic int3ic_addr.bit.b4 /* Polarity select bit */
/*------------------------------------------------------
INT5~ interrupt control register
------------------------------------------------------*/
union byte_def int5ic_addr;
#define int5ic int5ic_addr.byte
#define ilvl0_int5ic int5ic_addr.bit.b0 /* Interrupt priority level select bit */
#define ilvl1_int5ic int5ic_addr.bit.b1 /* Interrupt priority level select bit */
#define ilvl2_int5ic int5ic_addr.bit.b2 /* Interrupt priority level select bit */
#define ir_int5ic int5ic_addr.bit.b3 /* Interrupt request bit */
#define pol_int5ic int5ic_addr.bit.b4 /* Polarity select bit */
/*------------------------------------------------------
INT4~ interrupt control register
------------------------------------------------------*/
union byte_def int4ic_addr;
#define int4ic int4ic_addr.byte
#define ilvl0_int4ic int4ic_addr.bit.b0 /* Interrupt priority level select bit */
#define ilvl1_int4ic int4ic_addr.bit.b1 /* Interrupt priority level select bit */
#define ilvl2_int4ic int4ic_addr.bit.b2 /* Interrupt priority level select bit */
#define ir_int4ic int4ic_addr.bit.b3 /* Interrupt request bit */
#define pol_int4ic int4ic_addr.bit.b4 /* Polarity select bit */
/*------------------------------------------------------
UART2 Bus collision detection interrupt control register
------------------------------------------------------*/
union byte_def bcnic_addr;
#define bcnic bcnic_addr.byte
#define ilvl0_bcnic bcnic_addr.bit.b0 /* Interrupt priority level select bit */
#define ilvl1_bcnic bcnic_addr.bit.b1 /* Interrupt priority level select bit */
#define ilvl2_bcnic bcnic_addr.bit.b2 /* Interrupt priority level select bit */
#define ir_bcnic bcnic_addr.bit.b3 /* Interrupt request bit */
/*------------------------------------------------------
DMA0 interrupt control register
------------------------------------------------------*/
union byte_def dm0ic_addr;
#define dm0ic dm0ic_addr.byte
#define ilvl0_dm0ic dm0ic_addr.bit.b0 /* Interrupt priority level select bit */
#define ilvl1_dm0ic dm0ic_addr.bit.b1 /* Interrupt priority level select bit */
#define ilvl2_dm0ic dm0ic_addr.bit.b2 /* Interrupt priority level select bit */
#define ir_dm0ic dm0ic_addr.bit.b3 /* Interrupt request bit */
/*------------------------------------------------------
DMA1 interrupt control register
------------------------------------------------------*/
union byte_def dm1ic_addr;
#define dm1ic dm1ic_addr.byte
#define ilvl0_dm1ic dm1ic_addr.bit.b0 /* Interrupt priority level select bit */
#define ilvl1_dm1ic dm1ic_addr.bit.b1 /* Interrupt priority level select bit */
#define ilvl2_dm1ic dm1ic_addr.bit.b2 /* Interrupt priority level select bit */
#define ir_dm1ic dm1ic_addr.bit.b3 /* Interrupt request bit */
/*------------------------------------------------------
Key input interrupt control register
------------------------------------------------------*/
union byte_def kupic_addr;
#define kupic kupic_addr.byte
#define ilvl0_kupic kupic_addr.bit.b0 /* Interrupt priority level select bit */
#define ilvl1_kupic kupic_addr.bit.b1 /* Interrupt priority level select bit */
#define ilvl2_kupic kupic_addr.bit.b2 /* Interrupt priority level select bit */
#define ir_kupic kupic_addr.bit.b3 /* Interrupt request bit */
/*------------------------------------------------------
A/D conversion interrupt control register
------------------------------------------------------*/
union byte_def adic_addr;
#define adic adic_addr.byte
#define ilvl0_adic adic_addr.bit.b0 /* Interrupt priority level select bit */
#define ilvl1_adic adic_addr.bit.b1 /* Interrupt priority level select bit */
#define ilvl2_adic adic_addr.bit.b2 /* Interrupt priority level select bit */
#define ir_adic adic_addr.bit.b3 /* Interrupt request bit */
/*------------------------------------------------------
UART2 transmit interrupt control register
------------------------------------------------------*/
union byte_def s2tic_addr;
#define s2tic s2tic_addr.byte
#define ilvl0_s2tic s2tic_addr.bit.b0 /* Interrupt priority level select bit */
#define ilvl1_s2tic s2tic_addr.bit.b1 /* Interrupt priority level select bit */
#define ilvl2_s2tic s2tic_addr.bit.b2 /* Interrupt priority level select bit */
#define ir_s2tic s2tic_addr.bit.b3 /* Interrupt request bit */
/*------------------------------------------------------
UART2 receive interrupt control register
------------------------------------------------------*/
union byte_def s2ric_addr;
#define s2ric s2ric_addr.byte
#define ilvl0_s2ric s2ric_addr.bit.b0 /* Interrupt priority level select bit */
#define ilvl1_s2ric s2ric_addr.bit.b1 /* Interrupt priority level select bit */
#define ilvl2_s2ric s2ric_addr.bit.b2 /* Interrupt priority level select bit */
#define ir_s2ric s2ric_addr.bit.b3 /* Interrupt request bit */
/*------------------------------------------------------
UART0 transmit interrupt control register
------------------------------------------------------*/
union byte_def s0tic_addr;
#define s0tic s0tic_addr.byte
#define ilvl0_s0tic s0tic_addr.bit.b0 /* Interrupt priority level select bit */
#define ilvl1_s0tic s0tic_addr.bit.b1 /* Interrupt priority level select bit */
#define ilvl2_s0tic s0tic_addr.bit.b2 /* Interrupt priority level select bit */
#define ir_s0tic s0tic_addr.bit.b3 /* Interrupt request bit */
/*------------------------------------------------------
UART0 receive interrupt control register
------------------------------------------------------*/
union byte_def s0ric_addr;
#define s0ric s0ric_addr.byte
#define ilvl0_s0ric s0ric_addr.bit.b0 /* Interrupt priority level select bit */
#define ilvl1_s0ric s0ric_addr.bit.b1 /* Interrupt priority level select bit */
#define ilvl2_s0ric s0ric_addr.bit.b2 /* Interrupt priority level select bit */
#define ir_s0ric s0ric_addr.bit.b3 /* Interrupt request bit */
/*------------------------------------------------------
UART1 transmit interrupt control register
------------------------------------------------------*/
union byte_def s1tic_addr;
#define s1tic s1tic_addr.byte
#define ilvl0_s1tic s1tic_addr.bit.b0 /* Interrupt priority level select bit */
#define ilvl1_s1tic s1tic_addr.bit.b1 /* Interrupt priority level select bit */
#define ilvl2_s1tic s1tic_addr.bit.b2 /* Interrupt priority level select bit */
#define ir_s1tic s1tic_addr.bit.b3 /* Interrupt request bit */
/*------------------------------------------------------
UART1 receive interrupt control register
------------------------------------------------------*/
union byte_def s1ric_addr;
#define s1ric s1ric_addr.byte
#define ilvl0_s1ric s1ric_addr.bit.b0 /* Interrupt priority level select bit */
#define ilvl1_s1ric s1ric_addr.bit.b1 /* Interrupt priority level select bit */
#define ilvl2_s1ric s1ric_addr.bit.b2 /* Interrupt priority level select bit */
#define ir_s1ric s1ric_addr.bit.b3 /* Interrupt request bit */
/*------------------------------------------------------
Timer A0 interrupt control register
------------------------------------------------------*/
union byte_def ta0ic_addr;
#define ta0ic ta0ic_addr.byte
#define ilvl0_ta0ic ta0ic_addr.bit.b0 /* Interrupt priority level select bit */
#define ilvl1_ta0ic ta0ic_addr.bit.b1 /* Interrupt priority level select bit */
#define ilvl2_ta0ic ta0ic_addr.bit.b2 /* Interrupt priority level select bit */
#define ir_ta0ic ta0ic_addr.bit.b3 /* Interrupt request bit */
/*------------------------------------------------------
Timer A1 interrupt control register
------------------------------------------------------*/
union byte_def ta1ic_addr;
#define ta1ic ta1ic_addr.byte
#define ilv?? 快捷鍵說明
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