/**********************************************************************
;                                                                    
;  FILE        :pmset.h                                      
;  DATE        :2005-6-10 18:35                                    
;  DESCRIPTION :Main Program                                          
;  CPU TYPE    :Other                                                 
;                                                                     
;  This file is coded by RSBJ WRD     
;                                                                     
**********************************************************************/
#ifndef PMCMSET
#define PMCMSET
#include "typedefine.h"
#include "sfr26a.h"


#define PM0_SWRSTENABLE		(0x08)
#define PM0_SWRSTDISABLE	(0x00)

#define PM1_FLASHUSE		(0x01)
#define PM1_FLASHNOUSE		(0x00)
#define PM1_WDTRST		(0x04)
#define PM1_WDTINT		(0x00)
#define PM1_WAITSTSINSERT	(0x80)
#define PM1_WAITSTSNOINSERT	(0x00)




#define CM0_NOOUPUTCLK		(0x00)
#define CM0_FCOUTPUT		(0x01)
#define CM0_F8OUTPUT		(0x02)
#define CM0_F32OUTPUT		(0x03)
#define CM0_WAITSTOPCLK		(0x04)
#define CM0_WAITNOSTOPCLK	(0x00)
#define CM0_SUBCLKCAPHIGH	(0x08)
#define CM0_SUBCLKCAPLOW	(0x00)
#define CM0_SUBCLKSEL		(0x10)
#define CM0_SUBCLKNOSEL		(0x00)
#define CM0_MAINCLKSTOP		(0x20)
#define CM0_MAINCLKRUN		(0x00)
#define CM0_MAINCLK8DIV		(0x40)
#define CM0_MAINCLKNO8DIV	(0x00)
#define CM0_SUBASSYSCLK		(0x80)
#define CM0_NONSUBASSYSCLK	(0x00)

#define CM1_STOPCLK		(0x01)
#define CM1_CLKRUN		(0x00)
#define CM1_PLLCLK		(0x02)
#define CM1_MAINCLK		(0x00)
#define CM1_CLKCAPHIGH		(0x20)
#define CM1_CLKCAPLOW		(0x00)
#define CM1_MAINNODIV		(0x00)
#define CM1_MAINDIV2		(0x40)
#define CM1_MAINDIV4		(0x80)
#define CM1_MAINDIV16		(0xc0)

#define ROCR_ROCF1		(0x00)
#define ROCR_ROCF2		(0x01)
#define ROCR_ROCF3		(0x03)
#define ROCR_DIV2		(0x04)
#define ROCR_DIV4		(0x08)
#define ROCR_DIV8		(0x0c)

#define CM2_REOSCDETEN		(0x01)
#define CM2_REOSCDETDIS		(0x00)
#define CM2_ROCSEL		(0x02)
#define CM2_NOROC		(0x00)

#define PMSET(pmr,pm_atr)		prc1 = 1,pmr = pm_atr, prc1 = 0

#define CMSET(cmr,cm_atr)		prc0 = 1,cmr = cm_atr, prc0 = 0

#define PCLKSET(pclkmode)		prc0 = 1,pclkr = pclkmode, prc0 = 0

/*
PM /CM initialization
1. no software reset
2. flash data access disable
3. wdt ovf interrupt
*/

#include "delay.h"
#define PM_CM_INI	{\
			prc1 = 1, pm0 = 0, pm1 = 0x08, prc1 = 0;\
			prc0 = 1, cm0 =0, cm1 = 0, cm2 = 0, prc0 =0;\
			prc0 = 1,  plc0 = 0x12, prc0 = 0;\
			delay(100);\
			prc1 = 1, pm2 = 0, prc1 = 0;\
			delay(100);\
			prc0 =1, plc0 |= 0x80, prc0 = 0;\
			delay(50000),delay(50000);\
			prc0 = 1, cm1 |= 0x02, prc0 = 0;\
			prc0 = 1, pclkr |= 0x03, prc0 = 0;\
			}
#define CPUCLK		(16000L) // 16kkHz
#endif

//prc0 = 1, pclkr = 0x03, prc0 = 0;\
//prc0 = 1,  plc0 = 0x22, prc0 = 0;\