mdo = mgmtDir;		outs(port, mdo);		microdelay(1);		outs(port, mdo|mgmtClk);		microdelay(1);		outs(port, mdo);		microdelay(1);	}}static intmiir(int port, int phyad, int regad){	int data, w;	w = (STATUS(port)>>13) & 0x07;	COMMAND(port, SelectRegisterWindow, Wdiagnostic);	port += PhysicalMgmt;	/*	 * Preamble;	 * ST+OP+PHYAD+REGAD;	 * TA + 16 data bits.	 */	miimdo(port, 0xFFFFFFFF, 32);	miimdo(port, 0x1800|(phyad<<5)|regad, 14);	data = miimdi(port, 18);	port -= PhysicalMgmt;	COMMAND(port, SelectRegisterWindow, w);	if(data & 0x10000)		return -1;	return data & 0xFFFF;}static voidscanphy(int port){	int i, x;	for(i = 0; i < 32; i++){		if((x = miir(port, i, 2)) == -1 || x == 0)			continue;		x <<= 6;		x |= miir(port, i, 3)>>10;		XCVRDEBUG("phy%d: oui %uX reg1 %uX\n", i, x, miir(port, i, 1));		USED(x);	}}#ifdef notdefstatic struct xxx {	int	available;	int	next;} xxx[8] = {	{ base10TAvailable,	1, },		/* xcvr10BaseT	-> xcvrAui */	{ auiAvailable,		3, },		/* xcvrAui	-> xcvr10Base2 */	{ 0, -1, },	{ coaxAvailable,	-1, },		/* xcvr10Base2	-> nowhere */	{ baseTXAvailable,	5, },		/* xcvr100BaseTX-> xcvr100BaseFX */	{ baseFXAvailable,	-1, },		/* xcvr100BaseFX-> nowhere */	{ miiConnector,		-1, },		/* xcvrMii	-> nowhere */	{ 0, -1, },};#endif /* notdef */static struct {	char *name;	int avail;	int xcvr;} media[] = {	"10BaseT",	base10TAvailable,	xcvr10BaseT,	"10Base2",	coaxAvailable,		xcvr10Base2,	"100BaseTX",	baseTXAvailable,	xcvr100BaseTX,	"100BaseFX",	baseFXAvailable,	xcvr100BaseFX,	"aui",		auiAvailable,		xcvrAui,	"mii",		miiConnector,		xcvrMii};static intautoselect(int port, int xcvr, int is9){	int media, x;	USED(xcvr);	/*	 * Pathetic attempt at automatic media selection.	 * Really just to get the Fast Etherlink 10BASE-T/100BASE-TX	 * cards operational.	 * It's a bonus if it works for anything else.	 */	if(is9){		COMMAND(port, SelectRegisterWindow, Wsetup);		x = ins(port+ConfigControl);		media = 0;		if(x & base10TAvailable9)			media |= base10TAvailable;		if(x & coaxAvailable9)			media |= coaxAvailable;		if(x & auiAvailable9)			media |= auiAvailable;	}	else{		COMMAND(port, SelectRegisterWindow, Wfifo);		media = ins(port+ResetOptions);	}	XCVRDEBUG("autoselect: media %uX\n", media);	if(media & miiConnector)		return xcvrMii;	COMMAND(port, SelectRegisterWindow, Wdiagnostic);	XCVRDEBUG("autoselect: media status %uX\n", ins(port+MediaStatus));	if(media & baseTXAvailable){		/*		 * Must have InternalConfig register.		 */		setxcvr(port, xcvr100BaseTX, is9);		COMMAND(port, SelectRegisterWindow, Wdiagnostic);		x = ins(port+MediaStatus) & ~(dcConverterEnabled|jabberGuardEnable);		outs(port+MediaStatus, linkBeatEnable|x);		delay(10);		if(ins(port+MediaStatus) & linkBeatDetect)			return xcvr100BaseTX;		outs(port+MediaStatus, x);	}	if(media & base10TAvailable){		setxcvr(port, xcvr10BaseT, is9);		COMMAND(port, SelectRegisterWindow, Wdiagnostic);		x = ins(port+MediaStatus) & ~dcConverterEnabled;		outs(port+MediaStatus, linkBeatEnable|jabberGuardEnable|x);		delay(100);		XCVRDEBUG("autoselect: 10BaseT media status %uX\n", ins(port+MediaStatus));		if(ins(port+MediaStatus) & linkBeatDetect)			return xcvr10BaseT;		outs(port+MediaStatus, x);	}	/*	 * Botch.	 */	return autoSelect;}static inteepromdata(int port, int offset){	COMMAND(port, SelectRegisterWindow, Wsetup);	while(EEPROMBUSY(port))		;	EEPROMCMD(port, EepromReadRegister, offset);	while(EEPROMBUSY(port))		;	return EEPROMDATA(port);}intetherelnk3reset(Ether* ether){	int anar, anlpar, busmaster, did, i, j, phyaddr, port, rxearly, rxstatus9, x, xcvr;	Block *bp, **bpp;	Adapter *ap;	uchar ea[Eaddrlen];	Ctlr *ctlr;	static int scandone;	char *p;	/*	 * Scan for adapter on PCI, EISA and finally	 * using the little ISA configuration dance.	 */	if(scandone == 0){		tcm59Xpci();		tcm5XXeisa();		tcm509isa();		scandone = 1;	}	/*	 * Any adapter matches if no ether->port is supplied,	 * otherwise the ports must match.	 */	port = 0;	bpp = &adapter;	for(bp = *bpp; bp; bp = bp->next){		ap = (Adapter*)bp->rp;		if(ether->port == 0 || ether->port == ap->port){			port = ap->port;			ether->irq = ap->irq;			ether->tbdf = ap->tbdf;			*bpp = bp->next;			freeb(bp);			break;		}		bpp = &bp->next;	}	if(port == 0 && (port = tcm5XXpcmcia(ether)) == 0)		return -1;	/*	 * Read the DeviceID from the EEPROM, it's at offset 0x03,	 * and do something depending on capabilities.	 */	switch(did = eepromdata(port, 0x03)){	case 0x9000:	case 0x9001:	case 0x9005:	case 0x9050:	case 0x9051:	case 0x9055:		if(BUSTYPE(ether->tbdf) != BusPCI)			goto buggery;		busmaster = 2;		goto vortex;	case 0x5900:	case 0x5920:	case 0x5950:	case 0x5951:	case 0x5952:	case 0x5970:	case 0x5971:	case 0x5972:		busmaster = 1;	vortex:		COMMAND(port, SelectRegisterWindow, Wfifo);		xcvr = inl(port+InternalConfig) & (autoSelect|xcvrMask);		rxearly = 8188;		rxstatus9 = 0;		break;	buggery:	default:		busmaster = 0;		COMMAND(port, SelectRegisterWindow, Wsetup);		x = ins(port+AddressConfig);		xcvr = ((x & xcvrMask9)>>14)<<20;		if(x & autoSelect9)			xcvr |= autoSelect;		rxearly = 2044;		rxstatus9 = 1;		break;	}	/*	 * Check if the adapter's station address is to be overridden.	 * If not, read it from the EEPROM and set in ether->ea prior to loading the	 * station address in Wstation. The EEPROM returns 16-bits at a time.	 */	memset(ea, 0, Eaddrlen);	if(memcmp(ea, ether->ea, Eaddrlen) == 0){		for(i = 0; i < Eaddrlen/2; i++){			x = eepromdata(port, i);			ether->ea[2*i] = x>>8;			ether->ea[2*i+1] = x;		}	}	COMMAND(port, SelectRegisterWindow, Wstation);	for(i = 0; i < Eaddrlen; i++)		outb(port+i, ether->ea[i]);	/*	 * Enable the transceiver if necessary and determine whether	 * busmastering can be used. Due to bugs in the first revision	 * of the 3C59[05], don't use busmastering at 10Mbps.	 */	XCVRDEBUG("reset: xcvr %uX\n", xcvr);	/*	 * Allow user to specify desired media in plan9.ini	 */	for(i = 0; i < ether->nopt; i++){		if(cistrncmp(ether->opt[i], "media=", 6) != 0)			continue;		p = ether->opt[i]+6;		for(j = 0; j < nelem(media); j++)			if(cistrcmp(p, media[j].name) == 0)				xcvr = media[j].xcvr;	}	/* * forgive me, but i am weak */if(did == 0x9055){   xcvr = xcvrMii;   XCVRDEBUG("9055 reset ops 0x%uX\n",	ins(port+ResetOp905B));}else	if(xcvr & autoSelect)		xcvr = autoselect(port, xcvr, rxstatus9);	XCVRDEBUG("autoselect returns: xcvr %uX, did 0x%uX\n", xcvr, did);	switch(xcvr){	case xcvrMii:		/*		 * Quick hack.		scanphy(port);		 */		phyaddr = 24;for(i = 0; i < 7; i++)    XCVRDEBUG(" %2.2uX", miir(port, phyaddr, i));XCVRDEBUG("\n");{	int phystat, timeo;	for(timeo = 0; timeo < 30; timeo++){		phystat = miir(port, phyaddr, 0x01);		if(phystat & 0x20)			break;		XCVRDEBUG(" %2.2uX", phystat);		delay(100);	}	XCVRDEBUG(" %2.2uX", miir(port, phyaddr, 0x01));	XCVRDEBUG("\n");}		anar = miir(port, phyaddr, 0x04);		anlpar = miir(port, phyaddr, 0x05) & 0x03E0;		anar &= anlpar;		miir(port, phyaddr, 0x00);		XCVRDEBUG("mii an: %uX anlp: %uX r0:%uX r1:%uX\n",			anar, anlpar, miir(port, phyaddr, 0x00),			miir(port, phyaddr, 0x01));		for(i = 0; i < ether->nopt; i++){			if(cistrcmp(ether->opt[i], "fullduplex") == 0)				anar |= 0x0100;			else if(cistrcmp(ether->opt[i], "100BASE-TXFD") == 0)				anar |= 0x0100;			else if(cistrcmp(ether->opt[i], "force100") == 0)				anar |= 0x0080;		}		XCVRDEBUG("mii anar: %uX\n", anar);		if(anar & 0x0100){		/* 100BASE-TXFD */			ether->mbps = 100;			setfullduplex(port);		}		else if(anar & 0x0200)		/* 100BASE-T4 */			;		else if(anar & 0x0080)		/* 100BASE-TX */			ether->mbps = 100;		else if(anar & 0x0040)		/* 10BASE-TFD */			setfullduplex(port);		else				/* 10BASE-T */			;		break;	case xcvr100BaseTX:	case xcvr100BaseFX:		COMMAND(port, SelectRegisterWindow, Wfifo);		x = inl(port+InternalConfig) & ~ramPartitionMask;		outl(port+InternalConfig, x|ramPartition1to1);		COMMAND(port, SelectRegisterWindow, Wdiagnostic);		x = ins(port+MediaStatus) & ~(dcConverterEnabled|jabberGuardEnable);		x |= linkBeatEnable;		outs(port+MediaStatus, x);		if(x & dataRate100)			ether->mbps = 100;		break;	case xcvr10BaseT:		/*		 * Enable Link Beat and Jabber to start the		 * transceiver.		 */		COMMAND(port, SelectRegisterWindow, Wdiagnostic);		x = ins(port+MediaStatus) & ~dcConverterEnabled;		x |= linkBeatEnable|jabberGuardEnable;		outs(port+MediaStatus, x);		if((did & 0xFF00) == 0x5900)			busmaster = 0;		break;	case xcvr10Base2:		COMMAND(port, SelectRegisterWindow, Wdiagnostic);		x = ins(port+MediaStatus) & ~(linkBeatEnable|jabberGuardEnable);		outs(port+MediaStatus, x);		/*		 * Start the DC-DC converter.		 * Wait > 800 microseconds.		 */		COMMAND(port, EnableDcConverter, 0);		delay(1);		break;	}	/*	 * Wop is the normal operating register set.	 * The 3C59[0257] adapters allow access to more than one register window	 * at a time, but there are situations where switching still needs to be	 * done, so just do it.	 * Clear out any lingering Tx status.	 */	COMMAND(port, SelectRegisterWindow, Wop);	while(inb(port+TxStatus))		outb(port+TxStatus, 0);	/*	 * Allocate a controller structure, clear out the	 * adapter statistics, clear the statistics logged into ctlr	 * and enable statistics collection. Xcvr is needed in order	 * to collect the BadSSD statistics.	 */	ether->ctlr = malloc(sizeof(Ctlr));	ctlr = ether->ctlr;	ilock(&ctlr->wlock);	ctlr->xcvr = xcvr;	statistics(ether);	memset(ctlr->stats, 0, sizeof(ctlr->stats));	ctlr->busmaster = busmaster;	ctlr->xcvr = xcvr;	ctlr->rxstatus9 = rxstatus9;	ctlr->rxearly = rxearly;	if(rxearly >= 2048)		ctlr->ts = 2;	COMMAND(port, StatisticsEnable, 0);	/*	 * Allocate any receive buffers.	 */	switch(ctlr->busmaster){	case 2:		ctlr->dnenabled = 1;		/*		 * 10MUpldBug.		 * Disabling is too severe, can use receive busmastering at		 * 100Mbps OK, but how to tell which rate is actually being used -		 * the 3c905 always seems to have dataRate100 set?		 * Believe the bug doesn't apply if upRxEarlyEnable is set		 * and the threshold is set such that uploads won't start		 * until the whole packet has been received.		 */		ctlr->upenabled = 1;		x = eepromdata(port, 0x0F);		if(!(x & 0x01))			outl(port+PktStatus, upRxEarlyEnable);		if(ctlr->upenabled || ctlr->dnenabled){			ctlr->nup = Nup;			ctlr->ndn = Ndn;			init905(ctlr);		}		else			ctlr->rbp = rbpalloc(allocb);		outl(port+TxFreeThresh, HOWMANY(ETHERMAXTU, 256));		break;	default:		ctlr->rbp = rbpalloc(allocb);		break;	}	/*	 * Set a base TxStartThresh which will be incremented	 * if any txUnderrun errors occur and ensure no RxEarly	 * interrupts happen.	 */	ctlr->txthreshold = ETHERMAXTU/2;	COMMAND(port, SetTxStartThresh, ctlr->txthreshold>>ctlr->ts);	COMMAND(port, SetRxEarlyThresh, rxearly>>ctlr->ts);	iunlock(&ctlr->wlock);	/*	 * Linkage to the generic ethernet driver.	 */	ether->port = port;	ether->attach = attach;	ether->transmit = transmit;	ether->interrupt = interrupt;	ether->ifstat = ifstat;	ether->promiscuous = promiscuous;	ether->multicast = multicast;	ether->arg = ether;	return 0;}voidetherelnk3link(void){	addethercard("elnk3",  etherelnk3reset);	addethercard("3C509",  etherelnk3reset);}