\" integrator940t/target.ref - ARM Limited Integrator board's target-specific documentation\"\" Copyright 1999-2000 ARM Limited\" Copyright (c) 1999-2007 Wind River Systems, Inc.\"\" The right to copy, distribute, modify or otherwise make use\" of this software may be licensed only pursuant to the terms\" of an applicable Wind River license agreement.\"\" modification history\" --------------------\" 01r,04jul07,d_l  Add comments for passing the nvRamTest. \" 01q,18jan07,jb   add BSP VTS expected failures\" 01p,18jan06,jb   Fix documentation errors.\" 01o,09feb05,rec  convert from target.nr to target.ref.\" 01n,18aug04,scm  add 926E...\" 01m,29may03,rec  Power Management\" 01l,25feb03,jb   Adding 10220 support\" 01k,28may02,m_h  windML\" 01j,22mar02,rec  add ARMARCH5 references\" 01i,12mar02,m_h  correct 3800 baud to 38400, serial download quirks\" 01h,03dec01,rec  use generic driver for amba timer\" 01g,27nov01,rec  add reference to SPR-68958.\" 01f,10oct01,rec  integrator946es changes\" 01e,24aug01,dgp  change manual entry to reference entry per SPR 23698\" 01d,01may01,rec  clerical updates for 2.1.0 release.\" 01c,22feb00,jpd  minor corrections.\" 01b,13jan00,pr   updated with support for PCI and CPU740T.\" 01a,29nov99,ajb  created, derived from pid940t\"\TITLE integrator - ARM Limited IntegratorNAME `ARM Limited Integrator 7t/720/740/920T/926ej/940T/966es/946es'INTRODUCTIONThis reference entry provides board-specific information necessary to runVxWorks for the Integrator/AP with an ARM7T, ARM720T, ARM740T, ARM920T,ARM926EJ-S, ARM940T, ARM966es, or ARM946es core module.  Before using aboard with VxWorks, verify that the board runs in the factory configurationusing vendor-supplied ROMs and jumper settings and checking the RS-232connection.\sh ARM 940T/740T supportThe ARM 940T/740T cache/MPU support is used to create five memory regions:RAM, from 0  to LOCAL_MEM_SIZE, is cached.Note that if auto-sizing is added, this should adjust the size of thisregion correspondingly.The peripheral registers area, 0x10000000 (INTEGRATOR_PERIPHERAL_BASE) to0x20000000 (+INTEGRATOR_PERIPHERAL_SIZE), is uncached.Flash memory, starting at 0x24000000 (FLASH_ADRS) to 0x28000000(+INTEGRATOR_FLASH_SIZE), is uncached.The PCI address space region starting at 0x40000000 (INTEGRATOR_PCI_BASE)and finishing at 0x60000000.PCI IO area, config area and V360EPC registers, starting at 0x60000000(CPU_PCI_IO_ADRS) with CPU_PCI_IO_SIZE.All other regions are marked as invalid.\sh ARM 946es supportNOTE: Cache and MMU support for the 946e is not included in the architecturearchives for the 946e.  In order to obtain support for this core, it isnecessary to apply a patch (SPR-68958).  Consult WindSurf for this update.In addition to the memory regions defined for the 940T/740T, a sixthregion was created for the I-SSRAM memory region.  SSRAM is not enabledin this implementation.  The address region is defined for compatibilitywith systems that make use of SSRAM.  When not enabled, I-SSRAM addressspace is supported by system RAM.  This region is not used by eitherthe bootrom image or vxWorks.  The arm architecture requires that theexception vectors be located at address zero.  These vectors are placedat the bottom of this region.  This region is not cached.If D-SSRAM is used, a separate region will need to be defined insysLib.c.\sh ARM 102XE supportThe Core Module contains 2 MB of SSRAM at addresses 0x0 to 0x1fffff.This is configured as non-cacheable in sysLib.c. The Core Module SDRAMbegins at 0x200000 and vxWorks is configured to this memory rather thanSSRAM. The first 4 KB of SSRAM is reserved for the vector page. Theremaining SSRAM is avaiolable for application use. The 10220 also enablesauto sizing of the "Local" SDRAM, using the Core Module's SDRAM Controlregister to determine the size of the installed DIMM. Auto sizing onlyworks if the FPGA has successfully read the SPD information from the DIMM.Additionally, the 64 MB of "Private SDRAM" begining at location 0x30000000is available to the application.\sh ARM Firmware Suite Flash library conformanceThe AFS Flash library defines a mechanism for storing multiple imagesin Flash.  Each image can be identified by a record ('footer') which isstored at the end of the last Flash page used by the image.  A specialtype of image is used to store System Information Blocks ('SIB').  Thestandard Integrator boot-switcher uses a SIB to store system settings,such as core and bus clock speeds.The current BSP implementation doesn't use this information.  Instead,default values are chosen based on the CPU type.Flash is used to store the boot line parameters.  The location in Flashis defined by FLASH_ADRS.  This location in Flash can be changed bymodifying the block number in the definition of FLASH_ADRS (cf.integrator.h).  If INCLUDE_FLASH_SIB_FOOTER is defined, a footer iswritten at the end of this block to mark it as a Wind River Systemstype (TYPE_WRS_SIB).  This complies with the footer format used withAFS.\sh ROM Init codeMost of the code in romInit.s has been copied from uHAL's start-upmacros for the Integrator.  The board-specific code starts at HiPosn,where the Core Module remap flag is set.The code to calculate the size of SDRAM/SSRAM is copied directly fromuHAL's target.s.  As described in the comments, this leaves r1containing the size of RAM available.  This value is stored in thevariable integratorMemSize, but is not currently used.\sh Boot ROMsThe boot ROM image has been tested running from Flash.  The Makefileoptions are set to run the image from the start of Flash, 0x24000000.Two methods are available for loading the boot ROM image into targetflash.  The image may be loaded via the target serial port using thesupplied onboard boot Monitor program (ref: ARM Firmware SuiteReference Guide Chapt 4).  To load the target flash using this method,first build bootrom.hex using the Tornado.  Connect a null serial cablefrom the host serial port to the target Comm-1 port (closest to thedip-switches).  Open a terminal emulator program and configure it for38400 baud.  Power on the Integrator board and observe the ARM boot ROMbanner.  Download the flash image by typing "L <enter>" forload image.  Observe that the firmware deletes image zero.  SelectTransfer->SendTextFile, then browse to find the above hex file.  After thedownload initiates, type "<control-C>".  The terminal window will remainsilent for approximately two minutes, after which it will acknowledge thatthe download has completed and return a boot monitor prompt.Note: Some serial communication programs do not work properly if theydo not delay (approx 5ms) between sending characters.  Otherserial communication programs (such as Hyperterminal) may take anextraordinary amount of time (1 hour) to program the flash becausethey continuously time out from being unable to handle thecommunication protocol used by the ARM boot loader.The ARM Flash Utility (AFU) can be used to program the image intoFlash.  For this the bootrom needs to be generated and converted tobinary format:\bs   make bootrom.hex\beThe 4-pole DIL switch (S1) is used to control the boot settings.  TurnS1-1 off to boot from the start of Flash (0x24000000).  With S1-1 on,the boot switcher will run, in which case S1-4 determines whether toenter the boot monitor console (s1-4 on), or boot from a defined Flashimage (s1-4 off).The ARM debugger can be used to load this binary image onto Flash.For this choose a backend to connect to the target and start the ARMdebugger and set S1-1 on.  Load and run the semihosted AFU.AXF untilthere are some messages printed in the ARM debugger console windowwith a AFU> prompt.To see a listing of the images present in the Flash enter thefollowing command:\bs    AFU> list\beAssuming there is already an image with number 1 in Flash, the newbinary image can replace it with the following sequence of commands:\bs  AFU> Delete 1  AFU> Program 1 VxBoot c:\Tornado\target\config\integrator940t\bootrom.bin b0\beThe board can use this new image to boot from by setting S1-1 off.The boot monitor's BI command determines which Flash image to boot from.\sh JumpersThe following jumpers and switches are relevant to VxWorks configuration.\tsIntegratorJumper | Function | Description------------------------------S1 | Various | Four-pole DIL switches, S1-1 to S1-4S1-1 | Boot ROM select | This switch determines which device is mapped to low memory at startup | | (before the header card maps its own RAM to address 0).  When the | | switch is turned ON, the boot ROM is selected, causing the AFS Boot | | Monitor to execute.  Otherwise, Flash is selected.S1-4 | Boot switcher  | The boot monitor reads this switch at startup to determine whether to | | continue execution or jump to Flash.  If the switch is ON, the boot | | monitor prompt is generated; otherwise it reads the SIB to determine | | which Flash block to jump to.\teFor details of jumper configuration, see the board diagram at the endof this entry and in the hardware manual.FEATURESThe Integrator/AP is a platform for code development for embedded ARMprocessors.  It supports up to four processors for which it provides clocks,bus arbitration and interrupt handling.  It also provides Flash memory,boot ROM, 2 serial ports, readable switches and controllable LEDS.The Integrator/AP supports flexible expansion: - system bus expansion allowing core modules and logic modules to be added. - PCI bus bridge allowing PCI expansion cards to be mounted. - extension to the PCI bus allowing the Integrator/AP to be installed in a   CompactPCI card rack.The ARM7T, ARM720T, ARM740T, ARM926EJ-S, ARM920T, ARM940T, ARM946es,ARM966es, ARM10200, and ARM10220 daughter cards can be used with this BSP.\sh Supported FeaturesThe BSP supports and has been tested with PCI Ethernet cards containingthe Digital 21x4x Ethernet controller chip and/or the Intel 8255x Ethernetcontroller chip.\sh RAM sizeWith the exception of the ARM10200 and ARM10220 daughter cards, by default,the RAM size is set to 8 Mbytes (see LOCAL_MEM_SIZE).  Thisrequires an SDRAM DIMM of at least that size to be fitted to the coremodule header card.  The RAM size is configured by changingLOCAL_MEM_SIZE in config.h.  If this is reduced below 8 MBytes, othervalues may need changing, such as RAM_HIGH_ADRS.  The boot ROMinitialization code automatically reads the SPD data from the SDRAM toconfigure CM_SDRAM correctly (see CM940T User Guide, p. 4-14).However, this data is not currently used to derive a correct value forthe memory size.\sh Timestamp supportTwo AMBA timers are used by the system and auxiliary clockfacilities.  The system clock provides the timestamp timer as well.A third timer is used by power managmenet if enabled.\sh Unsupported FeaturesNo explicit support is provided for use of the JTAG port, EmbeddedICE,reading the switches, or any other PCI cards.  However, nothing is doneto prevent these features from being used (e.g. by the Multi-ICEbackend for Tornado).\sh Flash memory as NVRAMIf the BSP is configured with INCLUDE_FLASH defined, the standard VxWorksFlash support is included.\sh WindML SupportWindML 2.0 is supported on the integrator7tdmi.  Other integratorversions have not been tested with WindML and no WindML support isincluded for those BSPs.If the BSP is configured with INCLUDE_WINDML defined, support forWindML 2.0 is included.  Otherwise, WindML will not beenabled.  Additionally, the WindML drivers need to be configuredproperly as described in the "WindML Programmer's Guide",  Part#DOC-13632-ND-02.Modify the file target/src/ugl/config/uglInit.h as follows:\bs #define INCLUDE_IGS_GRAPHICS #define INCLUDE_CUSTOM_KEYBOARD #define INCLUDE_CUSTOM_POINTER #define JP3_ON\be