IX_PERFPROF_ACC_BUS_PMU_PEC4_SOUTH_PCI_SPLIT_SELECT = 70, /**< Select south pci split on PEC4*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC4_SOUTH_EXP_SPLIT_SELECT, /**< Select south expansion split on PEC4*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC4_SOUTH_APB_GRANT_SELECT, /**< Select south apb grant on PEC4*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC4_SOUTH_APB_XFER_SELECT, /**< Select south apb transfer on PEC4*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC4_SOUTH_GSKT_READ_SELECT, /**< Select south gasket read on PEC4*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC4_SOUTH_ABB_READ_SELECT, /**< Select south abb read on PEC4*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC4_SOUTH_PCI_READ_SELECT, /**< Select south pci read on PEC4*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC4_SOUTH_APB_READ_SELECT, /**< Select south apb read on PEC4*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC4_NORTH_ABB_SPLIT_SELECT, /**< Select north abb split on PEC4*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC4_NORTH_NPEA_REQ_SELECT, /**< Select north NPEA req on PEC4*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC4_NORTH_NPEA_READ_SELECT, /**< Select north NPEA read on PEC4*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC4_NORTH_NPEB_READ_SELECT, /**< Select north NPEB read on PEC4*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC4_NORTH_NPEC_READ_SELECT, /**< Select north NPEC read on PEC4*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC4_SDR_3_HIT_SELECT, /**< Select sdram3 hit on PEC4*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC4_SDR_4_HIT_SELECT, /**< Select sdram4 hit on PEC4*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC4_SDR_5_HIT_SELECT, /**< Select sdram5 hit on PEC4*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC4_SDR_6_HIT_SELECT, /**< Select sdram6 hit on PEC4*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC4_SDR_7_MISS_SELECT, /**< Select sdram7 miss on PEC4*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC4_SDR_0_MISS_SELECT, /**< Select sdram0 miss on PEC4*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC4_SDR_1_MISS_SELECT, /**< Select sdram1 miss on PEC4*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC4_SDR_2_MISS_SELECT /**< Select sdram2 miss on PEC4*/} IxPerfProfAccBusPmuEventCounters4;/** * @ingroup IxPerfProfAcc * * @enum IxPerfProfAccBusPmuEventCounters5 * * @brief Type of bus pmu events supported on PEC 5. * * Lists all bus pmu events. */typedef enum{ 	IX_PERFPROF_ACC_BUS_PMU_PEC5_SOUTH_ABB_GRANT_SELECT = 91, /**< Select south abb grant on PEC5*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC5_SOUTH_ABB_XFER_SELECT, /**< Select south abb transfer on PEC5*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC5_SOUTH_ABB_RETRY_SELECT, /**< Select south abb retry on PEC5*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC5_SOUTH_EXP_SPLIT_SELECT, /**< Select south expansion split on PEC5*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC5_SOUTH_ABB_REQ_SELECT, /**< Select south abb request on PEC5*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC5_SOUTH_ABB_OWN_SELECT, /**< Select south abb own on PEC5*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC5_SOUTH_BUS_IDLE_SELECT, /**< Select south bus idle on PEC5*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC5_NORTH_NPEB_GRANT_SELECT, /**< Select north NPEB grant on PEC5*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC5_NORTH_NPEB_XFER_SELECT, /**< Select north NPEB transfer on PEC5*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC5_NORTH_NPEB_RETRY_SELECT, /**< Select north NPEB retry on PEC5*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC5_NORTH_NPEB_REQ_SELECT, /**< Select north NPEB request on PEC5*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC5_NORTH_NPEB_OWN_SELECT, /**< Select north NPEB own on PEC5*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC5_NORTH_NPEB_WRITE_SELECT, /**< Select north NPEB write on PEC5*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC5_NORTH_NPEB_READ_SELECT, /**< Select north NPEB read on PEC5*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC5_SDR_4_HIT_SELECT, /**< Select north sdram4 hit on PEC5*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC5_SDR_5_HIT_SELECT, /**< Select north sdram5 hit on PEC5*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC5_SDR_6_HIT_SELECT, /**< Select north sdram6 hit on PEC5*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC5_SDR_7_HIT_SELECT, /**< Select north sdram7 hit on PEC5*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC5_SDR_0_MISS_SELECT, /**< Select north sdram0 miss on PEC5*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC5_SDR_1_MISS_SELECT, /**< Select north sdram1 miss on PEC5*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC5_SDR_2_MISS_SELECT, /**< Select north sdram2 miss on PEC5*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC5_SDR_3_MISS_SELECT /**< Select north sdram3 miss on PEC5*/} IxPerfProfAccBusPmuEventCounters5;/** * @ingroup IxPerfProfAcc * * @enum IxPerfProfAccBusPmuEventCounters6 * * @brief Type of bus pmu events supported on PEC 6. * * Lists all bus pmu events. */typedef enum{	IX_PERFPROF_ACC_BUS_PMU_PEC6_SOUTH_PCI_GRANT_SELECT = 113, /**< Select south pci grant on PEC6*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC6_SOUTH_PCI_XFER_SELECT, /**< Select south pci transfer on PEC6*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC6_SOUTH_PCI_RETRY_SELECT, /**< Select south pci retry on PEC6*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC6_SOUTH_PCI_SPLIT_SELECT, /**< Select south pci split on PEC6*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC6_SOUTH_PCI_REQ_SELECT, /**< Select south pci request on PEC6*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC6_SOUTH_PCI_OWN_SELECT, /**< Select south pci own on PEC6*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC6_SOUTH_BUS_WRITE_SELECT, /**< Select south pci write on PEC6*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC6_NORTH_NPEC_GRANT_SELECT, /**< Select north NPEC grant on PEC6*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC6_NORTH_NPEC_XFER_SELECT, /**< Select north NPEC transfer on PEC6*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC6_NORTH_NPEC_RETRY_SELECT, /**< Select north NPEC retry on PEC6*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC6_NORTH_NPEC_REQ_SELECT, /**< Select north NPEC request on PEC6*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC6_NORTH_NPEC_OWN_SELECT, /**< Select north NPEC own on PEC6*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC6_NORTH_NPEB_WRITE_SELECT, /**< Select north NPEB write on PEC6*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC6_NORTH_NPEC_READ_SELECT, /**< Select north NPEC read on PEC6*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC6_SDR_5_HIT_SELECT, /**< Select sdram5 hit on PEC6*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC6_SDR_6_HIT_SELECT, /**< Select sdram6 hit on PEC6*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC6_SDR_7_HIT_SELECT, /**< Select sdram7 hit on PEC6*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC6_SDR_0_HIT_SELECT, /**< Select sdram0 hit on PEC6*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC6_SDR_1_MISS_SELECT, /**< Select sdram1 miss on PEC6*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC6_SDR_2_MISS_SELECT, /**< Select sdram2 miss on PEC6*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC6_SDR_3_MISS_SELECT, /**< Select sdram3 miss on PEC6*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC6_SDR_4_MISS_SELECT /**< Select sdram4 miss on PEC6*/} IxPerfProfAccBusPmuEventCounters6;/** * @ingroup IxPerfProfAcc * * @enum IxPerfProfAccBusPmuEventCounters7 * * @brief Type of bus pmu events supported on PEC 7. * * Lists all bus pmu events. */typedef enum{ 	IX_PERFPROF_ACC_BUS_PMU_PEC7_SOUTH_APB_RETRY_SELECT = 135, /**< Select south apb retry on PEC7*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC7_SOUTH_APB_REQ_SELECT, /**< Select south apb request on PEC7*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC7_SOUTH_APB_OWN_SELECT, /**< Select south apb own on PEC7*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC7_SOUTH_BUS_READ_SELECT, /**< Select south bus read on PEC7*/ 	IX_PERFPROF_ACC_BUS_PMU_PEC7_CYCLE_COUNT_SELECT /**< Select cycle count on PEC7*/} IxPerfProfAccBusPmuEventCounters7;/**  * @ingroup IxPerfProfAcc  *  * @enum IxPerfProfAccXscalePmuEvent  *  * @brief Type of xscale pmu events supported  *  * Lists all xscale pmu events.  The maximum is a default value that the user  * should not exceed.  */ typedef enum {    IX_PERFPROF_ACC_XSCALE_PMU_EVENT_CACHE_MISS=0,      /**< cache miss*/     IX_PERFPROF_ACC_XSCALE_PMU_EVENT_CACHE_INSTRUCTION,/**< cache instruction*/     IX_PERFPROF_ACC_XSCALE_PMU_EVENT_STALL,     /**< event stall*/     IX_PERFPROF_ACC_XSCALE_PMU_EVENT_INST_TLB_MISS, /**< instruction tlb miss*/     IX_PERFPROF_ACC_XSCALE_PMU_EVENT_DATA_TLB_MISS, /**< data tlb miss*/     IX_PERFPROF_ACC_XSCALE_PMU_EVENT_BRANCH_EXEC,   /**< branch executed*/     IX_PERFPROF_ACC_XSCALE_PMU_EVENT_BRANCH_MISPREDICT, /**<branch mispredict*/     IX_PERFPROF_ACC_XSCALE_PMU_EVENT_INST_EXEC, /**< instruction executed*/     IX_PERFPROF_ACC_XSCALE_PMU_EVENT_FULL_EVERYCYCLE,   /**<                                                          *Stall - data cache                                                          *buffers are full. 							 							 *This event occurs 							 							 *every cycle where 							 							 *condition present 							 							 */     IX_PERFPROF_ACC_XSCALE_PMU_EVENT_ONCE,    /**<                                                *Stall - data cache buffers are 					       					   *full.This event occurs once 					       					   *for each contiguous sequence 					       					   */     IX_PERFPROF_ACC_XSCALE_PMU_EVENT_DATA_CACHE_ACCESS, /**< data cache access*/     IX_PERFPROF_ACC_XSCALE_PMU_EVENT_DATA_CACHE_MISS,   /**< data cache miss*/     IX_PERFPROF_ACC_XSCALE_PMU_EVENT_DATA_CACHE_WRITEBACK,  /**<data cache                                                              *writeback 						             						 */     IX_PERFPROF_ACC_XSCALE_PMU_EVENT_SW_CHANGE_PC,  /**< sw change pc*/     IX_PERFPROF_ACC_XSCALE_PMU_EVENT_MAX    /**< max value*/ } IxPerfProfAccXscalePmuEvent;/** * @ingroup IxPerfProfAcc * * @enum IxPerfProfAccStatus * * @brief Invalid Status Definitions   * * These status will be used by the APIs to return to the user. */typedef enum{	IX_PERFPROF_ACC_STATUS_SUCCESS = IX_SUCCESS,    /**< success*/	IX_PERFPROF_ACC_STATUS_FAIL = IX_FAIL,          /**< fail*/	IX_PERFPROF_ACC_STATUS_ANOTHER_UTIL_IN_PROGRESS,/**<another utility in 													 *progress													 */ 	IX_PERFPROF_ACC_STATUS_XCYCLE_MEASUREMENT_IN_PROGRESS, /**<measurement in															*progress															*/	IX_PERFPROF_ACC_STATUS_XCYCLE_NO_BASELINE, /**<no baseline yet*/	 	IX_PERFPROF_ACC_STATUS_XCYCLE_MEASUREMENT_REQUEST_OUT_OF_RANGE, /**< 															* Measurement chosen 															* is out of range															*/	IX_PERFPROF_ACC_STATUS_XCYCLE_PRIORITY_SET_FAIL,  /**<	                                                     * Cannot set 														 * task priority	                                                     */	IX_PERFPROF_ACC_STATUS_XCYCLE_THREAD_CREATE_FAIL, /**< 	                                                     * Fail create thread	                                                     */	IX_PERFPROF_ACC_STATUS_XCYCLE_PRIORITY_RESTORE_FAIL,  /**<	                                                         *cannot restore	                                                         *priority	                                                         */	IX_PERFPROF_ACC_STATUS_XCYCLE_MEASUREMENT_NOT_RUNNING, /**< xcycle not running*/   	IX_PERFPROF_ACC_STATUS_XSCALE_PMU_NUM_INVALID, /**< invalid number    	                                                *entered   	                                                */	IX_PERFPROF_ACC_STATUS_XSCALE_PMU_EVENT_INVALID, /**< invalid pmu event*/	IX_PERFPROF_ACC_STATUS_XSCALE_PMU_START_NOT_CALLED, /**<a start process							     						 *was not called 							     						 *before attempting							     						 *a stop or results							     						 *get							     						 */	IX_PERFPROF_ACC_STATUS_BUS_PMU_MODE_ERROR,  /**< invalid mode*/	IX_PERFPROF_ACC_STATUS_BUS_PMU_PEC1_ERROR,	/**< invalid pec1 entered*/	IX_PERFPROF_ACC_STATUS_BUS_PMU_PEC2_ERROR,	/**< invalid pec2 entered*/	IX_PERFPROF_ACC_STATUS_BUS_PMU_PEC3_ERROR,	/**< invalid pec3 entered*/	IX_PERFPROF_ACC_STATUS_BUS_PMU_PEC4_ERROR,	/**< invalid pec4 entered*/	IX_PERFPROF_ACC_STATUS_BUS_PMU_PEC5_ERROR,	/**< invalid pec5 entered*/	IX_PERFPROF_ACC_STATUS_BUS_PMU_PEC6_ERROR,	/**< invalid pec6 entered*/	IX_PERFPROF_ACC_STATUS_BUS_PMU_PEC7_ERROR,	/**< invalid pec7 entered*/	IX_PERFPROF_ACC_STATUS_BUS_PMU_START_NOT_CALLED, /**<a start process							     					 *was not called 							     					 *before attempting							     					 *a stop 													 */        IX_PERFPROF_ACC_STATUS_COMPONENT_NOT_SUPPORTED /**<Device or OS does not support component*/} IxPerfProfAccStatus;/** * @ingroup IxPerfProfAcc  *  * @enum IxPerfProfAccBusPmuMode * * @brief State selection of counters. * * These states will be used to determine the counters whose values are to be * read. */typedef enum{        IX_PERFPROF_ACC_BUS_PMU_MODE_HALT=0,   /**< halt state*/        IX_PERFPROF_ACC_BUS_PMU_MODE_SOUTH,    /**< south state*/        IX_PERFPROF_ACC_BUS_PMU_MODE_NORTH,    /**< north state*/        IX_PERFPROF_ACC_BUS_PMU_MODE_SDRAM    /**< SDRAM state*/} IxPerfProfAccBusPmuMode;/* * Section for prototypes interface functions *//** * @ingroup IxPerfProfAcc * * @fn ixPerfProfAccXscalePmuEventCountStart(   		BOOL clkCntDiv,   		UINT32 numEvents,  	 	IxPerfProfAccXscalePmuEvent pmuEvent1,   		IxPerfProfAccXscalePmuEvent pmuEvent2,   		IxPerfProfAccXscalePmuEvent pmuEvent3,   		IxPerfProfAccXscalePmuEvent pmuEvent4 ) * * @brief This API will start the clock and event counting * * @param	clkCntDiv BOOL [in] - enables/disables the clock divider. When  *			true, the divider is enabled and the clock count will be incremented *          by one at each 64th processor clock cycle.  When false, the divider *			is disabled and the clock count will be incremented at every  *			processor clock cycle. * @param 	numEvents UINT32 [in] - the number of PMU events that are to be  *	  		monitored as specified by the user. For clock counting only, this *	  	 	is set to zero. * @param 	pmuEvent1 @ref IxPerfProfAccXscalePmuEvent [in] - the specific PMU  *    		event to be monitored by counter 1 * @param 	pmuEvent2 @ref IxPerfProfAccXscalePmuEvent [in] - the specific PMU  *    		event to be monitored by counter 2  * @param	pmuEvent3 @ref IxPerfProfAccXscalePmuEvent [in] - the specific PMU  *    		event to be monitored by counter 3 * @param 	pmuEvent4 @ref IxPerfProfAccXscalePmuEvent [in] - the specific PMU  *    		event to be monitored by counter 4 * * This API will start the clock and xscale PMU event counting.  Up to  * 4 events can be monitored simultaneously. This API has to be called before * ixPerfProfAccXscalePmuEventCountStop can be called. * * @return  *	- IX_PERFPROF_ACC_STATUS_SUCCESS if clock and events counting are  *        started successfully *	- IX_PERFPROF_ACC_STATUS_FAIL if unable to start the counting *	- IX_PERFPROF_ACC_STATUS_XSCALE_PMU_NUM_INVALID if the number of events  *        specified is out of the valid range *	- IX_PERFPROF_ACC_STATUS_XSCALE_PMU_EVENT_INVALID if the value of the PMU  * 	  event specified does not exist * 	- IX_PERFPROF_ACC_STATUS_ANOTHER_UTIL_IN_PROGRESS - another utility is  * 	  running  *               * @li   Reentrant    : no * @li   ISR Callable : no * */PUBLIC IxPerfProfAccStatusixPerfProfAccXscalePmuEventCountStart(	BOOL clkCntDiv,	UINT32 numEvents,	IxPerfProfAccXscalePmuEvent pmuEvent1,	IxPerfProfAccXscalePmuEvent pmuEvent2,	IxPerfProfAccXscalePmuEvent pmuEvent3,	IxPerfProfAccXscalePmuEvent pmuEvent4 );/** * @ingroup IxPerfProfAcc * * @fn ixPerfProfAccXscalePmuEventCountStop (   IxPerfProfAccXscalePmuResults *eventCountStopResults)  * * @brief This API will stop the clock and event counting * * @param *eventCountStopResults @ref IxPerfProfAccXscalePmuResults [out] - pointer  *		  to struct containing results of counters and their overflow. It is the  * 		  users's responsibility to allocate the memory for this pointer.  * * This API will stop the clock and xscale PMU events that are being counted. * The results of the clock and events count will be stored in the pointer  * allocated by the user. It can only be called once  * IxPerfProfAccEventCountStart has been called.  * * @return  *      - IX_PERFPROF_ACC_STATUS_SUCCESS if clock and events counting are  *        stopped successfully *      - IX_PERFPROF_ACC_STATUS_XSCALE_PMU_START_NOT_CALLED if *        ixPerfProfAccXscalePmuEventCountStart is not called first. *               * @li   Reentrant    : no * @li   ISR Callable : no * */PUBLIC IxPerfProfAccStatus ixPerfProfAccXscalePmuEventCountStop(   IxPerfProfAccXscalePmuResults *eventCountStopResults); /** * @ingroup IxPerfProfAcc * * @fn ixPerfProfAccXscalePmuTimeSampStart(   UINT32 samplingRate,   BOOL clkCntDiv)  * * @brief Starts the time based sampling