/* $Id: xiic_l.c,v 1.2 2002/12/05 19:32:40 meinelte Exp $ *//********************************************************************************	XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS"*	AS A COURTESY TO YOU, SOLELY FOR USE IN DEVELOPING PROGRAMS AND*	SOLUTIONS FOR XILINX DEVICES.  BY PROVIDING THIS DESIGN, CODE,*	OR INFORMATION AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE,*	APPLICATION OR STANDARD, XILINX IS MAKING NO REPRESENTATION*	THAT THIS IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,*	AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE*	FOR YOUR IMPLEMENTATION.  XILINX EXPRESSLY DISCLAIMS ANY*	WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE*	IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR*	REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF*	INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS*	FOR A PARTICULAR PURPOSE.**	(c) Copyright 2002 Xilinx Inc.*	All rights reserved.*******************************************************************************//*****************************************************************************//**** @file xiic_l.c** This file contains low-level driver functions that can be used to access the* device.  The user should refer to the hardware device specification for more* details of the device operation.** <pre>* MODIFICATION HISTORY:** Ver	Who  Date     Changes* ----- --- -------  -----------------------------------------------* 1.01b jhl 5/13/02  First release* 1.01b jhl 10/14/02 Corrected bug in the receive function, the setup of the*		     interrupt status mask was not being done in the loop such*		     that a read would sometimes fail on the last byte because*		     the transmit error which should have been ignored was*		     being used.  This would leave an extra byte in the FIFO*		     and the bus throttled such that the next operation would*		     also fail.	 Also updated the receive function to not*		     disable the device after the last byte until after the*		     bus transitions to not busy which is more consistent*		     with the expected behavior.* 1.01c ecm 12/05/02 new rev* </pre>*****************************************************************************//***************************** Include Files *******************************/#include "xbasic_types.h"#include "xio.h"#include "xipif_v1_23_b.h"#include "xiic_l.h"/************************** Constant Definitions ***************************//**************************** Type Definitions *****************************//***************** Macros (Inline Functions) Definitions *******************//******************************************************************************** This macro clears the specified interrupt in the IPIF interrupt status* register.  It is non-destructive in that the register is read and only the* interrupt specified is cleared.  Clearing an interrupt acknowledges it.** @param    BaseAddress contains the IPIF registers base address.** @param    InterruptMask contains the interrupts to be disabled** @return** None.** @note** Signature: void XIic_mClearIisr(u32 BaseAddress,*				  u32 InterruptMask);*******************************************************************************/#define XIic_mClearIisr(BaseAddress, InterruptMask)		    \    XIIF_V123B_WRITE_IISR((BaseAddress),			    \	XIIF_V123B_READ_IISR(BaseAddress) & (InterruptMask))/******************************************************************************** This macro sends the address for a 7 bit address during both read and write* operations. It takes care of the details to format the address correctly.* This macro is designed to be called internally to the drivers.** @param    SlaveAddress contains the address of the slave to send to.** @param    Operation indicates XIIC_READ_OPERATION or XIIC_WRITE_OPERATION** @return** None.** @note** Signature: void XIic_mSend7BitAddr(u16 SlaveAddress, u8 Operation);*******************************************************************************/#define XIic_mSend7BitAddress(BaseAddress, SlaveAddress, Operation)	    \{									    \    u8 LocalAddr = (u8)(SlaveAddress << 1);			    \    LocalAddr = (LocalAddr & 0xFE) | (Operation);			    \    XIo_Out8(BaseAddress + XIIC_DTR_REG_OFFSET, LocalAddr);		    \}/************************** Function Prototypes ****************************/static unsigned RecvData (u32 BaseAddress, u8 * BufferPtr,			  unsigned ByteCount);static unsigned SendData (u32 BaseAddress, u8 * BufferPtr,			  unsigned ByteCount);/************************** Variable Definitions **************************//****************************************************************************//*** Receive data as a master on the IIC bus.  This function receives the data* using polled I/O and blocks until the data has been received.	 It only* supports 7 bit addressing and non-repeated start modes of operation.	The* user is responsible for ensuring the bus is not busy if multiple masters* are present on the bus.** @param    BaseAddress contains the base address of the IIC device.* @param    Address contains the 7 bit IIC address of the device to send the*	    specified data to.* @param    BufferPtr points to the data to be sent.* @param    ByteCount is the number of bytes to be sent.** @return** The number of bytes received.** @note** None*******************************************************************************/unsigned XIic_Recv (u32 BaseAddress, u8 Address,		    u8 * BufferPtr, unsigned ByteCount){	u8 CntlReg;	unsigned RemainingByteCount;	/* Tx error is enabled incase the address (7 or 10) has no device to answer	 * with Ack. When only one byte of data, must set NO ACK before address goes	 * out therefore Tx error must not be enabled as it will go off immediately	 * and the Rx full interrupt will be checked.  If full, then the one byte	 * was received and the Tx error will be disabled without sending an error	 * callback msg.	 */	XIic_mClearIisr (BaseAddress,			 XIIC_INTR_RX_FULL_MASK | XIIC_INTR_TX_ERROR_MASK |			 XIIC_INTR_ARB_LOST_MASK);	/* Set receive FIFO occupancy depth for 1 byte (zero based)	 */	XIo_Out8 (BaseAddress + XIIC_RFD_REG_OFFSET, 0);	/* 7 bit slave address, send the address for a read operation	 * and set the state to indicate the address has been sent	 */	XIic_mSend7BitAddress (BaseAddress, Address, XIIC_READ_OPERATION);	/* MSMS gets set after putting data in FIFO. Start the master receive	 * operation by setting CR Bits MSMS to Master, if the buffer is only one	 * byte, then it should not be acknowledged to indicate the end of data	 */	CntlReg = XIIC_CR_MSMS_MASK | XIIC_CR_ENABLE_DEVICE_MASK;	if (ByteCount == 1) {		CntlReg |= XIIC_CR_NO_ACK_MASK;	}	/* Write out the control register to start receiving data and call the	 * function to receive each byte into the buffer	 */	XIo_Out8 (BaseAddress + XIIC_CR_REG_OFFSET, CntlReg);	/* Clear the latched interrupt status for the bus not busy bit which must	 * be done while the bus is busy	 */	XIic_mClearIisr (BaseAddress, XIIC_INTR_BNB_MASK);	/* Try to receive the data from the IIC bus */	RemainingByteCount = RecvData (BaseAddress, BufferPtr, ByteCount);	/*	 * The receive is complete, disable the IIC device and return the number of	 * bytes that was received	 */	XIo_Out8 (BaseAddress + XIIC_CR_REG_OFFSET, 0);	/* Return the number of bytes that was received */	return ByteCount - RemainingByteCount;}/******************************************************************************** Receive the specified data from the device that has been previously addressed* on the IIC bus.  This function assumes that the 7 bit address has been sent* and it should wait for the transmit of the address to complete.** @param    BaseAddress contains the base address of the IIC device.* @param    BufferPtr points to the buffer to hold the data that is received.* @param    ByteCount is the number of bytes to be received.** @return** The number of bytes remaining to be received.** @note** This function does not take advantage of the receive FIFO because it is* designed for minimal code space and complexity.  It contains loops that* that could cause the function not to return if the hardware is not working.** This function assumes that the calling function will disable the IIC device* after this function returns.*******************************************************************************/static unsigned RecvData (u32 BaseAddress, u8 * BufferPtr, unsigned ByteCount){	u8 CntlReg;	u32 IntrStatusMask;	u32 IntrStatus;	/* Attempt to receive the specified number of bytes on the IIC bus */	while (ByteCount > 0) {		/* Setup the mask to use for checking errors because when receiving one		 * byte OR the last byte of a multibyte message an error naturally