?? fet140_dma_16.s43
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;******************************************************************************
// MSP-FET430P140 Demo - DMA0/1/2, USART1 SPI 3-Wire Master P1.x Exchange
//
// Description: SPI Master communicates at fast as possible, full-duplex with
// SPI Slave using 3-wire mode. The level on P1.4/5 is TX'ed and RX'ed to P1.0
// and P1.1. Master will pulse slave Reset on init to insure synch start.
// With data transfer driven directly by DMA - no CPU resouces used.
// DMA0 trigger from TX read, which uses MPY to shift read P1 left
// DMA1 trigger from MPY moves shifted P1 data to the USART0 TX buffer
// DMA2 trigger from USART RX buffer moves received data to P1
// Master mode is LPM0.
// ACLK = n/a, MCLK = SMCLK = DCO ~ 800kHz, ULCK = external
// //* Final Production MSP430F16x(x) Device Required *//
//
// fet140_dma15 fet140_dma16
// MSP430F169 Slave MSP430F169 Master
// ----------------- -----------------
// | XIN|- /|\| XIN|-
// | | | | |
// | XOUT|- --|RST XOUT|-
// | | /|\ | |
// | RST|--+<----|P5.0 |
// LED <-|P1.0 | | P1.4|<-
// LED <-|P1.1 | | P1.5|<-
// ->|P1.4 | | P1.0|-> LED
// ->|P1.5 | | P1.1|-> LED
// | SIMO0/P3.1|<-------|P5.1/SIMO1 |
// | SOMI0/P3.2|------->|P5.2/SOMI1 |
// | UCLK/P3.3|<-------|P5.3/UCLK1 |
;
;
; H. Grewal
; Texas Instruments Inc.
; Feb 2005
; Built with IAR Embedded Workbench Version: 3.21A
;******************************************************************************
#include <msp430x16x.h>
;------------------------------------------------------------------------------
ORG 01100h ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0A00h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop watchdog timer
mov.b #0h,&P1OUT ; P1.0/1 setup for LED output
mov.b #01h,&P1DIR ;
SetupP5 bis.b #0Eh,&P5SEL ; P5.1,2,3 SPI option select
bic.b #01h,&P5OUT
bis.b #01h,&P5DIR ; Reset Slave with P5.0
bic.b #01h,&P5DIR ;
SetupSPI1 bis.b #USPIE1,&ME2 ; Enable USART1 SPI
bis.b #CKPL+SSEL1+STC,&UTCTL1 ; SMCLK, 3-pin
bis.b #CHAR+SYNC+MM+SWRST,&UCTL1 ; 8-bit SPI Master
mov.b #02h,&UBR01 ; SMCLK/2 for baud rate
clr.b &UBR11 ; SMCLK/2 for baud rate
clr.b &UMCTL1 ; Clear modulation
bic.b #SWRST,&UCTL1 ; **Initialize USART state machine**
mov #0FFFh,R15 ; Time for slave to ready
L$1 dec R15 ;
jnz L$1 ;
TX_Init mov.w #P1IN_,&DMA0SA ; Src address
mov.w #OP2_,&DMA0DA ; Dst address = multiplier
mov.w #01h,&DMA0SZ ; Size in words
mov.w #DMADT_4+DMASBDB+DMALEVEL+DMAEN,&DMA0CTL ; Sng rpt, config
TX_load mov.w #RESHI_,&DMA1SA ; Src address = multiplier
mov.w #U1TXBUF_,&DMA1DA ; Dst address = UART TX Buffer
mov.w #01h,&DMA1SZ ; Size in words
mov.w #DMADT_4+DMASBDB+DMAEN,&DMA1CTL ; Sng, config
RX_store mov.w #U1RXBUF_,&DMA2SA ; Src address = UART RX Buffer
mov.w #P1OUT_,&DMA2DA ; Dst address = P1
mov.w #01h,&DMA2SZ ; Size in words
mov.w #DMADT_4+DMASBDB+DMAEN,&DMA2CTL ; Sng, config
mov.w #0FFFh,&MPY ; MPY first operand
mov.w #DMA2TSEL_9+DMA1TSEL_11+DMA0TSEL_10,&DMACTL0 ; URXIFG1, MPY, UTXIFG1
bis.b #LPM0+GIE,SR ; Enter LPM4
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
ORG 0FFFEh ; POR, ext. Reset, Watchdog, Flash
DW RESET ;
END
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