?? fet140_ta_14.s43
字號(hào):
;******************************************************************************
; MSP-FET430P140 Demo - Timer_A, Toggle P1.1/TA0, Up/Down Mode, 32kHz ACLK
;
; Description: Toggle P1.1 using hardware TA0 output. Timer_A is configured
; for up/down mode with CCR0 defining period, TA0 also output on P1.1. In
; this example, CCR0 is loaded with 5 and TA0 will toggle P1.1 at TACLK/2*5.
; Thus the output frequency on P1.1 will be the TACLK/20. No CPU or software
; resources required. Normal operating mode is LPM3.
; As coded with TACLK = ACLK, P1.1 output frequency = 32768/20 = 1.6384kHz
; ACLK = TACLK = 32kHz, MCLK = default DCO ~800kHz
; //* External watch crystal installed on XIN XOUT is required for ACLK *//
;
; MSP430F149
; -----------------
; /|\| XIN|-
; | | | 32kHz
; --|RST XOUT|-
; | |
; | P1.1|-->TA0 ACLK/20
;
; M. Buccini
; Texas Instruments Inc.
; Feb 2005
; Built with IAR Embedded Workbench Version: 3.21A
;******************************************************************************
#include <msp430x14x.h>
;-----------------------------------------------------------------------------
ORG 01100h ; Program Start
;-----------------------------------------------------------------------------
RESET mov.w #0A00h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupP1 bis.b #002h,&P1DIR ; P1.1 output
bis.b #002h,&P1SEL ; P1.1 option slect
SetupC0 mov.w #OUTMOD_4,&CCTL0 ; CCR0 toggle mode
mov.w #5,&CCR0 ;
SetupTA mov.w #TASSEL_1+MC_3,&TACTL ; ACLK, updown mode
;
Mainloop bis.w #LPM3,SR ; Enter LPM3
nop ; Required only for debugger
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
ORG 0FFFEh ; MSP430 RESET Vector
DW RESET ;
END
?? 快捷鍵說明
復(fù)制代碼
Ctrl + C
搜索代碼
Ctrl + F
全屏模式
F11
切換主題
Ctrl + Shift + D
顯示快捷鍵
?
增大字號(hào)
Ctrl + =
減小字號(hào)
Ctrl + -