decoder: </span></i></font></p>
      <p style="margin-bottom: 0pt; text-indent: 0.5in;" align="justify">
      <span style="font-weight: 700;"><font size="2" face="Verdana">IC
      MT8870/KT3170 serves as DTMF decoder <font color="#ff0000">
      <a href="http://www.alldatasheet.com/datasheet-pdf/pdf/77085/MITEL/MT8870/datasheet.pdf">
      (click here to download datasheet)</a></font>. This IC takes DTMF signal
      coming via telephone line and converts that signal into respective BCD
      number. It uses same oscillator frequency used in the remote section so
      same crystal oscillator with frequency of 3.85M Hz is used in this IC.</font></span></p>
      <p style="margin-bottom: 0pt;" align="justify">
      <font color="#003a85" size="2" face="Verdana"><i>
      <span style="font-weight: 700;">Working of IC&nbsp;MT8870:</span></i></font></p>
      <p style="margin-bottom: 0pt; text-indent: 0.5in;" align="justify">
      <span style="font-weight: 700;"><font size="2" face="Verdana">The MT-8870
      is a full DTMF Receiver that integrates both band split filter and decoder
      functions into a single 18-pin DIP. Its filter section uses switched
      capacitor technology for both the high and low group filters and for dial
      tone rejection. Its decoder uses digital counting techniques to detect and
      decode all 16 DTMF tone pairs into a 4-bit code. External component count
      is minimized by provision of an on-chip&nbsp;differential input amplifier,
      clock generator, and latched tri-state interface bus. Minimal external
      components required include a low-cost 3.579545 MHz crystal, a timing
      resistor, and a timing capacitor. The MT-8870-02 can also inhibit the
      decoding of fourth column digits.</font></span></p>
      <p class="MsoNormal" style="text-indent: 0.5in;" align="justify">
      <font face="Verdana"><b><span style="color: black;"><font size="2">MT-8870
      operating functions include a band split filter that &nbsp;separates the high
      and low tones of the received pair, and a digital decoder that verifies
      both the frequency and duration of the received tones before passing the
      resulting 4-bit code to the output bus.</font></span><span style="color: rgb(0, 58, 133); font-family: Helvetica-Bold;"><font size="2">&nbsp;</font></span></b></font></p>
      <p class="MsoNormal" align="justify">
      <span style="font-weight: 700; color: black;">
      <font size="2" face="Verdana">The low and high group tones are separated
      by applying the dual-tone signal to the inputs of two 6<sup>th</sup> order
      switched capacitor band pass filters with bandwidths that correspond to
      the bands enclosing the low and high group tones.</font></span></p>
      <p style="margin-bottom: 0pt; text-align: center;" align="center"><b>
      <font size="2" face="Verdana"><img src="Device%20Control%20Using%20Telephone%20%20ElectroSofts.com_files/blockdiagram8870.jpg" border="0" width="577" height="346"></font></b></p>
      <p style="margin-bottom: 0pt; text-align: center;" align="center"><i>
      <span style="font-weight: 700;"><font size="2" face="Verdana">Figure (F).Block
      diagram of IC&nbsp;MT8870</font></span></i></p>
      <p class="MsoNormal" style="text-indent: 0.5in;" align="justify">
      <font face="Verdana"><b><span style="color: black;"><font size="2">The
      filter also incorporates notches at 350 and 440 Hz, providing excellent
      dial tone rejection. Each filter output is followed by a single-order
      switched capacitor section that smoothes the signals prior to limiting.
      Signal limiting is performed by high gain comparators provided with
      hysteresis to prevent detection of unwanted low-level signals and noise.</font></span><span style="color: rgb(0, 58, 133); font-family: Helvetica-Bold;"><font size="2">&nbsp;</font></span><span style="color: black;"><font size="2">The
      MT-8870 decoder uses a digital counting technique to determine the
      frequencies of the limited tones and to verify that they correspond to
      standard DTMF frequencies. When the detector recognizes the simultaneous
      presence of two valid tones (known as signal condition), it raises the
      Early Steering flag (ESt). Any subsequent loss of signal condition will
      cause ESt to fall. Before a decoded tone pair is registered, the receiver
      checks for valid signal duration (referred to as character-
      recognition-condition). This check is performed by an external RC time
      constant driven by ESt. A short delay to allow the output latch to settle,
      the&nbsp;delayed steering output flag (StD) goes high, signaling that a
      received tone pair has been registered. The contents of the output latch
      are made available on the 4-bit output bus by raising the three state
      control input (OE) to logic high. Inhibit mode is enabled by a logic high
      input to pin 5 (INH). It inhibits the detection of 1633 Hz. </font></span>
      </b></font></p>
      <p class="MsoNormal" style="text-indent: 0.5in;" align="justify">
      <span style="font-weight: 700; color: black;">
      <font size="2" face="Verdana">The output code will remain the same as the
      previous detected code. On the M- 8870 models, this pin is tied to ground
      (logic low).</font></span></p>
      <p class="MsoNormal" style="text-indent: 0.5in;" align="justify">
      <span style="font-weight: 700; color: black;">
      <font size="2" face="Verdana">The input arrangement of the MT-8870
      provides a differential input operational amplifier as well as a bias
      source (VREF) to bias the inputs at mid-rail. Provision is made for
      connection of a feedback resistor to the op-amp output (GS) for gain
      adjustment. </font></span></p>
      <p style="margin-bottom: 0pt;" align="justify">
      <span style="font-weight: 700; color: black;">
      <font size="2" face="Verdana">The internal clock circuit is completed with
      the addition of a standard 3.579545 MHz crystal.</font></span></p>
      <p class="MsoNormal" style="text-indent: 0.5in;" align="justify">
      <span style="font-weight: 700; color: black;">
      <font size="2" face="Verdana">The input arrangement of the MT-8870
      provides a differential input operational amplifier as well as a bias
      source (VREF) to bias the inputs at mid-rail. Provision is made for
      connection of a feedback resistor to the op-amp output (GS) for gain
      adjustment. </font></span></p>
      <p style="margin-bottom: 0pt;" align="justify">
      <span style="font-weight: 700; color: black;">
      <font size="2" face="Verdana">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; The internal clock circuit is
      completed with the addition of a standard 3.579545 MHz crystal.</font></span></p>
      <p style="margin-bottom: 0pt;" align="justify"><font face="Verdana">
      <font size="2">&nbsp;</font><b><font size="2"><img src="Device%20Control%20Using%20Telephone%20%20ElectroSofts.com_files/blockdiagram.jpg" border="0" width="681" height="696"></font></b></font></p>
      <p style="margin-bottom: 0pt; text-align: center;" align="center">
      <span style="font-weight: 700; color: purple;">
      <font size="2" face="Verdana">Figure (D). BLOCK DIAGRAM OF THE SYSTEM</font></span></p>
      <p class="MsoNormal" align="justify"><b><font size="2" face="Verdana">
      Figure (D) shows the overall block diagram of&nbsp;"<i>Device control using the
      telephone</i>" construction. </font></b></p>
      <p style="margin-bottom: 0pt;" align="justify"><font face="Verdana"><b>
      <span style="color: rgb(0, 58, 133);"><font size="2">&nbsp;</font></span><font color="#003a85" size="2"><i><u>IC
      NE 555 timer:</u></i></font></b></font></p>
      <p style="margin-bottom: 0pt; text-indent: 0.5in;" align="justify">
      <span style="font-weight: 700;"><font size="2" face="Verdana">The NE555 is
      an integrated circuit that capable of&nbsp;producing accurate timing pulses.
      This IC is used as a multivibrater <font color="#ff0000">
      <a href="http://www.alldatasheet.com/datasheet-pdf/pdf/53594/FAIRCHILD/NE555/datasheet.pdf">
      (click here to download datasheet)</a></font>. By using this IC we can
      construct two types of multivibrater, monostable and astable. The
      monostable multivibrater produces a single pulse when a triggering pulse
      is applied to its triggering input. The astable multivibrater produces a
      train of pulses depending on the Resister-Capacitor combination wired
      around it. </font></span></p>
      <p style="margin-bottom: 0pt; text-indent: 0.5in;" align="justify">
      <span style="font-weight: 700;"><font size="2" face="Verdana">With a
      monostable operation, the time delay is controlled by one external
      resistor and one capacitor connected between Vcc-Discharge (R), and
      Threshold-Ground (C). With an astable operation, the frequency and pulse
      width are produced by two external resistors and one capacitor connected
      between Vcc-Discharge (R), Discharge-Threshold (R), and Threshold-Ground
      (C).</font></span></p>
      <p style="margin-bottom: 0pt; text-indent: 0.5in;" align="justify">
      <span style="font-weight: 700;"><font size="2" face="Verdana">&nbsp;</font></span></p>
      <p style="margin-bottom: 0pt; text-align: center;" align="center"><b>
      <font size="2" face="Verdana"><img src="Device%20Control%20Using%20Telephone%20%20ElectroSofts.com_files/blockdiagram555.jpg" border="0" width="442" height="341"></font></b></p>
      <p style="margin-bottom: 0pt; text-align: center;" align="center">
      <span style="font-weight: 700;"><font size="2" face="Verdana">Figure J. IC
      NE 555</font></span></p>
      <p style="margin-bottom: 0pt;" align="justify">
      <font size="2" face="Verdana">&nbsp;</font><font color="#003a85" size="2" face="Verdana"><i><u><span style="font-weight: 700;">74154&nbsp;
      4-16 line decoder/demultiplexer:</span></u></i></font></p>
      <p style="margin-bottom: 0pt;" align="justify"><b>
      <font size="2" face="Verdana">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IC 74154 is a 4-16 line decoder,
      it takes the 4 line BCD input and selects respective output one among the
      16 output lines <font color="#ff0000">
      <a href="http://www.alldatasheet.com/datasheet-pdf/pdf/7826/NSC/74154/datasheet.pdf">
      (click here to download datasheet)</a></font>. It is active low output IC
      so when any output line is selected it is indicated by active low signal,
      rest of the output lines will remain active high. This 4-line-to-16-line
      decoder utilizes TTL circuitry to decode four binary-coded inputs into one
      of sixteen mutually exclusive outputs when both the strobe inputs, G1 and
      G2, are low. The demultiplexing function is performed by using the 4 input
      lines to address the output line, passing data from one of the strobe
      inputs with the other strobe input low. When either strobe input is high,
      all outputs are high. These demultiplexer are ideally suited for
      implementing high-performance memory decoders.</font></b></p>
      <p style="margin-bottom: 0pt; text-align: center;" align="center"><b>
      <font size="2" face="Verdana"><img src="Device%20Control%20Using%20Telephone%20%20ElectroSofts.com_files/blockdiagram74154.jpg" border="0" width="315" height="278"></font></b></p>
      <p style="margin-bottom: 0pt; text-align: center;" align="center">
      <span style="font-weight: 700;"><font size="2" face="Verdana">Figure G. IC
      74154&nbsp;4-16 line decoder</font></span></p>
      <p style="margin-bottom: 0pt; text-indent: 0.5in;" align="justify">
      <span style="font-weight: 700;"><font size="2" face="Verdana">All inputs
      are buffered and input clamping diodes are provided to minimize
      transmission-line effects and thereby simplify system design.</font></span></p>
      <p style="margin-bottom: 0pt;">
      <span style="background: white none repeat scroll 0% 0%; font-weight: 700; color: rgb(0, 58, 133); -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial;">
      <font size="2" face="Verdana">TRUTH TABLE:</font></span></p>
      <p style="margin-bottom: 0pt; text-align: center;" align="center"><b>
      <font size="2" face="Verdana"><img src="Device%20Control%20Using%20Telephone%20%20ElectroSofts.com_files/truth74154.jpg" border="0" width="490" height="280"></font></b></p>
      <p style="margin-bottom: 0pt;" align="justify">
      <span style="font-weight: 700;"><font size="2" face="Verdana">&nbsp;</font></span><font color="#003a85" size="2" face="Verdana"><span style="font-weight: 700;"><i><u>74126
      Tri - State Buffer:</u></i></span></font></p>
      <p style="margin-bottom: 0pt; text-indent: 0.5in;" align="justify">
      <span style="font-weight: 700;"><font size="2" face="Verdana">This IC is a
      tri state buffer contains four independent gates each of which performs a
      non-inverting buffer function. The outputs have the 3-STATE feature
      <font color="#ff0000">
      <a href="http://www.alldatasheet.com/datasheet-pdf/pdf/51031/FAIRCHILD/74126/datasheet.pdf">
      (click here to download datasheet)</a></font>. When control signal is at
      high state, the outputs are nothing but the data present at its input
      terminals. When control signal is at low state, the outputs are held at
      high impedance state. So no output will be available at the output
      terminal.</font></span></p>
      <p style="margin-bottom: 0pt; text-align: center;" align="center"><b>
      <font size="2" face="Verdana"><img src="Device%20Control%20Using%20Telephone%20%20ElectroSofts.com_files/blockdiagram74126.jpg" border="0" width="347" height="273"></font></b></p>
      <p style="margin-bottom: 0pt; text-align: center;" align="center">
      <span style="font-weight: 700;"><font size="2" face="Verdana">Figure H. IC
      74126</font></span></p>
      <p style="margin-bottom: 0pt;" align="justify">
      <font size="2" face="Verdana">&nbsp;</font><font color="#003a85" size="2" face="Verdana"><i><u><span style="font-weight: 700;">IC
      7474 D-flip-flop:</span></u></i></font></p>
      <p style="margin-bottom: 0pt;" align="justify"><b>
      <font size="2" face="Verdana">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
IC 7474 is a conventional D-flip-flop IC. This IC consists of two D
flip-flops. These flip-flops are used to latch the data that present at
its input terminal <font color="#ff0000">
      <a href="http://www.alldatasheet.com/datasheet-pdf/pdf/50912/FAIRCHILD/DM7474N/datasheet.pdf">
      (click here to download datasheet)</a></font>. Each flip-flop has&nbsp;one
      data, one clock, one clear, one preset input terminals.&nbsp; </font></b></p>
      <p class="MsoNormal" style="text-align: center;" align="center"><b>
      <font size="2" face="Verdana"><img src="Device%20Control%20Using%20Telephone%20%20ElectroSofts.com_files/blockdiagram7474.jpg" border="0" width="363" height="325"></font></b></p>
      <p class="MsoNormal" style="text-align: center;" align="center">
      <span style="font-weight: 700;"><font size="2" face="Verdana">(Above figure
      shows a single D-flip-flop)</font></span></p>
      <p style="margin-bottom: 0pt;" align="justify">
      <font size="2" face="Verdana">&nbsp;</font><font color="#003a85" size="2" face="Verdana"><i><u><span style="font-weight: 700;">IC
      7447 BCD - seven segment decoder:</span></u></i></font></p>
      <p style="margin-bottom: 0pt; text-indent: 0.5in;" align="justify">
      <span style="font-weight: 700;"><font size="2" face="Verdana">The DM74LS47
      accepts four lines of BCD (8421) input data, generates their complements
      internally and decodes the data with seven AND/OR gates having
      open-collector outputs to drive indicator segments directly
      <font color="#ff0000">
      <a href="http://www.alldatasheet.com/datasheet-pdf/pdf/80214/NSC/DM7447A/datasheet.pdf">
      (click here to download datasheet)</a></font>. Each segment output is
      guaranteed to sink 24mA in the ON (LOW) state and withstand 15V in the OFF
      (HIGH) state with a maximum leakage current of 250 mA. Auxiliary inputs