?? 4433def.inc
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.equ INT1 = 7 ; External Interrupt Request 1 Enable
; GIFR - General Interrupt Flag register
.equ INTF0 = 6 ; External Interrupt Flag 0
.equ INTF1 = 7 ; External Interrupt Flag 1
; ***** EEPROM ***********************
; EEAR - EEPROM Read/Write Access
.equ EEAR0 = 0 ; EEPROM Read/Write Access bit 0
.equ EEAR1 = 1 ; EEPROM Read/Write Access bit 1
.equ EEAR2 = 2 ; EEPROM Read/Write Access bit 2
.equ EEAR3 = 3 ; EEPROM Read/Write Access bit 3
.equ EEAR4 = 4 ; EEPROM Read/Write Access bit 4
.equ EEAR5 = 5 ; EEPROM Read/Write Access bit 5
.equ EEAR6 = 6 ; EEPROM Read/Write Access bit 6
.equ EEAR7 = 7 ; EEPROM Read/Write Access bit 7
; EEDR - EEPROM Data Register
.equ EEDR0 = 0 ; EEPROM Data Register bit 0
.equ EEDR1 = 1 ; EEPROM Data Register bit 1
.equ EEDR2 = 2 ; EEPROM Data Register bit 2
.equ EEDR3 = 3 ; EEPROM Data Register bit 3
.equ EEDR4 = 4 ; EEPROM Data Register bit 4
.equ EEDR5 = 5 ; EEPROM Data Register bit 5
.equ EEDR6 = 6 ; EEPROM Data Register bit 6
.equ EEDR7 = 7 ; EEPROM Data Register bit 7
; EECR - EEPROM Control Register
.equ EERE = 0 ; EEPROM Read Enable
.equ EEWE = 1 ; EEPROM Write Enable
.equ EEMWE = 2 ; EEPROM Master Write Enable
.equ EERIE = 3 ; EEProm Ready Interrupt Enable
; ***** PORTB ************************
; PORTB - Data Register, Port B
.equ PORTB0 = 0 ;
.equ PB0 = 0 ; For compatibility
.equ PORTB1 = 1 ;
.equ PB1 = 1 ; For compatibility
.equ PORTB2 = 2 ;
.equ PB2 = 2 ; For compatibility
.equ PORTB3 = 3 ;
.equ PB3 = 3 ; For compatibility
.equ PORTB4 = 4 ;
.equ PB4 = 4 ; For compatibility
.equ PORTB5 = 5 ;
.equ PB5 = 5 ; For compatibility
; DDRB - Data Direction Register, Port B
.equ DDB0 = 0 ;
.equ DDB1 = 1 ;
.equ DDB2 = 2 ;
.equ DDB3 = 3 ;
.equ DDB4 = 4 ;
.equ DDB5 = 5 ;
; PINB - Input Pins, Port B
.equ PINB0 = 0 ;
.equ PINB1 = 1 ;
.equ PINB2 = 2 ;
.equ PINB3 = 3 ;
.equ PINB4 = 4 ;
.equ PINB5 = 5 ;
; ***** PORTC ************************
; PORTC - Port C Data Register
.equ PORTC0 = 0 ; Port C Data Register bit 0
.equ PC0 = 0 ; For compatibility
.equ PORTC1 = 1 ; Port C Data Register bit 1
.equ PC1 = 1 ; For compatibility
.equ PORTC2 = 2 ; Port C Data Register bit 2
.equ PC2 = 2 ; For compatibility
.equ PORTC3 = 3 ; Port C Data Register bit 3
.equ PC3 = 3 ; For compatibility
.equ PORTC4 = 4 ; Port C Data Register bit 4
.equ PC4 = 4 ; For compatibility
.equ PORTC5 = 5 ; Port C Data Register bit 5
.equ PC5 = 5 ; For compatibility
; DDRC - Port C Data Direction Register
.equ DDC0 = 0 ; Port C Data Direction Register bit 0
.equ DDC1 = 1 ; Port C Data Direction Register bit 1
.equ DDC2 = 2 ; Port C Data Direction Register bit 2
.equ DDC3 = 3 ; Port C Data Direction Register bit 3
.equ DDC4 = 4 ; Port C Data Direction Register bit 4
.equ DDC5 = 5 ; Port C Data Direction Register bit 5
; PINC - Port C Input Pins
.equ PINC0 = 0 ; Port C Input Pins bit 0
.equ PINC1 = 1 ; Port C Input Pins bit 1
.equ PINC2 = 2 ; Port C Input Pins bit 2
.equ PINC3 = 3 ; Port C Input Pins bit 3
.equ PINC4 = 4 ; Port C Input Pins bit 4
.equ PINC5 = 5 ; Port C Input Pins bit 5
; ***** PORTD ************************
; PORTD - Port D Data Register
.equ PORTD0 = 0 ; Port D Data Register bit 0
.equ PD0 = 0 ; For compatibility
.equ PORTD1 = 1 ; Port D Data Register bit 1
.equ PD1 = 1 ; For compatibility
.equ PORTD2 = 2 ; Port D Data Register bit 2
.equ PD2 = 2 ; For compatibility
.equ PORTD3 = 3 ; Port D Data Register bit 3
.equ PD3 = 3 ; For compatibility
.equ PORTD4 = 4 ; Port D Data Register bit 4
.equ PD4 = 4 ; For compatibility
.equ PORTD5 = 5 ; Port D Data Register bit 5
.equ PD5 = 5 ; For compatibility
.equ PORTD6 = 6 ; Port D Data Register bit 6
.equ PD6 = 6 ; For compatibility
.equ PORTD7 = 7 ; Port D Data Register bit 7
.equ PD7 = 7 ; For compatibility
; DDRD - Port D Data Direction Register
.equ DDD0 = 0 ; Port D Data Direction Register bit 0
.equ DDD1 = 1 ; Port D Data Direction Register bit 1
.equ DDD2 = 2 ; Port D Data Direction Register bit 2
.equ DDD3 = 3 ; Port D Data Direction Register bit 3
.equ DDD4 = 4 ; Port D Data Direction Register bit 4
.equ DDD5 = 5 ; Port D Data Direction Register bit 5
.equ DDD6 = 6 ; Port D Data Direction Register bit 6
.equ DDD7 = 7 ; Port D Data Direction Register bit 7
; PIND - Port D Input Pins
.equ PIND0 = 0 ; Port D Input Pins bit 0
.equ PIND1 = 1 ; Port D Input Pins bit 1
.equ PIND2 = 2 ; Port D Input Pins bit 2
.equ PIND3 = 3 ; Port D Input Pins bit 3
.equ PIND4 = 4 ; Port D Input Pins bit 4
.equ PIND5 = 5 ; Port D Input Pins bit 5
.equ PIND6 = 6 ; Port D Input Pins bit 6
.equ PIND7 = 7 ; Port D Input Pins bit 7
; ***** TIMER_COUNTER_0 **************
; TIMSK - Timer/Counter Interrupt Mask Register
.equ TOIE0 = 1 ; Timer/Counter0 Overflow Interrupt Enable
; TIFR - Timer/Counter Interrupt Flag register
.equ TOV0 = 1 ; Timer/Counter0 Overflow Flag
; TCCR0 - Timer/Counter0 Control Register
.equ CS00 = 0 ; Clock Select0 bit 0
.equ CS01 = 1 ; Clock Select0 bit 1
.equ CS02 = 2 ; Clock Select0 bit 2
; TCNT0 - Timer Counter 0
.equ TCNT00 = 0 ; Timer Counter 0 bit 0
.equ TCNT01 = 1 ; Timer Counter 0 bit 1
.equ TCNT02 = 2 ; Timer Counter 0 bit 2
.equ TCNT03 = 3 ; Timer Counter 0 bit 3
.equ TCNT04 = 4 ; Timer Counter 0 bit 4
.equ TCNT05 = 5 ; Timer Counter 0 bit 5
.equ TCNT06 = 6 ; Timer Counter 0 bit 6
.equ TCNT07 = 7 ; Timer Counter 0 bit 7
; ***** TIMER_COUNTER_1 **************
; TIMSK - Timer/Counter Interrupt Mask Register
.equ TICIE1 = 3 ; Timer/Counter1 Input Capture Interrupt Enable
.equ OCIE1 = 6 ; Timer/Counter1 Output Compare Match Interrupt Enable
.equ TOIE1 = 7 ; Timer/Counter1 Overflow Interrupt Enable
; TIFR - Timer/Counter Interrupt Flag register
.equ ICF1 = 3 ; Input Capture Flag 1
.equ OCF1 = 6 ; Output Compare Flag 1
.equ TOV1 = 7 ; Timer/Counter1 Overflow Flag
; TCCR1A - Timer/Counter1 Control Register A
.equ PWM10 = 0 ; Pulse Width Modulator Select Bit 0
.equ PWM11 = 1 ; Pulse Width Modulator Select Bit 1
.equ COM10 = 6 ; Compare Ouput Mode 1, bit 0
.equ COM11 = 7 ; Compare Output Mode 1, bit 1
; TCCR1B - Timer/Counter1 Control Register B
.equ CS10 = 0 ; Clock Select1 bit 0
.equ CS11 = 1 ; Clock Select1 bit 1
.equ CS12 = 2 ; Clock Select1 bit 2
.equ CTC1 = 3 ; Clear Timer/Counter1 on Compare Match
.equ ICES1 = 6 ; Input Capture 1 Edge Select
.equ ICNC1 = 7 ; Input Capture 1 Noise Canceler
; ***** WATCHDOG *********************
; WDTCR - Watchdog Timer Control Register
.equ WDP0 = 0 ; Watch Dog Timer Prescaler bit 0
.equ WDP1 = 1 ; Watch Dog Timer Prescaler bit 1
.equ WDP2 = 2 ; Watch Dog Timer Prescaler bit 2
.equ WDE = 3 ; Watch Dog Enable
.equ WDTOE = 4 ; RW
.equ WDDE = WDTOE ; For compatibility
; ***** LOCKSBITS ********************************************************
.equ LB1 = 0 ; Lockbit
.equ LB2 = 1 ; Lockbit
; ***** FUSES ************************************************************
; LOW fuse bits
; ***** CPU REGISTER DEFINITIONS *****************************************
.def XH = r27
.def XL = r26
.def YH = r29
.def YL = r28
.def ZH = r31
.def ZL = r30
; ***** DATA MEMORY DECLARATIONS *****************************************
.equ FLASHEND = 0x07ff ; Note: Word address
.equ IOEND = 0x003f
.equ SRAM_START = 0x0060
.equ SRAM_SIZE = 128
.equ RAMEND = 0x00df
.equ XRAMEND = 0x0000
.equ E2END = 0x00ff
.equ EEPROMEND = 0x00ff
.equ EEADRBITS = 8
#pragma AVRPART MEMORY PROG_FLASH 4096
#pragma AVRPART MEMORY EEPROM 256
#pragma AVRPART MEMORY INT_SRAM SIZE 128
#pragma AVRPART MEMORY INT_SRAM START_ADDR 0x60
; ***** INTERRUPT VECTORS ************************************************
.equ INT0addr = 0x0001 ; External Interrupt 0
.equ INT1addr = 0x0002 ; External Interrupt 1
.equ ICP1addr = 0x0003 ; Timer/Counter Capture Event
.equ OC1addr = 0x0004 ; Timer/Counter1 Compare Match
.equ OVF1addr = 0x0005 ; Timer/Counter1 Overflow
.equ OVF0addr = 0x0006 ; Timer/Counter0 Overflow
.equ SPIaddr = 0x0007 ; Serial Transfer Complete
.equ URXCaddr = 0x0008 ; UART, Rx Complete
.equ UDREaddr = 0x0009 ; UART Data Register Empty
.equ UTXCaddr = 0x000a ; UART, Tx Complete
.equ ADCCaddr = 0x000b ; ADC Conversion Complete
.equ ERDYaddr = 0x000c ; EEPROM Ready
.equ ACIaddr = 0x000d ; Analog Comparator
.equ INT_VECTORS_SIZE = 14 ; size in words
#pragma AVRPART CORE INSTRUCTIONS_NOT_SUPPORTED break
#endif /* _4433DEF_INC_ */
; ***** END OF FILE ******************************************************
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