/**************************************************************************************************
 *                                                                          
 * Copyright (c) 2001 - 2003 Winbond Electronics Corp. All rights reserved.      
 *                                                                         
 * FILENAME
 *     gdma.c
 *
 * VERSION
 *     1.0
 *
 * DESCRIPTION
 *     This file contains the GDMA test functions.
 *
 * DATA STRUCTURES
 *     None
 *
 * FUNCTIONS
 *     1. GDMA0_isr()
 *     2. GDMA1_isre()
 *     3. GDMAMemToMem()
 *     4. CompareMemory()
 *     5. GDMATest()
 *     6. main()
 *
 * HISTORY
 *     04/18/2003		 Ver 1.0 Created by PC30 MNCheng
 *
 * REMARK
 *     None
 *     
 *************************************************************************************************/
#include <stdio.h>
#include "740defs.h"

/* field definition of GDMA control register */
#define GDMAERR		(0x1<<20)
#define AUTOIEN		(0x1<<19)
#define TC			(0x1<<18)
#define BLOCK		(0x1<<17)
#define SOFTREQ		(0x1<<16)
#define DM			(0x1<<15)
#define W32			(0x2<<12)
#define W16			(0x1<<12)
#define W8			(0x0<<12)
#define SBMS		(0x1<<11)
#define BME			(0x1<<9)
#define SIEN		(0x1<<8)
#define SAFIX		(0x1<<7)
#define DAFIX		(0x1<<6)
#define SADIR		(0x1<<5)
#define DADIR		(0x1<<4)
#define GDMAMS		(0x3<<2)
#define GDMAEN		(0x1)

#define BYTE_SIZE	0  /* used for byte transfer */
#define SHORT_SIZE	1  /* used for halfword transfer */
#define WORD_SIZE	2  /* used for word transfer */

/* global variables */
volatile UINT	IsGdmaChannel0IntOk=0;
volatile UINT	IsGdmaChannel1IntOk=0;


void GDMA0_isr()
{

  IsGdmaChannel0IntOk=1;
  GDMA_CTL0 &= ~TC;  /* MUST cleat interrupt flag */
 
}


void GDMA1_isr()
{

  IsGdmaChannel1IntOk=1;
  GDMA_CTL1 &= ~TC; /* MUST cleat interrupt flag */
}


int GDMAMemToMem(int ch, UINT src, UINT dest, UINT tcnt, UINT ws)
{
  UINT config;
  
  config = (SOFTREQ+SBMS+SIEN+GDMAEN + (ws << 12));
  tcnt >>= ws;
  
  if (ch == 0)
  {
     GDMA_SRCB0 = src;
	 GDMA_DSTB0 = dest;
	 GDMA_TCNT0 = tcnt;
	 GDMA_CTL0  = config;
  }
  else
  {
     GDMA_SRCB1 = src;
	 GDMA_DSTB1 = dest;
	 GDMA_TCNT1 = tcnt;
	 GDMA_CTL1  = config;
  }
  
  return 0;
}


int CompareMemory(UINT src, UINT dest, int size)
{
  UINT  i;
  uint8 *p, *q;
  int   count;
  
  //UART_printf("COmpareMemory(): src=%x, dts=%x, size=%d\n", src, dest, size);
  
  p = (uint8 *) src;
  q = (uint8 *) dest;
  
  count = 0;
  for (i=0; i<size; i++)
  {
       if (*p++ != *q++)
            count++;  
  }

  return count;

}


int GDMATest()
{
    UINT src0, dest0, size0;
	UINT src1, dest1, size1;
	UINT i;
	int  verb0, verb1, errCnt;

	IsGdmaChannel0IntOk=0;
	IsGdmaChannel1IntOk=0;
	
	if(GDMA_CTL0 & (GDMAEN+SOFTREQ))
	{
		UART_printf("\nChannel 0 is not clear automatically.");
		UART_printf("\nClean it...");
		GDMA_CTL0 &= ~(GDMAEN+SOFTREQ);
	}
	
	if(GDMA_CTL1 & (GDMAEN+SOFTREQ))
	{
		UART_printf("\nChannel 1 is not clear automatically.");
		UART_printf("\nClean it...");
		GDMA_CTL1 &= ~(GDMAEN+SOFTREQ);
	}

    //fixed buffer, just for testing
	src0  = 0x00100FFC;
	dest0 = 0x00282FFC;	
	size0 = 0x60000;  /* transfer count */
	
	for (i=0; i<size0; i++)
	{
	     *((volatile uint8 *) (dest0 +i)) = 0;
	     *((volatile uint8 *) (src0 +i))  = (uint8) i;
	}
	
	src1  = 0x00300FFC;
	dest1 = 0x00382FFC;	
	size1 = 0x60000;  /* transfer count */
	
	for (i=0; i<size1; i++)
	{
	     *((volatile uint8 *) (dest1 +i)) = 0;
	     *((volatile uint8 *) (src1 +i))  = (uint8) i;
	}
	
	IsGdmaChannel0IntOk=0;
	IsGdmaChannel1IntOk=0;
		
	GDMAMemToMem(0, src0, dest0, size0, WORD_SIZE); /* start channel 0 */
	GDMAMemToMem(1, src1, dest1, size1, BYTE_SIZE); /* start channel 1 */
		
    verb0 = verb1 = 1;
	do
	{
	   //UART_printf("IsGdmaChannel0IntOk = %d, IsGdmaChannel1IntOk = %d\n", IsGdmaChannel0IntOk, IsGdmaChannel1IntOk);
	   if (IsGdmaChannel0IntOk && verb0)
	   {
	       UART_printf("\nChannel 0 Interrupt Ok!");
	       verb0 = 0;
	   }    
	   
	   if (IsGdmaChannel1IntOk && verb1)
	   {
	       UART_printf("\nChannel 1 Interrupt Ok!");
	       verb1 = 0;
	   }
	} while(!IsGdmaChannel0IntOk || !IsGdmaChannel1IntOk) ;
	
	errCnt = CompareMemory(src0, dest0, size0);
	if(errCnt!=0)
		UART_printf("\nChannel 0 has %d failures!!!\n",errCnt);
	else
		UART_printf("\nChannel 0 Memory copy OK!!\n");

	errCnt = CompareMemory(src1, dest1, size1);	
    if(errCnt!=0)
		UART_printf("\nChannel 1 has %d failures!!!\n",errCnt);
	else
		UART_printf("\nChannel 1 Memory copy OK!!\n");	
	
	return 0;
}


int main() 
{
	UINT oldvect, temp;
		
    UART_Initialize(115200);
    UART_printf("\n\nW90N740 DIAG Program 1.0 - GDMA\n\n");

    /* clear CPSR I bit */
    __asm
    {
      MRS    temp, CPSR
      AND    temp, temp, 0x7F
      MSR    CPSR_c, temp
    }

    /* replace IRQ exception entry */
    oldvect = *(volatile unsigned int *)0x38;
    *(volatile unsigned int *)0x38 = (unsigned int) IRQ_IntHandler;
	
	SetIntISR(GDMAINT0, GDMA0_isr);
	SetIntISR(GDMAINT1, GDMA1_isr);
	Enable_Int(GDMAINT0);
	Enable_Int(GDMAINT1);
	
	GDMATest();
	
	*(volatile unsigned int *)0x38 = (unsigned int) oldvect;
	    
    return 0;
}