/**************************************************************************************************
 *                                                                          
 * Copyright (c) 2001 - 2003 Winbond Electronics Corp. All rights reserved.      
 *                                                                         
 * FILENAME
 *     dramtest.c
 *
 * VERSION
 *     1.0
 *
 * DESCRIPTION
 *     This file contains the function for memory test. The cache will be enabled in the second
 *     run of the test.
 *
 * DATA STRUCTURES
 *     None
 *
 * FUNCTIONS
 *     1. main()
 *
 * HISTORY
 *     04/16/2003		 Ver 1.0 Created by PC30 MNCheng
 *
 * REMARK
 *     None
 *     
 *************************************************************************************************/
#include <stdio.h>
#include "740defs.h"

extern unsigned int Image$$ZI$$Limit;

#define MEM_SIZE	(4 * 0x100000)   /* 4 MB */
#define start_addr	((((unsigned int) &Image$$ZI$$Limit) & 0xFFFFFF00)+256)
#define end_addr	MEM_SIZE


int main(void)
{
  unsigned int addr1,addr2,midsize;
  unsigned int data[7]={0,0x55555555,0xaaaaaaaa,0xffffffff,0xaaaaaaaa,0x55555555,0};
  unsigned int i, loop;
  unsigned int ecnt=0;
  unsigned int rdata;
	
  UART_printf("\n\nW90N740 DIAG Program 1.0 - SDRAM/Cache\n\n");
	
  for (loop=0; loop < 2; loop++)
  {
    Flush_Cache();
	if (loop ==0)
	{
	    UART_printf("\n\nSDRAM Test at Cache OFF >>>>>>>>>>>>>>>>>\n");
	    TurnOff_Cache();
	}
	else
	{
	    UART_printf("\n\nSDRAM Test at Cache ON >>>>>>>>>>>>>>>>>\n");
	    TurnOn_Cache();
	}
	
	addr1=(unsigned int) start_addr;
	addr2=(unsigned int) end_addr;
	midsize=(addr2-addr1)/2;
	ecnt = 0;

	UART_printf("addr1=%x, addr2=%x, midsize=%x\n",addr1, addr2, midsize);
	
	//------------------------------------------------------------------
	UART_printf("Butterfly test 1...\n");
	for(i=0;i<midsize;i+=4)
	{		
		*((volatile unsigned int *)(addr1+i))=data[(i>>2)%4];
		if( (i&0x000FFFFF)==0 )
		{
			UART_printf("addr=0x%08x\n",addr1+i);
		}
	}
	
	for(i=0;i<midsize;i+=4)
	{
		*((volatile unsigned int *)(addr2-i-4))=data[(i>>2)%4];
		if( (i&0x000FFFFF)==0 )
		{
			UART_printf("addr=0x%08x\n",addr2-i-4);
		}		
	}
	
	for(i=0;i<midsize;i+=4)
	{
		
		rdata=*((volatile unsigned int *)(addr1+i));
		
		if(rdata!=data[(i>>2)%4])
		{
			UART_printf("Error:addr=0x%08x write=0x%08x read=0x%08x\n",addr1+i,data[(i>>2)%4],rdata);
			ecnt++;
		}
		
		if( (i&0x000FFFFF)==0 )
		{
			UART_printf("addr=0x%08x\n",addr1+i);
		}	
	}
	
	for(i=0;i<midsize;i+=4)
	{		
		rdata=*((volatile unsigned int *)(addr2-i-4));
		
		if(rdata!=data[(i>>2)%4])
		{
			UART_printf("Error:addr=0x%08x write=0x%08x read=0x%08x\n",addr2-i-4,data[(i>>2)%4],rdata);
			ecnt++;
		}

		if( (i&0x000FFFFF)==0 )
		{
			UART_printf("addr=0x%08x\n",addr2-i-4);
		}
	}
 
	//------------------------------------------------------------------
	UART_printf("Butterfly test 2...\n");
	for(i=0;i<midsize;i+=4)
	{		
		*((volatile unsigned int *)(addr1+midsize-i-4))=data[(i>>2)%4+1];
		
		if( (i&0x000FFFFF)==0 )
		{
			UART_printf("addr=0x%08x\n",addr1+midsize-i-4);
		}
	}
	
	for(i=0;i<midsize;i+=4)
	{		
		*((volatile unsigned int *)(addr2-midsize+i))=data[(i>>2)%4+1];
		
		if( (i&0x000FFFFF)==0 )
		{
			UART_printf("addr=0x%08x\n",addr2-midsize+i);
		}		
	}
	
	for(i=0;i<midsize;i+=4)
	{		
		rdata=*((volatile unsigned int *)(addr1+midsize-i-4));
		
		if(rdata!=data[(i>>2)%4+1])
		{
			UART_printf("Error:addr=0x%08x write=0x%08x read=0x%08x\n",addr1+midsize-i-4,data[(i>>2)%4+1],rdata);
			ecnt++;
		}

		if( (i&0x000FFFFF)==0 )
		{
			UART_printf("addr=0x%08x\n",addr1+midsize-i-4);
		}
	}
	
	for(i=0;i<midsize;i+=4)
	{		
		rdata=*((volatile unsigned int *)(addr2-midsize+i));
		
		if(rdata!=data[(i>>2)%4+1])
		{
			UART_printf("Error:addr=0x%08x write=0x%08x read=0x%08x\n",addr2-midsize+i,data[(i>>2)%4],rdata);
			ecnt++;
		}
		
		if( (i&0x000FFFFF)==0 )
		{
			UART_printf("addr=0x%08x\n",addr2-midsize+i);
		}		
	}
	
	//------------------------------------------------------------------
	UART_printf("Butterfly test 3...\n");
	for(i=0;i<midsize;i+=4)
	{		
		*((volatile unsigned int *)(addr1+midsize-i-4))=data[(i>>2)%4+2];
		*((volatile unsigned int *)(addr2-midsize+i))=data[(i>>2)%4+2];
			
		if( (i&0x000FFFFF)==0 )
		{
			UART_printf("addr=0x%08x 0x%08x\n",addr1+midsize-i-4,addr2-midsize+i);
		}
	}
	
	for(i=0;i<midsize;i+=4)
	{		
		rdata=*((volatile unsigned int *)(addr1+midsize-i-4));
	
		if(rdata!=data[(i>>2)%4+2])
		{
			UART_printf("Error:addr=0x%08x write=0x%08x read=0x%08x\n",addr1+midsize-i-4,data[(i>>2)%4+2],rdata);
			ecnt++;
		}
				
		rdata=*((volatile unsigned int *)(addr2-midsize+i));
		
		if(rdata!=data[(i>>2)%4+2])
		{
			UART_printf("Error:addr=0x%08x write=0x%08x read=0x%08x\n",addr2-midsize+i,data[(i>>2)%4+2],rdata);
			ecnt++;
		}

		if( (i&0x000FFFFF)==0 )
		{
			UART_printf("addr=0x%08x 0x%08x\n",addr1+midsize-i-4,addr2-midsize+i);
		}	
	}
	
	//------------------------------------------------------------------
	UART_printf("Butterfly test 4...\n");
	for(i=0;i<midsize;i+=4)
	{
		
		*((volatile unsigned int *)(addr1+i))=data[(i>>2)%4+3];
		*((volatile unsigned int *)(addr2-i-4))=data[(i>>2)%4+3];
 	    
 	    if( (i&0x000FFFFF)==0 )
		{
		    UART_printf("addr=0x%08x 0x%08x\n",addr1+i,addr2-i-4);
		}
	}
	
	for(i=0;i<midsize;i+=4)
	{
		
		rdata=*((volatile unsigned int *)(addr1+i));
		if(rdata!=data[(i>>2)%4+3])
		{
			UART_printf("Error:addr=0x%08x write=0x%08x read=0x%08x\n",addr1+i,data[(i>>2)%4+3],rdata);
			ecnt++;
		}
		 	
		rdata=*((volatile unsigned int *)(addr2-i-4));
		if(rdata!=data[(i>>2)%4+3])
		{
			UART_printf("Error:addr=0x%08x write=0x%08x read=0x%08x\n",addr2-i-4,data[(i>>2)%4+3],rdata);
			ecnt++;
		}
		
		if( (i&0x000FFFFF)==0 )
		{
			UART_printf("addr=0x%08x 0x%08x\n",addr1+i,addr2-i-4);
		}
	}
 
	if( ecnt== 0)
	{
		UART_printf("SDRAM Butterfly Test Pass !\n");
	}
	else
	{
		UART_printf("SDRAM Butterfly Test Fail !\nThere are %u failures!!\n",ecnt);
    }

  }	
  
  Flush_Cache();
  TurnOff_Cache();
  
  return 0;

}