shiftreg = DECODE_RM_LONG_REGISTER(rh);	    TRACE_AND_STEP();	    bit = *shiftreg & 0x1F;	    mask = (0x1 << bit);	    CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);	    *srcreg &= ~mask;	} else {	    u16 *srcreg,*shiftreg;	    u16 mask;	    srcreg = DECODE_RM_WORD_REGISTER(rl);	    DECODE_PRINTF(",");	    shiftreg = DECODE_RM_WORD_REGISTER(rh);	    TRACE_AND_STEP();	    bit = *shiftreg & 0xF;	    mask = (u16)(0x1 << bit);	    CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);	    *srcreg &= ~mask;	}    }    DECODE_CLEAR_SEGOVR();    END_OF_INSTR();}/****************************************************************************REMARKS:Handles opcode 0x0f,0xb4****************************************************************************/void x86emuOp2_lfs_R_IMM(u8 X86EMU_UNUSED(op2)){    int mod, rh, rl;    u16 *dstreg;    uint srcoffset;    START_OF_INSTR();    DECODE_PRINTF("LFS\t");    FETCH_DECODE_MODRM(mod, rh, rl);    if (mod < 3) {	dstreg = DECODE_RM_WORD_REGISTER(rh);	DECODE_PRINTF(",");	srcoffset = decode_rmXX_address(mod, rl);	DECODE_PRINTF("\n");	TRACE_AND_STEP();	*dstreg = fetch_data_word(srcoffset);	M.x86.R_FS = fetch_data_word(srcoffset + 2);    } else {			 /* register to register */	/* UNDEFINED! */	TRACE_AND_STEP();    }    DECODE_CLEAR_SEGOVR();    END_OF_INSTR();}/****************************************************************************REMARKS:Handles opcode 0x0f,0xb5****************************************************************************/void x86emuOp2_lgs_R_IMM(u8 X86EMU_UNUSED(op2)){    int mod, rh, rl;    u16 *dstreg;    uint srcoffset;    START_OF_INSTR();    DECODE_PRINTF("LGS\t");    FETCH_DECODE_MODRM(mod, rh, rl);    if (mod < 3) {	dstreg = DECODE_RM_WORD_REGISTER(rh);	DECODE_PRINTF(",");	srcoffset = decode_rmXX_address(mod, rl);	DECODE_PRINTF("\n");	TRACE_AND_STEP();	*dstreg = fetch_data_word(srcoffset);	M.x86.R_GS = fetch_data_word(srcoffset + 2);    } else {			 /* register to register */	/* UNDEFINED! */	TRACE_AND_STEP();    }    DECODE_CLEAR_SEGOVR();    END_OF_INSTR();}/****************************************************************************REMARKS:Handles opcode 0x0f,0xb6****************************************************************************/void x86emuOp2_movzx_byte_R_RM(u8 X86EMU_UNUSED(op2)){    int mod, rl, rh;    uint srcoffset;    START_OF_INSTR();    DECODE_PRINTF("MOVZX\t");    FETCH_DECODE_MODRM(mod, rh, rl);    if (mod < 3) {	if (M.x86.mode & SYSMODE_PREFIX_DATA) {	    u32 *destreg;	    u32 srcval;	    destreg = DECODE_RM_LONG_REGISTER(rh);	    DECODE_PRINTF(",");	    srcoffset = decode_rmXX_address(mod, rl);	    srcval = fetch_data_byte(srcoffset);	    DECODE_PRINTF("\n");	    TRACE_AND_STEP();	    *destreg = srcval;	} else {	    u16 *destreg;	    u16 srcval;	    destreg = DECODE_RM_WORD_REGISTER(rh);	    DECODE_PRINTF(",");	    srcoffset = decode_rmXX_address(mod, rl);	    srcval = fetch_data_byte(srcoffset);	    DECODE_PRINTF("\n");	    TRACE_AND_STEP();	    *destreg = srcval;	}    } else {			 /* register to register */	if (M.x86.mode & SYSMODE_PREFIX_DATA) {	    u32 *destreg;	    u8	*srcreg;	    destreg = DECODE_RM_LONG_REGISTER(rh);	    DECODE_PRINTF(",");	    srcreg = DECODE_RM_BYTE_REGISTER(rl);	    DECODE_PRINTF("\n");	    TRACE_AND_STEP();	    *destreg = *srcreg;	} else {	    u16 *destreg;	    u8	*srcreg;	    destreg = DECODE_RM_WORD_REGISTER(rh);	    DECODE_PRINTF(",");	    srcreg = DECODE_RM_BYTE_REGISTER(rl);	    DECODE_PRINTF("\n");	    TRACE_AND_STEP();	    *destreg = *srcreg;	}    }    DECODE_CLEAR_SEGOVR();    END_OF_INSTR();}/****************************************************************************REMARKS:Handles opcode 0x0f,0xb7****************************************************************************/void x86emuOp2_movzx_word_R_RM(u8 X86EMU_UNUSED(op2)){    int mod, rl, rh;    uint srcoffset;    u32 *destreg;    u32 srcval;    u16 *srcreg;    START_OF_INSTR();    DECODE_PRINTF("MOVZX\t");    FETCH_DECODE_MODRM(mod, rh, rl);    if (mod < 3) {	destreg = DECODE_RM_LONG_REGISTER(rh);	DECODE_PRINTF(",");	srcoffset = decode_rmXX_address(mod, rl);	srcval = fetch_data_word(srcoffset);	DECODE_PRINTF("\n");	TRACE_AND_STEP();	*destreg = srcval;    } else {			 /* register to register */	destreg = DECODE_RM_LONG_REGISTER(rh);	DECODE_PRINTF(",");	srcreg = DECODE_RM_WORD_REGISTER(rl);	DECODE_PRINTF("\n");	TRACE_AND_STEP();	*destreg = *srcreg;    }    DECODE_CLEAR_SEGOVR();    END_OF_INSTR();}/****************************************************************************REMARKS:Handles opcode 0x0f,0xba****************************************************************************/void x86emuOp2_btX_I(u8 X86EMU_UNUSED(op2)){    int mod, rl, rh;    uint srcoffset;    u8 shift;    int bit;    START_OF_INSTR();    FETCH_DECODE_MODRM(mod, rh, rl);    switch (rh) {    case 4:	DECODE_PRINTF("BT\t");	break;    case 5:	DECODE_PRINTF("BTS\t");	break;    case 6:	DECODE_PRINTF("BTR\t");	break;    case 7:	DECODE_PRINTF("BTC\t");	break;    default:	DECODE_PRINTF("ILLEGAL EXTENDED X86 OPCODE\n");	TRACE_REGS();	printk("%04x:%04x: %02X%02X ILLEGAL EXTENDED X86 OPCODE EXTENSION!\n",		M.x86.R_CS, M.x86.R_IP-3,op2, (mod<<6)|(rh<<3)|rl);	HALT_SYS();    }    if (mod < 3) {	srcoffset = decode_rmXX_address(mod, rl);	shift = fetch_byte_imm();	DECODE_PRINTF2(",%d\n", shift);	TRACE_AND_STEP();	if (M.x86.mode & SYSMODE_PREFIX_DATA) {	    u32 srcval, mask;	    bit = shift & 0x1F;	    srcval = fetch_data_long(srcoffset);	    mask = (0x1 << bit);	    CONDITIONAL_SET_FLAG(srcval & mask,F_CF);	    switch (rh) {	    case 5:		store_data_long(srcoffset, srcval | mask);		break;	    case 6:		store_data_long(srcoffset, srcval & ~mask);		break;	    case 7:		store_data_long(srcoffset, srcval ^ mask);		break;	    default:		break;	    }	} else {	    u16 srcval, mask;	    bit = shift & 0xF;	    srcval = fetch_data_word(srcoffset);	    mask = (0x1 << bit);	    CONDITIONAL_SET_FLAG(srcval & mask,F_CF);	    switch (rh) {	    case 5:		store_data_word(srcoffset, srcval | mask);		break;	    case 6:		store_data_word(srcoffset, srcval & ~mask);		break;	    case 7:		store_data_word(srcoffset, srcval ^ mask);		break;	    default:		break;	    }	}    } else {			 /* register to register */	if (M.x86.mode & SYSMODE_PREFIX_DATA) {	    u32 *srcreg;	    u32 mask;	    srcreg = DECODE_RM_LONG_REGISTER(rl);	    shift = fetch_byte_imm();	    DECODE_PRINTF2(",%d\n", shift);	    TRACE_AND_STEP();	    bit = shift & 0x1F;	    mask = (0x1 << bit);	    CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);	    switch (rh) {	    case 5:		*srcreg |= mask;		break;	    case 6:		*srcreg &= ~mask;		break;	    case 7:		*srcreg ^= mask;		break;	    default:		break;	    }	} else {	    u16 *srcreg;	    u16 mask;	    srcreg = DECODE_RM_WORD_REGISTER(rl);	    shift = fetch_byte_imm();	    DECODE_PRINTF2(",%d\n", shift);	    TRACE_AND_STEP();	    bit = shift & 0xF;	    mask = (0x1 << bit);	    CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);	    switch (rh) {	    case 5:		*srcreg |= mask;		break;	    case 6:		*srcreg &= ~mask;		break;	    case 7:		*srcreg ^= mask;		break;	    default:		break;	    }	}    }    DECODE_CLEAR_SEGOVR();    END_OF_INSTR();}/****************************************************************************REMARKS:Handles opcode 0x0f,0xbb****************************************************************************/void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2)){    int mod, rl, rh;    uint srcoffset;    int bit,disp;    START_OF_INSTR();    DECODE_PRINTF("BTC\t");    FETCH_DECODE_MODRM(mod, rh, rl);    if (mod < 3) {	srcoffset = decode_rmXX_address(mod, rl);	DECODE_PRINTF(",");	if (M.x86.mode & SYSMODE_PREFIX_DATA) {	    u32 srcval,mask;	    u32 *shiftreg;	    shiftreg = DECODE_RM_LONG_REGISTER(rh);	    TRACE_AND_STEP();	    bit = *shiftreg & 0x1F;	    disp = (s16)*shiftreg >> 5;	    srcval = fetch_data_long(srcoffset+disp);	    mask = (0x1 << bit);	    CONDITIONAL_SET_FLAG(srcval & mask,F_CF);	    store_data_long(srcoffset+disp, srcval ^ mask);	} else {	    u16 srcval,mask;	    u16 *shiftreg;	    shiftreg = DECODE_RM_WORD_REGISTER(rh);	    TRACE_AND_STEP();	    bit = *shiftreg & 0xF;	    disp = (s16)*shiftreg >> 4;	    srcval = fetch_data_word(srcoffset+disp);	    mask = (u16)(0x1 << bit);	    CONDITIONAL_SET_FLAG(srcval & mask,F_CF);	    store_data_word(srcoffset+disp, (u16)(srcval ^ mask));	}    } else {			 /* register to register */	if (M.x86.mode & SYSMODE_PREFIX_DATA) {	    u32 *srcreg,*shiftreg;	    u32 mask;	    srcreg = DECODE_RM_LONG_REGISTER(rl);	    DECODE_PRINTF(",");	    shiftreg = DECODE_RM_LONG_REGISTER(rh);	    TRACE_AND_STEP();	    bit = *shiftreg & 0x1F;	    mask = (0x1 << bit);	    CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);	    *srcreg ^= mask;	} else {	    u16 *srcreg,*shiftreg;	    u16 mask;	    srcreg = DECODE_RM_WORD_REGISTER(rl);	    DECODE_PRINTF(",");	    shiftreg = DECODE_RM_WORD_REGISTER(rh);	    TRACE_AND_STEP();	    bit = *shiftreg & 0xF;	    mask = (u16)(0x1 << bit);	    CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);	    *srcreg ^= mask;	}    }    DECODE_CLEAR_SEGOVR();    END_OF_INSTR();}/****************************************************************************REMARKS:Handles opcode 0x0f,0xbc****************************************************************************/void x86emuOp2_bsf(u8 X86EMU_UNUSED(op2)){    int mod, rl, rh;    uint srcoffset;    START_OF_INSTR();    DECODE_PRINTF("BSF\n");    FETCH_DECODE_MODRM(mod, rh, rl);    if (mod < 3) {	srcoffset = decode_rmXX_address(mod, rl);	DECODE_PRINTF(",");	if (M.x86.mode & SYSMODE_PREFIX_DATA) {	    u32 srcval, *dstreg;	    dstreg = DECODE_RM_LONG_REGISTER(rh);	    TRACE_AND_STEP();	    srcval = fetch_data_long(srcoffset);	    CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);	    for(*dstreg = 0; *dstreg < 32; (*dstreg)++)		if ((srcval >> *dstreg) & 1) break;	} else {	    u16 srcval, *dstreg;	    dstreg = DECODE_RM_WORD_REGISTER(rh);	    TRACE_AND_STEP();	    srcval = fetch_data_word(srcoffset);	    CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);	    for(*dstreg = 0; *dstreg < 16; (*dstreg)++)		if ((srcval >> *dstreg) & 1) break;	}    } else {		 /* register to register */	if (M.x86.mode & SYSMODE_PREFIX_DATA) {	    u32 *srcreg, *dstreg;	    srcreg = DECODE_RM_LONG_REGISTER(rl);	    DECODE_PRINTF(",");	    dstreg = DECODE_RM_LONG_REGISTER(rh);	    TRACE_AND_STEP();	    CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF);	    for(*dstreg = 0; *dstreg < 32; (*dstreg)++)		if ((*srcreg >> *dstreg) & 1) break;	} else {	    u16 *srcreg, *dstreg;	    srcreg = DECODE_RM_WORD_REGISTER(rl);	    DECODE_PRINTF(",");	    dstreg = DECODE_RM_WORD_REGISTER(rh);	    TRACE_AND_STEP();	    CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF);	    for(*dstreg = 0; *dstreg < 16; (*dstreg)++)		if ((*srcreg >> *dstreg) & 1) break;