#define bfin_read_DMA13_CONFIG()       bfin_read16(DMA13_CONFIG)#define bfin_write_DMA13_CONFIG(val)   bfin_write16(DMA13_CONFIG, val)#define pDMA13_X_COUNT                 ((uint16_t volatile *)DMA13_X_COUNT) /* DMA Channel 13 X Count Register */#define bfin_read_DMA13_X_COUNT()      bfin_read16(DMA13_X_COUNT)#define bfin_write_DMA13_X_COUNT(val)  bfin_write16(DMA13_X_COUNT, val)#define pDMA13_X_MODIFY                ((uint16_t volatile *)DMA13_X_MODIFY) /* DMA Channel 13 X Modify Register */#define bfin_read_DMA13_X_MODIFY()     bfin_read16(DMA13_X_MODIFY)#define bfin_write_DMA13_X_MODIFY(val) bfin_write16(DMA13_X_MODIFY, val)#define pDMA13_Y_COUNT                 ((uint16_t volatile *)DMA13_Y_COUNT) /* DMA Channel 13 Y Count Register */#define bfin_read_DMA13_Y_COUNT()      bfin_read16(DMA13_Y_COUNT)#define bfin_write_DMA13_Y_COUNT(val)  bfin_write16(DMA13_Y_COUNT, val)#define pDMA13_Y_MODIFY                ((uint16_t volatile *)DMA13_Y_MODIFY) /* DMA Channel 13 Y Modify Register */#define bfin_read_DMA13_Y_MODIFY()     bfin_read16(DMA13_Y_MODIFY)#define bfin_write_DMA13_Y_MODIFY(val) bfin_write16(DMA13_Y_MODIFY, val)#define pDMA13_CURR_DESC_PTR           ((void * volatile *)DMA13_CURR_DESC_PTR) /* DMA Channel 13 Current Descriptor Pointer Register */#define bfin_read_DMA13_CURR_DESC_PTR() bfin_readPTR(DMA13_CURR_DESC_PTR)#define bfin_write_DMA13_CURR_DESC_PTR(val) bfin_writePTR(DMA13_CURR_DESC_PTR, val)#define pDMA13_CURR_ADDR               ((void * volatile *)DMA13_CURR_ADDR) /* DMA Channel 13 Current Address Register */#define bfin_read_DMA13_CURR_ADDR()    bfin_readPTR(DMA13_CURR_ADDR)#define bfin_write_DMA13_CURR_ADDR(val) bfin_writePTR(DMA13_CURR_ADDR, val)#define pDMA13_IRQ_STATUS              ((uint16_t volatile *)DMA13_IRQ_STATUS) /* DMA Channel 13 Interrupt/Status Register */#define bfin_read_DMA13_IRQ_STATUS()   bfin_read16(DMA13_IRQ_STATUS)#define bfin_write_DMA13_IRQ_STATUS(val) bfin_write16(DMA13_IRQ_STATUS, val)#define pDMA13_PERIPHERAL_MAP          ((uint16_t volatile *)DMA13_PERIPHERAL_MAP) /* DMA Channel 13 Peripheral Map Register */#define bfin_read_DMA13_PERIPHERAL_MAP() bfin_read16(DMA13_PERIPHERAL_MAP)#define bfin_write_DMA13_PERIPHERAL_MAP(val) bfin_write16(DMA13_PERIPHERAL_MAP, val)#define pDMA13_CURR_X_COUNT            ((uint16_t volatile *)DMA13_CURR_X_COUNT) /* DMA Channel 13 Current X Count Register */#define bfin_read_DMA13_CURR_X_COUNT() bfin_read16(DMA13_CURR_X_COUNT)#define bfin_write_DMA13_CURR_X_COUNT(val) bfin_write16(DMA13_CURR_X_COUNT, val)#define pDMA13_CURR_Y_COUNT            ((uint16_t volatile *)DMA13_CURR_Y_COUNT) /* DMA Channel 13 Current Y Count Register */#define bfin_read_DMA13_CURR_Y_COUNT() bfin_read16(DMA13_CURR_Y_COUNT)#define bfin_write_DMA13_CURR_Y_COUNT(val) bfin_write16(DMA13_CURR_Y_COUNT, val)#define pDMA14_NEXT_DESC_PTR           ((void * volatile *)DMA14_NEXT_DESC_PTR) /* DMA Channel 14 Next Descriptor Pointer Register */#define bfin_read_DMA14_NEXT_DESC_PTR() bfin_readPTR(DMA14_NEXT_DESC_PTR)#define bfin_write_DMA14_NEXT_DESC_PTR(val) bfin_writePTR(DMA14_NEXT_DESC_PTR, val)#define pDMA14_START_ADDR              ((void * volatile *)DMA14_START_ADDR) /* DMA Channel 14 Start Address Register */#define bfin_read_DMA14_START_ADDR()   bfin_readPTR(DMA14_START_ADDR)#define bfin_write_DMA14_START_ADDR(val) bfin_writePTR(DMA14_START_ADDR, val)#define pDMA14_CONFIG                  ((uint16_t volatile *)DMA14_CONFIG) /* DMA Channel 14 Configuration Register */#define bfin_read_DMA14_CONFIG()       bfin_read16(DMA14_CONFIG)#define bfin_write_DMA14_CONFIG(val)   bfin_write16(DMA14_CONFIG, val)#define pDMA14_X_COUNT                 ((uint16_t volatile *)DMA14_X_COUNT) /* DMA Channel 14 X Count Register */#define bfin_read_DMA14_X_COUNT()      bfin_read16(DMA14_X_COUNT)#define bfin_write_DMA14_X_COUNT(val)  bfin_write16(DMA14_X_COUNT, val)#define pDMA14_X_MODIFY                ((uint16_t volatile *)DMA14_X_MODIFY) /* DMA Channel 14 X Modify Register */#define bfin_read_DMA14_X_MODIFY()     bfin_read16(DMA14_X_MODIFY)#define bfin_write_DMA14_X_MODIFY(val) bfin_write16(DMA14_X_MODIFY, val)#define pDMA14_Y_COUNT                 ((uint16_t volatile *)DMA14_Y_COUNT) /* DMA Channel 14 Y Count Register */#define bfin_read_DMA14_Y_COUNT()      bfin_read16(DMA14_Y_COUNT)#define bfin_write_DMA14_Y_COUNT(val)  bfin_write16(DMA14_Y_COUNT, val)#define pDMA14_Y_MODIFY                ((uint16_t volatile *)DMA14_Y_MODIFY) /* DMA Channel 14 Y Modify Register */#define bfin_read_DMA14_Y_MODIFY()     bfin_read16(DMA14_Y_MODIFY)#define bfin_write_DMA14_Y_MODIFY(val) bfin_write16(DMA14_Y_MODIFY, val)#define pDMA14_CURR_DESC_PTR           ((void * volatile *)DMA14_CURR_DESC_PTR) /* DMA Channel 14 Current Descriptor Pointer Register */#define bfin_read_DMA14_CURR_DESC_PTR() bfin_readPTR(DMA14_CURR_DESC_PTR)#define bfin_write_DMA14_CURR_DESC_PTR(val) bfin_writePTR(DMA14_CURR_DESC_PTR, val)#define pDMA14_CURR_ADDR               ((void * volatile *)DMA14_CURR_ADDR) /* DMA Channel 14 Current Address Register */#define bfin_read_DMA14_CURR_ADDR()    bfin_readPTR(DMA14_CURR_ADDR)#define bfin_write_DMA14_CURR_ADDR(val) bfin_writePTR(DMA14_CURR_ADDR, val)#define pDMA14_IRQ_STATUS              ((uint16_t volatile *)DMA14_IRQ_STATUS) /* DMA Channel 14 Interrupt/Status Register */#define bfin_read_DMA14_IRQ_STATUS()   bfin_read16(DMA14_IRQ_STATUS)#define bfin_write_DMA14_IRQ_STATUS(val) bfin_write16(DMA14_IRQ_STATUS, val)#define pDMA14_PERIPHERAL_MAP          ((uint16_t volatile *)DMA14_PERIPHERAL_MAP) /* DMA Channel 14 Peripheral Map Register */#define bfin_read_DMA14_PERIPHERAL_MAP() bfin_read16(DMA14_PERIPHERAL_MAP)#define bfin_write_DMA14_PERIPHERAL_MAP(val) bfin_write16(DMA14_PERIPHERAL_MAP, val)#define pDMA14_CURR_X_COUNT            ((uint16_t volatile *)DMA14_CURR_X_COUNT) /* DMA Channel 14 Current X Count Register */#define bfin_read_DMA14_CURR_X_COUNT() bfin_read16(DMA14_CURR_X_COUNT)#define bfin_write_DMA14_CURR_X_COUNT(val) bfin_write16(DMA14_CURR_X_COUNT, val)#define pDMA14_CURR_Y_COUNT            ((uint16_t volatile *)DMA14_CURR_Y_COUNT) /* DMA Channel 14 Current Y Count Register */#define bfin_read_DMA14_CURR_Y_COUNT() bfin_read16(DMA14_CURR_Y_COUNT)#define bfin_write_DMA14_CURR_Y_COUNT(val) bfin_write16(DMA14_CURR_Y_COUNT, val)#define pDMA15_NEXT_DESC_PTR           ((void * volatile *)DMA15_NEXT_DESC_PTR) /* DMA Channel 15 Next Descriptor Pointer Register */#define bfin_read_DMA15_NEXT_DESC_PTR() bfin_readPTR(DMA15_NEXT_DESC_PTR)#define bfin_write_DMA15_NEXT_DESC_PTR(val) bfin_writePTR(DMA15_NEXT_DESC_PTR, val)#define pDMA15_START_ADDR              ((void * volatile *)DMA15_START_ADDR) /* DMA Channel 15 Start Address Register */#define bfin_read_DMA15_START_ADDR()   bfin_readPTR(DMA15_START_ADDR)#define bfin_write_DMA15_START_ADDR(val) bfin_writePTR(DMA15_START_ADDR, val)#define pDMA15_CONFIG                  ((uint16_t volatile *)DMA15_CONFIG) /* DMA Channel 15 Configuration Register */#define bfin_read_DMA15_CONFIG()       bfin_read16(DMA15_CONFIG)#define bfin_write_DMA15_CONFIG(val)   bfin_write16(DMA15_CONFIG, val)#define pDMA15_X_COUNT                 ((uint16_t volatile *)DMA15_X_COUNT) /* DMA Channel 15 X Count Register */#define bfin_read_DMA15_X_COUNT()      bfin_read16(DMA15_X_COUNT)#define bfin_write_DMA15_X_COUNT(val)  bfin_write16(DMA15_X_COUNT, val)#define pDMA15_X_MODIFY                ((uint16_t volatile *)DMA15_X_MODIFY) /* DMA Channel 15 X Modify Register */#define bfin_read_DMA15_X_MODIFY()     bfin_read16(DMA15_X_MODIFY)#define bfin_write_DMA15_X_MODIFY(val) bfin_write16(DMA15_X_MODIFY, val)#define pDMA15_Y_COUNT                 ((uint16_t volatile *)DMA15_Y_COUNT) /* DMA Channel 15 Y Count Register */#define bfin_read_DMA15_Y_COUNT()      bfin_read16(DMA15_Y_COUNT)#define bfin_write_DMA15_Y_COUNT(val)  bfin_write16(DMA15_Y_COUNT, val)#define pDMA15_Y_MODIFY                ((uint16_t volatile *)DMA15_Y_MODIFY) /* DMA Channel 15 Y Modify Register */#define bfin_read_DMA15_Y_MODIFY()     bfin_read16(DMA15_Y_MODIFY)#define bfin_write_DMA15_Y_MODIFY(val) bfin_write16(DMA15_Y_MODIFY, val)#define pDMA15_CURR_DESC_PTR           ((void * volatile *)DMA15_CURR_DESC_PTR) /* DMA Channel 15 Current Descriptor Pointer Register */#define bfin_read_DMA15_CURR_DESC_PTR() bfin_readPTR(DMA15_CURR_DESC_PTR)#define bfin_write_DMA15_CURR_DESC_PTR(val) bfin_writePTR(DMA15_CURR_DESC_PTR, val)#define pDMA15_CURR_ADDR               ((void * volatile *)DMA15_CURR_ADDR) /* DMA Channel 15 Current Address Register */#define bfin_read_DMA15_CURR_ADDR()    bfin_readPTR(DMA15_CURR_ADDR)#define bfin_write_DMA15_CURR_ADDR(val) bfin_writePTR(DMA15_CURR_ADDR, val)#define pDMA15_IRQ_STATUS              ((uint16_t volatile *)DMA15_IRQ_STATUS) /* DMA Channel 15 Interrupt/Status Register */#define bfin_read_DMA15_IRQ_STATUS()   bfin_read16(DMA15_IRQ_STATUS)#define bfin_write_DMA15_IRQ_STATUS(val) bfin_write16(DMA15_IRQ_STATUS, val)#define pDMA15_PERIPHERAL_MAP          ((uint16_t volatile *)DMA15_PERIPHERAL_MAP) /* DMA Channel 15 Peripheral Map Register */#define bfin_read_DMA15_PERIPHERAL_MAP() bfin_read16(DMA15_PERIPHERAL_MAP)#define bfin_write_DMA15_PERIPHERAL_MAP(val) bfin_write16(DMA15_PERIPHERAL_MAP, val)#define pDMA15_CURR_X_COUNT            ((uint16_t volatile *)DMA15_CURR_X_COUNT) /* DMA Channel 15 Current X Count Register */#define bfin_read_DMA15_CURR_X_COUNT() bfin_read16(DMA15_CURR_X_COUNT)#define bfin_write_DMA15_CURR_X_COUNT(val) bfin_write16(DMA15_CURR_X_COUNT, val)#define pDMA15_CURR_Y_COUNT            ((uint16_t volatile *)DMA15_CURR_Y_COUNT) /* DMA Channel 15 Current Y Count Register */#define bfin_read_DMA15_CURR_Y_COUNT() bfin_read16(DMA15_CURR_Y_COUNT)#define bfin_write_DMA15_CURR_Y_COUNT(val) bfin_write16(DMA15_CURR_Y_COUNT, val)#define pDMA16_NEXT_DESC_PTR           ((void * volatile *)DMA16_NEXT_DESC_PTR) /* DMA Channel 16 Next Descriptor Pointer Register */#define bfin_read_DMA16_NEXT_DESC_PTR() bfin_readPTR(DMA16_NEXT_DESC_PTR)#define bfin_write_DMA16_NEXT_DESC_PTR(val) bfin_writePTR(DMA16_NEXT_DESC_PTR, val)#define pDMA16_START_ADDR              ((void * volatile *)DMA16_START_ADDR) /* DMA Channel 16 Start Address Register */#define bfin_read_DMA16_START_ADDR()   bfin_readPTR(DMA16_START_ADDR)#define bfin_write_DMA16_START_ADDR(val) bfin_writePTR(DMA16_START_ADDR, val)#define pDMA16_CONFIG                  ((uint16_t volatile *)DMA16_CONFIG) /* DMA Channel 16 Configuration Register */#define bfin_read_DMA16_CONFIG()       bfin_read16(DMA16_CONFIG)#define bfin_write_DMA16_CONFIG(val)   bfin_write16(DMA16_CONFIG, val)#define pDMA16_X_COUNT                 ((uint16_t volatile *)DMA16_X_COUNT) /* DMA Channel 16 X Count Register */#define bfin_read_DMA16_X_COUNT()      bfin_read16(DMA16_X_COUNT)#define bfin_write_DMA16_X_COUNT(val)  bfin_write16(DMA16_X_COUNT, val)#define pDMA16_X_MODIFY                ((uint16_t volatile *)DMA16_X_MODIFY) /* DMA Channel 16 X Modify Register */#define bfin_read_DMA16_X_MODIFY()     bfin_read16(DMA16_X_MODIFY)#define bfin_write_DMA16_X_MODIFY(val) bfin_write16(DMA16_X_MODIFY, val)#define pDMA16_Y_COUNT                 ((uint16_t volatile *)DMA16_Y_COUNT) /* DMA Channel 16 Y Count Register */#define bfin_read_DMA16_Y_COUNT()      bfin_read16(DMA16_Y_COUNT)#define bfin_write_DMA16_Y_COUNT(val)  bfin_write16(DMA16_Y_COUNT, val)#define pDMA16_Y_MODIFY                ((uint16_t volatile *)DMA16_Y_MODIFY) /* DMA Channel 16 Y Modify Register */#define bfin_read_DMA16_Y_MODIFY()     bfin_read16(DMA16_Y_MODIFY)#define bfin_write_DMA16_Y_MODIFY(val) bfin_write16(DMA16_Y_MODIFY, val)#define pDMA16_CURR_DESC_PTR           ((void * volatile *)DMA16_CURR_DESC_PTR) /* DMA Channel 16 Current Descriptor Pointer Register */#define bfin_read_DMA16_CURR_DESC_PTR() bfin_readPTR(DMA16_CURR_DESC_PTR)#define bfin_write_DMA16_CURR_DESC_PTR(val) bfin_writePTR(DMA16_CURR_DESC_PTR, val)#define pDMA16_CURR_ADDR               ((void * volatile *)DMA16_CURR_ADDR) /* DMA Channel 16 Current Address Register */#define bfin_read_DMA16_CURR_ADDR()    bfin_readPTR(DMA16_CURR_ADDR)#define bfin_write_DMA16_CURR_ADDR(val) bfin_writePTR(DMA16_CURR_ADDR, val)#define pDMA16_IRQ_STATUS              ((uint16_t volatile *)DMA16_IRQ_STATUS) /* DMA Channel 16 Interrupt/Status Register */#define bfin_read_DMA16_IRQ_STATUS()   bfin_read16(DMA16_IRQ_STATUS)#define bfin_write_DMA16_IRQ_STATUS(val) bfin_write16(DMA16_IRQ_STATUS, val)#define pDMA16_PERIPHERAL_MAP          ((uint16_t volatile *)DMA16_PERIPHERAL_MAP) /* DMA Channel 16 Peripheral Map Register */#define bfin_read_DMA16_PERIPHERAL_MAP() bfin_read16(DMA16_PERIPHERAL_MAP)#define bfin_write_DMA16_PERIPHERAL_MAP(val) bfin_write16(DMA16_PERIPHERAL_MAP, val)#define pDMA16_CURR_X_COUNT            ((uint16_t volatile *)DMA16_CURR_X_COUNT) /* DMA Channel 16 Current X Count Register */#define bfin_read_DMA16_CURR_X_COUNT() bfin_read16(DMA16_CURR_X_COUNT)#define bfin_write_DMA16_CURR_X_COUNT(val) bfin_write16(DMA16_CURR_X_COUNT, val)#define pDMA16_CURR_Y_COUNT            ((uint16_t volatile *)DMA16_CURR_Y_COUNT) /* DMA Channel 16 Current Y Count Regist