#define bfin_read_EVT10()              bfin_readPTR(EVT10)#define bfin_write_EVT10(val)          bfin_writePTR(EVT10, val)#define pEVT11                         ((void * volatile *)EVT11) /* Event Vector 11 ESR Address */#define bfin_read_EVT11()              bfin_readPTR(EVT11)#define bfin_write_EVT11(val)          bfin_writePTR(EVT11, val)#define pEVT12                         ((void * volatile *)EVT12) /* Event Vector 12 ESR Address */#define bfin_read_EVT12()              bfin_readPTR(EVT12)#define bfin_write_EVT12(val)          bfin_writePTR(EVT12, val)#define pEVT13                         ((void * volatile *)EVT13) /* Event Vector 13 ESR Address */#define bfin_read_EVT13()              bfin_readPTR(EVT13)#define bfin_write_EVT13(val)          bfin_writePTR(EVT13, val)#define pEVT14                         ((void * volatile *)EVT14) /* Event Vector 14 ESR Address */#define bfin_read_EVT14()              bfin_readPTR(EVT14)#define bfin_write_EVT14(val)          bfin_writePTR(EVT14, val)#define pEVT15                         ((void * volatile *)EVT15) /* Event Vector 15 ESR Address */#define bfin_read_EVT15()              bfin_readPTR(EVT15)#define bfin_write_EVT15(val)          bfin_writePTR(EVT15, val)#define pILAT                          ((uint32_t volatile *)ILAT) /* Interrupt Latch Register */#define bfin_read_ILAT()               bfin_read32(ILAT)#define bfin_write_ILAT(val)           bfin_write32(ILAT, val)#define pIMASK                         ((uint32_t volatile *)IMASK) /* Interrupt Mask Register */#define bfin_read_IMASK()              bfin_read32(IMASK)#define bfin_write_IMASK(val)          bfin_write32(IMASK, val)#define pIPEND                         ((uint32_t volatile *)IPEND) /* Interrupt Pending Register */#define bfin_read_IPEND()              bfin_read32(IPEND)#define bfin_write_IPEND(val)          bfin_write32(IPEND, val)#define pIPRIO                         ((uint32_t volatile *)IPRIO) /* Interrupt Priority Register */#define bfin_read_IPRIO()              bfin_read32(IPRIO)#define bfin_write_IPRIO(val)          bfin_write32(IPRIO, val)#define pTCNTL                         ((uint32_t volatile *)TCNTL) /* Core Timer Control Register */#define bfin_read_TCNTL()              bfin_read32(TCNTL)#define bfin_write_TCNTL(val)          bfin_write32(TCNTL, val)#define pTPERIOD                       ((uint32_t volatile *)TPERIOD) /* Core Timer Period Register */#define bfin_read_TPERIOD()            bfin_read32(TPERIOD)#define bfin_write_TPERIOD(val)        bfin_write32(TPERIOD, val)#define pTSCALE                        ((uint32_t volatile *)TSCALE) /* Core Timer Scale Register */#define bfin_read_TSCALE()             bfin_read32(TSCALE)#define bfin_write_TSCALE(val)         bfin_write32(TSCALE, val)#define pTCOUNT                        ((uint32_t volatile *)TCOUNT) /* Core Timer Count Register */#define bfin_read_TCOUNT()             bfin_read32(TCOUNT)#define bfin_write_TCOUNT(val)         bfin_write32(TCOUNT, val)#define pUSB_FADDR                     ((uint16_t volatile *)USB_FADDR) /* Function address register */#define bfin_read_USB_FADDR()          bfin_read16(USB_FADDR)#define bfin_write_USB_FADDR(val)      bfin_write16(USB_FADDR, val)#define pUSB_POWER                     ((uint16_t volatile *)USB_POWER) /* Power management register */#define bfin_read_USB_POWER()          bfin_read16(USB_POWER)#define bfin_write_USB_POWER(val)      bfin_write16(USB_POWER, val)#define pUSB_INTRTX                    ((uint16_t volatile *)USB_INTRTX) /* Interrupt register for endpoint 0 and Tx endpoint 1 to 7 */#define bfin_read_USB_INTRTX()         bfin_read16(USB_INTRTX)#define bfin_write_USB_INTRTX(val)     bfin_write16(USB_INTRTX, val)#define pUSB_INTRRX                    ((uint16_t volatile *)USB_INTRRX) /* Interrupt register for Rx endpoints 1 to 7 */#define bfin_read_USB_INTRRX()         bfin_read16(USB_INTRRX)#define bfin_write_USB_INTRRX(val)     bfin_write16(USB_INTRRX, val)#define pUSB_INTRTXE                   ((uint16_t volatile *)USB_INTRTXE) /* Interrupt enable register for IntrTx */#define bfin_read_USB_INTRTXE()        bfin_read16(USB_INTRTXE)#define bfin_write_USB_INTRTXE(val)    bfin_write16(USB_INTRTXE, val)#define pUSB_INTRRXE                   ((uint16_t volatile *)USB_INTRRXE) /* Interrupt enable register for IntrRx */#define bfin_read_USB_INTRRXE()        bfin_read16(USB_INTRRXE)#define bfin_write_USB_INTRRXE(val)    bfin_write16(USB_INTRRXE, val)#define pUSB_INTRUSB                   ((uint16_t volatile *)USB_INTRUSB) /* Interrupt register for common USB interrupts */#define bfin_read_USB_INTRUSB()        bfin_read16(USB_INTRUSB)#define bfin_write_USB_INTRUSB(val)    bfin_write16(USB_INTRUSB, val)#define pUSB_INTRUSBE                  ((uint16_t volatile *)USB_INTRUSBE) /* Interrupt enable register for IntrUSB */#define bfin_read_USB_INTRUSBE()       bfin_read16(USB_INTRUSBE)#define bfin_write_USB_INTRUSBE(val)   bfin_write16(USB_INTRUSBE, val)#define pUSB_FRAME                     ((uint16_t volatile *)USB_FRAME) /* USB frame number */#define bfin_read_USB_FRAME()          bfin_read16(USB_FRAME)#define bfin_write_USB_FRAME(val)      bfin_write16(USB_FRAME, val)#define pUSB_INDEX                     ((uint16_t volatile *)USB_INDEX) /* Index register for selecting the indexed endpoint registers */#define bfin_read_USB_INDEX()          bfin_read16(USB_INDEX)#define bfin_write_USB_INDEX(val)      bfin_write16(USB_INDEX, val)#define pUSB_TESTMODE                  ((uint16_t volatile *)USB_TESTMODE) /* Enabled USB 20 test modes */#define bfin_read_USB_TESTMODE()       bfin_read16(USB_TESTMODE)#define bfin_write_USB_TESTMODE(val)   bfin_write16(USB_TESTMODE, val)#define pUSB_GLOBINTR                  ((uint16_t volatile *)USB_GLOBINTR) /* Global Interrupt Mask register and Wakeup Exception Interrupt */#define bfin_read_USB_GLOBINTR()       bfin_read16(USB_GLOBINTR)#define bfin_write_USB_GLOBINTR(val)   bfin_write16(USB_GLOBINTR, val)#define pUSB_GLOBAL_CTL                ((uint16_t volatile *)USB_GLOBAL_CTL) /* Global Clock Control for the core */#define bfin_read_USB_GLOBAL_CTL()     bfin_read16(USB_GLOBAL_CTL)#define bfin_write_USB_GLOBAL_CTL(val) bfin_write16(USB_GLOBAL_CTL, val)#define pUSB_TX_MAX_PACKET             ((uint16_t volatile *)USB_TX_MAX_PACKET) /* Maximum packet size for Host Tx endpoint */#define bfin_read_USB_TX_MAX_PACKET()  bfin_read16(USB_TX_MAX_PACKET)#define bfin_write_USB_TX_MAX_PACKET(val) bfin_write16(USB_TX_MAX_PACKET, val)#define pUSB_CSR0                      ((uint16_t volatile *)USB_CSR0) /* Control Status register for endpoint 0 and Control Status register for Host Tx endpoint */#define bfin_read_USB_CSR0()           bfin_read16(USB_CSR0)#define bfin_write_USB_CSR0(val)       bfin_write16(USB_CSR0, val)#define pUSB_TXCSR                     ((uint16_t volatile *)USB_TXCSR) /* Control Status register for endpoint 0 and Control Status register for Host Tx endpoint */#define bfin_read_USB_TXCSR()          bfin_read16(USB_TXCSR)#define bfin_write_USB_TXCSR(val)      bfin_write16(USB_TXCSR, val)#define pUSB_RX_MAX_PACKET             ((uint16_t volatile *)USB_RX_MAX_PACKET) /* Maximum packet size for Host Rx endpoint */#define bfin_read_USB_RX_MAX_PACKET()  bfin_read16(USB_RX_MAX_PACKET)#define bfin_write_USB_RX_MAX_PACKET(val) bfin_write16(USB_RX_MAX_PACKET, val)#define pUSB_RXCSR                     ((uint16_t volatile *)USB_RXCSR) /* Control Status register for Host Rx endpoint */#define bfin_read_USB_RXCSR()          bfin_read16(USB_RXCSR)#define bfin_write_USB_RXCSR(val)      bfin_write16(USB_RXCSR, val)#define pUSB_COUNT0                    ((uint16_t volatile *)USB_COUNT0) /* Number of bytes received in endpoint 0 FIFO and Number of bytes received in Host Tx endpoint */#define bfin_read_USB_COUNT0()         bfin_read16(USB_COUNT0)#define bfin_write_USB_COUNT0(val)     bfin_write16(USB_COUNT0, val)#define pUSB_RXCOUNT                   ((uint16_t volatile *)USB_RXCOUNT) /* Number of bytes received in endpoint 0 FIFO and Number of bytes received in Host Tx endpoint */#define bfin_read_USB_RXCOUNT()        bfin_read16(USB_RXCOUNT)#define bfin_write_USB_RXCOUNT(val)    bfin_write16(USB_RXCOUNT, val)#define pUSB_TXTYPE                    ((uint16_t volatile *)USB_TXTYPE) /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint */#define bfin_read_USB_TXTYPE()         bfin_read16(USB_TXTYPE)#define bfin_write_USB_TXTYPE(val)     bfin_write16(USB_TXTYPE, val)#define pUSB_NAKLIMIT0                 ((uint16_t volatile *)USB_NAKLIMIT0) /* Sets the NAK response timeout on Endpoint 0 and on Bulk transfers for Host Tx endpoint */#define bfin_read_USB_NAKLIMIT0()      bfin_read16(USB_NAKLIMIT0)#define bfin_write_USB_NAKLIMIT0(val)  bfin_write16(USB_NAKLIMIT0, val)#define pUSB_TXINTERVAL                ((uint16_t volatile *)USB_TXINTERVAL) /* Sets the NAK response timeout on Endpoint 0 and on Bulk transfers for Host Tx endpoint */#define bfin_read_USB_TXINTERVAL()     bfin_read16(USB_TXINTERVAL)#define bfin_write_USB_TXINTERVAL(val) bfin_write16(USB_TXINTERVAL, val)#define pUSB_RXTYPE                    ((uint16_t volatile *)USB_RXTYPE) /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint */#define bfin_read_USB_RXTYPE()         bfin_read16(USB_RXTYPE)#define bfin_write_USB_RXTYPE(val)     bfin_write16(USB_RXTYPE, val)#define pUSB_RXINTERVAL                ((uint16_t volatile *)USB_RXINTERVAL) /* Sets the polling interval for Interrupt and Isochronous transfers or the NAK response timeout on Bulk transfers */#define bfin_read_USB_RXINTERVAL()     bfin_read16(USB_RXINTERVAL)#define bfin_write_USB_RXINTERVAL(val) bfin_write16(USB_RXINTERVAL, val)#define pUSB_TXCOUNT                   ((uint16_t volatile *)USB_TXCOUNT) /* Number of bytes to be written to the selected endpoint Tx FIFO */#define bfin_read_USB_TXCOUNT()        bfin_read16(USB_TXCOUNT)#define bfin_write_USB_TXCOUNT(val)    bfin_write16(USB_TXCOUNT, val)#define pUSB_EP0_FIFO                  ((uint16_t volatile *)USB_EP0_FIFO) /* Endpoint 0 FIFO */#define bfin_read_USB_EP0_FIFO()       bfin_read16(USB_EP0_FIFO)#define bfin_write_USB_EP0_FIFO(val)   bfin_write16(USB_EP0_FIFO, val)#define pUSB_EP1_FIFO                  ((uint16_t volatile *)USB_EP1_FIFO) /* Endpoint 1 FIFO */#define bfin_read_USB_EP1_FIFO()       bfin_read16(USB_EP1_FIFO)#define bfin_write_USB_EP1_FIFO(val)   bfin_write16(USB_EP1_FIFO, val)#define pUSB_EP2_FIFO                  ((uint16_t volatile *)USB_EP2_FIFO) /* Endpoint 2 FIFO */#define bfin_read_USB_EP2_FIFO()       bfin_read16(USB_EP2_FIFO)#define bfin_write_USB_EP2_FIFO(val)   bfin_write16(USB_EP2_FIFO, val)#define pUSB_EP3_FIFO                  ((uint16_t volatile *)USB_EP3_FIFO) /* Endpoint 3 FIFO */#define bfin_read_USB_EP3_FIFO()       bfin_read16(USB_EP3_FIFO)#define bfin_write_USB_EP3_FIFO(val)   bfin_write16(USB_EP3_FIFO, val)#define pUSB_EP4_FIFO                  ((uint16_t volatile *)USB_EP4_FIFO) /* Endpoint 4 FIFO */#define bfin_read_USB_EP4_FIFO()       bfin_read16(USB_EP4_FIFO)#define bfin_write_USB_EP4_FIFO(val)   bfin_write16(USB_EP4_FIFO, val)#define pUSB_EP5_FIFO                  ((uint16_t volatile *)USB_EP5_FIFO) /* Endpoint 5 FIFO */#define bfin_read_USB_EP5_FIFO()       bfin_read16(USB_EP5_FIFO)#define bfin_write_USB_EP5_FIFO(val)   bfin_write16(USB_EP5_FIFO, val)#define pUSB_EP6_FIFO                  ((uint16_t volatile *)USB_EP6_FIFO) /* Endpoint 6 FIFO */#define bfin_read_USB_EP6_FIFO()       bfin_read16(USB_EP6_FIFO)#define bfin_write_USB_EP6_FIFO(val)   bfin_write16(USB_EP6_FIFO, val)#define pUSB_EP7_FIFO                  ((uint16_t volatile *)USB_EP7_FIFO) /* Endpoint 7 FIFO */#define bfin_read_USB_EP7_FIFO()       bfin_read16(USB_EP7_FIFO)#define bfin_write_USB_EP7_FIFO(val)   bfin_write16(USB_EP7_FIFO, val)#define pUSB_OTG_DEV_CTL               ((uint16_t volatile *)USB_OTG_DEV_CTL) /* OTG Device Control Register */#define bfin_read_USB_OTG_DEV_CTL()    bfin_read16(USB_OTG_DEV_CTL)#define bfin_write_USB_OTG_DEV_CTL(val) bfin_write16(USB_OTG_DEV_CTL, val)#define pUSB_OTG_VBUS_IRQ              ((uint16_t volatile *)USB_OTG_VBUS_IRQ) /* OTG VBUS Control Interrupts */#define bfin_read_USB_OTG_VBUS_IRQ()   bfin_read16(USB_OTG_VBUS_IRQ)#define bfin_write_USB_OTG_VBUS_IRQ(val) bfin_write16(USB_OTG_VBUS_IRQ, val)