?? pievect.c
字號:
/*********************************************************************
* File: PieVect.c *
* Description: Contains the PIE vector initialiation table and the *
* initialization function for the PIE vector table. *
* DSP: TMS320F2812 *
* Author: David M. Alter *
* Function List: InitPieVectTable() *
* History: *
* 11/05/02 - Original, based on DSP28 header files v0.58 (D. Alter)*
* Notes: none *
*********************************************************************/
/*********************************************************************
* THIS PROGRAM IS PROVIDED "AS IS". TI MAKES NO WARRANTIES OR *
* REPRESENTATIONS, EITHER EXPRESS, IMPLIED OR STATUTORY, *
* INCLUDING ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS *
* FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR *
* COMPLETENESS OF RESPONSES, RESULTS AND LACK OF NEGLIGENCE. *
* TI DISCLAIMS ANY WARRANTY OF TITLE, QUIET ENJOYMENT, QUIET *
* POSSESSION, AND NON-INFRINGEMENT OF ANY THIRD PARTY *
* INTELLECTUAL PROPERTY RIGHTS WITH REGARD TO THE PROGRAM OR *
* YOUR USE OF THE PROGRAM. *
* *
* IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, INCIDENTAL, *
* CONSEQUENTIAL OR INDIRECT DAMAGES, HOWEVER CAUSED, ON ANY *
* THEORY OF LIABILITY AND WHETHER OR NOT TI HAS BEEN ADVISED *
* OF THE POSSIBILITY OF SUCH DAMAGES, ARISING IN ANY WAY OUT *
* OF THIS AGREEMENT, THE PROGRAM, OR YOUR USE OF THE PROGRAM. *
* EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED TO, COST OF *
* REMOVAL OR REINSTALLATION, COMPUTER TIME, LABOR COSTS, LOSS *
* OF GOODWILL, LOSS OF PROFITS, LOSS OF SAVINGS, OR LOSS OF *
* USE OR INTERRUPTION OF BUSINESS. IN NO EVENT WILL TI'S *
* AGGREGATE LIABILITY UNDER THIS AGREEMENT OR ARISING OUT OF *
* YOUR USE OF THE PROGRAM EXCEED FIVE HUNDRED DOLLARS *
* (U.S.$500). *
* *
* Unless otherwise stated, the Program written and copyrighted *
* by Texas Instruments is distributed as "freeware". You may, *
* only under TI's copyright in the Program, use and modify the *
* Program without any charge or restriction. You may *
* distribute to third parties, provided that you transfer a *
* copy of this license to the third party and the third party *
* agrees to these terms by its first use of the Program. You *
* must reproduce the copyright notice and any other legend of *
* ownership on each copy or partial copy, of the Program. *
* *
* You acknowledge and agree that the Program contains *
* copyrighted material, trade secrets and other TI proprietary *
* information and is protected by copyright laws, *
* international copyright treaties, and trade secret laws, as *
* well as other intellectual property laws. To protect TI's *
* rights in the Program, you agree not to decompile, reverse *
* engineer, disassemble or otherwise translate any object code *
* versions of the Program to a human-readable form. You agree *
* that in no event will you alter, remove or destroy any *
* copyright notice included in the Program. TI reserves all *
* rights not specifically granted under this license. Except *
* as specifically provided herein, nothing in this agreement *
* shall be construed as conferring by implication, estoppel, *
* or otherwise, upon you, any license or other right under any *
* TI patents, copyrights or trade secrets. *
* *
* You may not use the Program in non-TI devices. *
*********************************************************************/
#include "Device.h"
/**********************************************************************
* The PIE vector initialization table
**********************************************************************/
const struct PIE_VECT_TABLE PieVectTableInit = {
/*** Base vectors ***/
PIE_RESERVED, // 0x000D00 reserved
PIE_RESERVED, // 0x000D02 reserved
PIE_RESERVED, // 0x000D04 reserved
PIE_RESERVED, // 0x000D06 reserved
PIE_RESERVED, // 0x000D08 reserved
PIE_RESERVED, // 0x000D0A reserved
PIE_RESERVED, // 0x000D0C reserved
PIE_RESERVED, // 0x000D0E reserved
PIE_RESERVED, // 0x000D10 reserved
PIE_RESERVED, // 0x000D12 reserved
PIE_RESERVED, // 0x000D14 reserved
PIE_RESERVED, // 0x000D16 reserved
PIE_RESERVED, // 0x000D18 reserved
INT13_ISR, // 0x000D1A INT13 - XINT13 (or CPU Timer1, reserved for TI)
INT14_ISR, // 0x000D1C INT14 - CPU Timer2, reserved for TI
DATALOG_ISR, // 0x000D1E DATALOG - CPU data logging interrupt
RTOSINT_ISR, // 0x000D20 RTOSINT - CPU RTOS interrupt
EMUINT_ISR, // 0x000D22 EMUINT - CPU emulation interrupt
NMI_ISR, // 0x000D24 NMI - XNMI interrupt
ILLEGAL_ISR, // 0x000D26 ILLEGAL - illegal operation trap
USER0_ISR, // 0x000D28 USER0 - software interrupt #0
USER1_ISR, // 0x000D2A USER1 - software interrupt #1
USER2_ISR, // 0x000D2C USER2 - software interrupt #2
USER3_ISR, // 0x000D2E USER3 - software interrupt #3
USER4_ISR, // 0x000D30 USER4 - software interrupt #4
USER5_ISR, // 0x000D32 USER5 - software interrupt #5
USER6_ISR, // 0x000D34 USER6 - software interrupt #6
USER7_ISR, // 0x000D36 USER7 - software interrupt #7
USER8_ISR, // 0x000D38 USER8 - software interrupt #8
USER9_ISR, // 0x000D3A USER9 - software interrupt #9
USER10_ISR, // 0x000D3C USER10 - software interrupt #10
USER11_ISR, // 0x000D3E USER11 - software interrupt #11
/*** Core interrupt #1 re-map ***/
PDPINTA_ISR, // 0x000D40 PDPINTA (EV-A)
PDPINTB_ISR, // 0x000D42 PDPINTB (EV-B)
rsvd_ISR, // 0x000D44 reserved
XINT1_ISR, // 0x000D46 XINT1
XINT2_ISR, // 0x000D48 XINT2
ADCINT_ISR, // 0x000D4A ADCINT (ADC)
TINT0_ISR, // 0x000D4C TINT0 (CPU TIMER 0)
WAKEINT_ISR, // 0x000D4E WAKEINT (LPM/WD)
/*** Core interrupt #2 re-map ***/
CMP1INT_ISR, // 0x000D50 CMP1INT (EV-A)
CMP2INT_ISR, // 0x000D52 CMP2INT (EV-A)
CMP3INT_ISR, // 0x000D54 CMP3INT (EV-A)
T1PINT_ISR, // 0x000D56 T1PINT (EV-A)
T1CINT_ISR, // 0x000D58 T1CINT (EV-A)
T1UFINT_ISR, // 0x000D5A T1UFINT (EV-A)
T1PINT_ISR, // 0x000D5C T1OFINT (EV-A)
rsvd_ISR, // 0x000D5E reserved
/*** Core interrupt #3 re-map ***/
T2PINT_ISR, // 0x000D60 T2PINT (EV-A)
T2CINT_ISR, // 0x000D62 T2CINT (EV-A)
T2UFINT_ISR, // 0x000D64 T2UFINT (EV-A)
T2OFINT_ISR, // 0x000D66 T2OFINT (EV-A)
CAPINT1_ISR, // 0x000D68 CAPINT1 (EV-A)
CAPINT2_ISR, // 0x000D6A CAPINT2 (EV-A)
CAPINT3_ISR, // 0x000D6C CAPINT3 (EV-A)
rsvd_ISR, // 0x000D6E reserved
/*** Core interrupt #4 re-map ***/
CMP4INT_ISR, // 0x000D70 CMP4INT (EV-B)
CMP5INT_ISR, // 0x000D72 CMP5INT (EV-B)
CMP6INT_ISR, // 0x000D74 CMP6INT (EV-B)
T3PINT_ISR, // 0x000D76 T3PINT (EV-B)
T3CINT_ISR, // 0x000D78 T3CINT (EV-B)
T3UFINT_ISR, // 0x000D7A T3UFINT (EV-B)
T3OFINT_ISR, // 0x000D7C T3OFINT (EV-B)
rsvd_ISR, // 0x000D7E reserved
/*** Core interrupt #5 re-map ***/
T4PINT_ISR, // 0x000D80 T4PINT (EV-B)
T4CINT_ISR, // 0x000D82 T4CINT (EV-B)
T4UFINT_ISR, // 0x000D84 T4UFINT (EV-B)
T4OFINT_ISR, // 0x000D86 T4OFINT (EV-B)
CAPINT4_ISR, // 0x000D88 CAPINT4 (EV-B)
CAPINT5_ISR, // 0x000D8A CAPINT5 (EV-B)
CAPINT6_ISR, // 0x000D8C CAPINT6 (EV-B)
rsvd_ISR, // 0x000D8E reserved
/*** Core interrupt #6 re-map ***/
SPIRXINTA_ISR, // 0x000D90 SPIRXINTA (SPI)
SPITXINTA_ISR, // 0x000D92 SPITXINTA (SPI)
rsvd_ISR, // 0x000D94 reserved
rsvd_ISR, // 0x000D96 reserved
MRINTA_ISR, // 0x000D98 MRINT (McBSP)
MXINTA_ISR, // 0x000D9A MXINT (McBSP)
rsvd_ISR, // 0x000D9C reserved
rsvd_ISR, // 0x000D9E reserved
/*** Core interrupt #7 re-map ***/
rsvd_ISR, // 0x000DA0 reserved
rsvd_ISR, // 0x000DA2 reserved
rsvd_ISR, // 0x000DA4 reserved
rsvd_ISR, // 0x000DA6 reserved
rsvd_ISR, // 0x000DA8 reserved
rsvd_ISR, // 0x000DAA reserved
rsvd_ISR, // 0x000DAC reserved
rsvd_ISR, // 0x000DAE reserved
/*** Core interrupt #8 re-map ***/
rsvd_ISR, // 0x000DB0 reserved
rsvd_ISR, // 0x000DB2 reserved
rsvd_ISR, // 0x000DB4 reserved
rsvd_ISR, // 0x000DB6 reserved
rsvd_ISR, // 0x000DB8 reserved
rsvd_ISR, // 0x000DBA reserved
rsvd_ISR, // 0x000DBC reserved
rsvd_ISR, // 0x000DBE reserved
/*** Core interrupt #9 re-map ***/
SCIRXINTA_ISR, // 0x000DC0 SCIRXINTA (SCI-A)
SCITXINTA_ISR, // 0x000DC2 SCITXINTA (SCI-A)
SCIRXINTB_ISR, // 0x000DC4 SCIRXINTB (SCI-B)
SCITXINTB_ISR, // 0x000DC6 SCITXINTB (SCI-B)
ECAN0INTA_ISR, // 0x000DC8 ECAN0INT (CAN)
ECAN1INTA_ISR, // 0x000DCA ECAN1INT (CAN)
rsvd_ISR, // 0x000DCC reserved
rsvd_ISR, // 0x000DCE reserved
/*** Core interrupt #10 re-map ***/
rsvd_ISR, // 0x000DD0 reserved
rsvd_ISR, // 0x000DD2 reserved
rsvd_ISR, // 0x000DD4 reserved
rsvd_ISR, // 0x000DD6 reserved
rsvd_ISR, // 0x000DD8 reserved
rsvd_ISR, // 0x000DDA reserved
rsvd_ISR, // 0x000DDC reserved
rsvd_ISR, // 0x000DDE reserved
/*** Core interrupt #11 re-map ***/
rsvd_ISR, // 0x000DE0 reserved
rsvd_ISR, // 0x000DE2 reserved
rsvd_ISR, // 0x000DE4 reserved
rsvd_ISR, // 0x000DE6 reserved
rsvd_ISR, // 0x000DE8 reserved
rsvd_ISR, // 0x000DEA reserved
rsvd_ISR, // 0x000DEC reserved
rsvd_ISR, // 0x000DEE reserved
/*** Core interrupt #12 re-map ***/
rsvd_ISR, // 0x000DF0 reserved
rsvd_ISR, // 0x000DF2 reserved
rsvd_ISR, // 0x000DF4 reserved
rsvd_ISR, // 0x000DF6 reserved
rsvd_ISR, // 0x000DF8 reserved
rsvd_ISR, // 0x000DFA reserved
rsvd_ISR, // 0x000DFC reserved
rsvd_ISR, // 0x000DFE reserved
}; //end PieVectTableInit{}
/*********************************************************************
* Function: InitPieVectTable() *
* Description: Initializes the PIE vectors with the contents of the *
* PIE initialization table PieVectTableInit{}. *
* DSP: TMS320F2812 *
* Include files: none *
* Function Prototype: void InitPieVectTable(void) *
* Useage: InitPieVectTable(); *
* Input Parameters: none *
* Return Value: none *
* Notes: none *
*********************************************************************/
void InitPieVectTable(void)
{
/*** Local Variables ***/
int16 i; //general purpose int
Uint32 *Source = (void *) &PieVectTableInit; //source pointer
Uint32 *Dest = (void *) &PieVectTable; //destination pointer
/*** Enable EALLOW protected register access ***/
asm(" EALLOW");
/*** Copy the init table to the PIE vectors ***/
for(i=0; i<128; i++) *Dest++ = *Source++;
/*** Disable EALLOW protected register access ***/
asm(" EDIS");
/*** Enable the PIE ***/
PieCtrlRegs.PIECRTL.bit.ENPIE = 1;
} //end InitPieVectTable()
/*** end of file *****************************************************/
?? 快捷鍵說明
復制代碼
Ctrl + C
搜索代碼
Ctrl + F
全屏模式
F11
切換主題
Ctrl + Shift + D
顯示快捷鍵
?
增大字號
Ctrl + =
減小字號
Ctrl + -