/********************************************************************/
/*  Copyright 2004 by BTECH Incorporated.							*/
/*  All rights reserved. Property of BTECH Incorporated.				*/
/*  Restricted rights to use, duplicate or disclose this code are	*/
/*  granted through contract.									    */
/*  															    */
/********************************************************************/


/********************************************************************/
/*                        系統初始化                                */
/********************************************************************/


#include <csl.h>
#include <csl_emifa.h>
#include <csl_i2c.h>
#include <csl_gpio.h>
#include <csl_irq.h>
#include <csl_chip.h>
#include <csl_dat.h>
#include <csl_cache.h>
#include "iic.h"
#include "vportcap.h"
#include "vportdis.h"
#include "TVP51xx.h"
#include "TVP51xx.h"
#include "evmdm642.h"
#include "saa7105.h"

/*DM642的emifa的設置結構*/
EMIFA_Config dm642ConfigA ={
	   0x00052078,/*gblctl EMIFA(B)global control register value */
	   			  /*將CLK6、4、1使能；將MRMODE置1；使能EK2EN,EK2RATE*/
	   0xffffffd3,/*cectl0 CE0 space control register value*/
	   			  /*將CE0空間設為SDRAM*/
	   0x73a28e01,/*cectl1 CE1 space control register value*/
	   			  /*Read hold: 1 clock;
	   			    MTYPE : 0000,選擇8位的異步接口
	   			    Read strobe ：001110；14個clock寬度
	   			    TA：2 clock; Read setup 2 clock;
	   			    Write hold :2 clock; Write strobe: 14 clock
	   			    Write setup :7 clock
	   			    --					 ---------------
	   			  	  \		 14c		/1c
	   			 	   \----------------/ */
	   0x22a28a22, /*cectl2 CE2 space control register value*/
       0x22a28a42, /*cectl3 CE3 space control register value*/
	   0x57115000, /*sdctl SDRAM control register value*/
	   0x0000081b, /*sdtim SDRAM timing register value*/
	   0x001faf4d, /*sdext SDRAM extension register value*/
	   0x00000002, /*cesec0 CE0 space secondary control register value*/
	   0x00000002, /*cesec1 CE1 space secondary control register value*/
	   0x00000002, /*cesec2 CE2 space secondary control register value*/
	   0x00000073 /*cesec3 CE3 space secondary control register value*/	
};

/*DM642的IIC的設置結構*/
I2C_Config DM642IIC_Config = {
    0,  /* master mode,  i2coar;采用主模式   */
    0,  /* no interrupt, i2cimr;只寫，不讀，采用無中斷方式*/
    (20-5), /* scl low time, i2cclkl;  */
    (20-5), /* scl high time,i2cclkh;  */
    1,  /* configure later, i2ccnt;*/
    0,  /* configure later, i2csar;*/
    0x4ea0, /* master tx mode,     */
            /* i2c runs free,      */
            /* 8-bit data + NACK   */
            /* no repeat mode      */
    (75-1), /* 4MHz clock, i2cpsc  */
};

CHIP_Config DM642percfg = {
	CHIP_VP2+\
	CHIP_VP1+\
	CHIP_VP0+\
	CHIP_I2C
};

I2C_Handle hdm642i2c,hI2C;
extern int portNumber;
Uint8 vFromat = 0;
Uint8 misc_ctrl = 0x6D;
Uint8 output_format = 0x47;
// 地址為0 for cvbs port1,選擇復合信號做為輸入
Uint8 input_sel = 0x00;
/*地址為0xf，將Pin27設置成為CAPEN功能*/	
Uint8 pin_cfg = 0x02;
/*地址為1B*/
Uint8 chro_ctrl_2 = 0x14;
/*圖像句柄的聲明*/
extern VP_Handle vpHchannel0;
extern VP_Handle vpHchannel1;
extern VP_Handle vpHchannel2;


/*圖像格式標志*/
extern Uint8 NTSCorPAL;
extern far void vectors();

/*此程序可將四個采集口的數據經過Video Port0送出*/
void sysinit()
{
	Uint8 addrI2C;	
/*-------------------------------------------------------*/
/* perform all initializations                           */
/*-------------------------------------------------------*/
	/*Initialise CSL，初始化CSL庫*/
	CSL_init();		
	/*
	CACHE_clean(CACHE_L2ALL, 0, 0);
    CACHE_setL2Mode(CACHE_64KCACHE); 
	CACHE_enableCaching(CACHE_EMIFA_CE00);
	CACHE_enableCaching(CACHE_EMIFA_CE01);
	*/
	CHIP_config(&DM642percfg);
/*----------------------------------------------------------*/
	/*EMIFA的初始化，將CE0設為SDRAM空間，CE1設為異步空間
	 注，DM642支持的是EMIFA，而非EMIF*/
	EMIFA_config(&dm642ConfigA);
//   
/*----------------------------------------------------------*/
	/*中斷向量表的初始化*/
	//Point to the IRQ vector table
    IRQ_setVecs(vectors);
  
    IRQ_map(IRQ_EVT_VINT1,11);
    IRQ_map(IRQ_EVT_VINT2, 12);
    IRQ_reset(IRQ_EVT_VINT1);
    IRQ_reset(IRQ_EVT_VINT2);
    
    IRQ_nmiEnable();
    IRQ_globalEnable();
/*---------------------------------------------------------*/	
    /*打開一個數據拷貝的數據通路*/
    DAT_open(DAT_CHAANY, DAT_PRI_LOW, DAT_OPEN_2D);	
/*----------------------------------------------------------*/	
	/*進行IIC的初始化*/
	hdm642i2c = I2C_open(I2C_PORT0,I2C_OPEN_RESET);
	I2C_config(hdm642i2c,&DM642IIC_Config);
/*----------------------------------------------------------*/
	/*進行TVP5150pbs的初始化*/
	//addrI2C = 0xBA >>1;
	addrI2C = 0xB8 >>1;	
    _IIC_write_byte(hdm642i2c, addrI2C,0x00, input_sel);
    _IIC_write_byte(hdm642i2c, addrI2C,0x03, misc_ctrl);
    _IIC_write_byte(hdm642i2c, addrI2C,0x0D, output_format);
    _IIC_write_byte(hdm642i2c, addrI2C,0x0F, pin_cfg);
    _IIC_write_byte(hdm642i2c, addrI2C,0x1B, chro_ctrl_2);
    /*回讀當前攝像設備的格式*/
	_IIC_read_byte(hdm642i2c, addrI2C,0x0F, &vFromat);
    _IIC_read_byte(hdm642i2c, addrI2C,0x8c, &vFromat);
    vFromat = vFromat & 0xff;
	switch (vFromat)
	{
		case TVP51XX_NTSCM:
		case TVP51XX_NTSC443:
			NTSCorPAL = 1;/*系統為NTSC的模式*/
			break;
		case TVP51XX_PALBGHIN:
		case TVP51XX_PALM:
			NTSCorPAL = 0;/*系統為PAL的模式*/
			break;
		default:
			NTSCorPAL = 2;/*系統為不支持的模式*/
			break;
	}
	if(NTSCorPAL ==2)
	{
		/*系統不支持的模式，重新配置*/
		for(;;)
		{}
	}  		  
/*----------------------------------------------------------*/	
	/*進行SAA7105H的初始化*/
    EVMDM642_GPIO_init(); 
    EVMDM642_HD_SEL(0); /*A板CPLD設置,B板用戶忽略*/

	portNumber = 2;
	vpHchannel2 = bt656_8bit_ncfd(portNumber);

	hI2C =  hdm642i2c;
	resetSAA7105();
	configSAA7105(SAA7105_MODE_PAL720, TRUE,  SAA7105_AFMT_COMPOSITE, SAA7105_IFMT_YCBCR422_INTERLACED, TRUE);
	setSAA7105SyncMode(SAA7105_MODE_PAL720,TRUE);	
/*----------------------------------------------------------*/
}