?? norflashamd.c
字號:
{
amd_Reset(pNorFlashInfo, address);
}
//------------------------------------------------------------------------------
/// The Read Device Identifier command instructs the device to output manufacturer
/// code.
/// \param pNorFlashInfo Pointer to an NorFlashInfo instance.
//------------------------------------------------------------------------------
unsigned int AMD_ReadManufactoryId(struct NorFlashInfo *pNorFlashInfo)
{
return amd_ReadIdentification(pNorFlashInfo, AMD_MANU_ID);
}
//------------------------------------------------------------------------------
/// The Read Device Identifier command instructs the device to output device id.
/// \param pNorFlashInfo Pointer to an NorFlashInfo instance.
//------------------------------------------------------------------------------
unsigned int AMD_ReadDeviceID(struct NorFlashInfo *pNorFlashInfo)
{
return amd_ReadIdentification(pNorFlashInfo, AMD_DEVIDE_ID);
}
//------------------------------------------------------------------------------
/// Erases the specified block of the device. Returns 0 if the operation was
/// successful; otherwise returns an error code.
/// \param pNorFlashInfo Pointer to an NorFlashInfo instance.
/// \param address Address offset to be erase.
//------------------------------------------------------------------------------
unsigned char AMD_EraseSector(
struct NorFlashInfo *pNorFlashInfo,
unsigned int address)
{
unsigned int pollingData;
unsigned int busAddress;
unsigned char busWidth;
unsigned char done = 0;
busWidth = NorFlash_GetDataBusWidth(pNorFlashInfo);
//Programming is a six-bus-cycle operation.
// The erase command sequence is initiated by writing two unlock write cycles.
WriteCommand(busWidth,
NorFlash_GetByteAddressInChip(pNorFlashInfo, AMD_OFFSET_UNLOCK_1),
AMD_CMD_UNLOCK_1);
WriteCommand(busWidth,
NorFlash_GetByteAddressInChip(pNorFlashInfo, AMD_OFFSET_UNLOCK_2),
AMD_CMD_UNLOCK_2);
// Followed by the program set-up command.
WriteCommand(busWidth,
NorFlash_GetByteAddressInChip(pNorFlashInfo, AMD_OFFSET_UNLOCK_1),
AMD_CMD_ERASE_SETUP);
// Two additional unlock cycles are written.
WriteCommand(busWidth,
NorFlash_GetByteAddressInChip(pNorFlashInfo, AMD_OFFSET_UNLOCK_1),
AMD_CMD_UNLOCK_1);
WriteCommand(busWidth,
NorFlash_GetByteAddressInChip(pNorFlashInfo, AMD_OFFSET_UNLOCK_2),
AMD_CMD_UNLOCK_2);
// Followed by the address of the sector to be erased, and the sector erase command.
busAddress = NorFlash_GetAddressInChip(pNorFlashInfo,address);
WriteCommand(busWidth, busAddress, AMD_CMD_ERASE_SECTOR);
// Data polling
do {
ReadRawData(busWidth, busAddress, (unsigned char *)&pollingData);
// Check if the chip erase algorithm is completed.
if ((pollingData & AMD_POLLING_DQ7) == AMD_POLLING_DQ7 ) {
// Erase operation successful. Device in read mode.
done = 1;
}
else {
// check if sector earse algrithm exceeded timing limits
if (pollingData & AMD_POLLING_DQ5 ) {
// I/O should be rechecked.
ReadRawData(busWidth, busAddress, (unsigned char *)&pollingData);
if ((pollingData & AMD_POLLING_DQ7) == AMD_POLLING_DQ7 ){
// Erase operation successful. Device in read mode.
done = 1;
}
else {
// Erase operation not successful, write reset command.
amd_Reset(pNorFlashInfo, 0);
return NorCommon_ERROR_CANNOTERASE;
}
}
}
} while (!done);
return 0;
}
//------------------------------------------------------------------------------
/// Erases all the block of the device. Returns 0 if the operation was successful;
/// otherwise returns an error code.
/// \param pNorFlashInfo Pointer to an NorFlashInfo instance.
//------------------------------------------------------------------------------
unsigned char AMD_EraseChip(struct NorFlashInfo *pNorFlashInfo)
{
unsigned int pollingData;
unsigned char busWidth;
unsigned int address;
unsigned char done = 0;
busWidth = NorFlash_GetDataBusWidth(pNorFlashInfo);
//Programming is a six-bus-cycle operation.
// The erase command sequence is initiated by writing two unlock write cycles.
WriteCommand(busWidth ,
NorFlash_GetByteAddressInChip(pNorFlashInfo, AMD_OFFSET_UNLOCK_1),
AMD_CMD_UNLOCK_1);
WriteCommand(busWidth ,
NorFlash_GetByteAddressInChip(pNorFlashInfo, AMD_OFFSET_UNLOCK_2),
AMD_CMD_UNLOCK_2);
// Followed by the program set-up command.
WriteCommand(busWidth ,
NorFlash_GetByteAddressInChip(pNorFlashInfo, AMD_OFFSET_UNLOCK_1),
AMD_CMD_ERASE_SETUP);
// Two additional unlock cycles are written.
WriteCommand(busWidth ,
NorFlash_GetByteAddressInChip(pNorFlashInfo, AMD_OFFSET_UNLOCK_1),
AMD_CMD_UNLOCK_1);
WriteCommand(busWidth ,
NorFlash_GetByteAddressInChip(pNorFlashInfo, AMD_OFFSET_UNLOCK_2),
AMD_CMD_UNLOCK_2);
// Then followed by the chip erase command.
WriteCommand(busWidth ,
NorFlash_GetByteAddressInChip(pNorFlashInfo, AMD_OFFSET_UNLOCK_1),
AMD_CMD_ERASE_CHIP);
address = NorFlash_GetByteAddressInChip(pNorFlashInfo, 0);
// Data polling
do {
ReadRawData(busWidth , address, (unsigned char*)&pollingData);
// Check if the chip erase algorithm is completed.
if ((pollingData & AMD_POLLING_DQ7) == AMD_POLLING_DQ7 ) {
// Erase operation successful. Device in read mode.
done = 1;
}
else {
// When the time-out period is complete, DQ3 switches from a “0” to a “1.”
if (pollingData & AMD_POLLING_DQ3 ) {
return NorCommon_ERROR_CANNOTERASE;
}
// check if chip earse algrithm exceeded timing limits
if (pollingData & AMD_POLLING_DQ5 ) {
// I/O should be rechecked.
ReadRawData(busWidth , address, (unsigned char*)&pollingData);
if ((pollingData & AMD_POLLING_DQ7) == AMD_POLLING_DQ7 ){
// Erase operation successful. Device in read mode.
done = 1;
}
else {
// Erase operation not successful, write reset command.
amd_Reset(pNorFlashInfo, 0);
return NorCommon_ERROR_CANNOTERASE;
}
}
}
} while (!done);
return 0;
}
//------------------------------------------------------------------------------
/// Sends data to the NorFlashInfo chip from the provided buffer.
/// \param pNorFlashInfo Pointer to an NorFlashInfo instance.
/// \param address Start address offset to be wrote.
/// \param buffer Buffer where the data is stored.
/// \param size Number of bytes that will be written.
//------------------------------------------------------------------------------
unsigned char AMD_Write_Data(
struct NorFlashInfo *pNorFlashInfo,
unsigned int address,
unsigned char *buffer,
unsigned int size)
{
unsigned int i;
unsigned char busWidth;
busWidth = pNorFlashInfo->deviceChipWidth;
if (busWidth == FLASH_CHIP_WIDTH_8BITS ){
for(i=0; i < size; i++) {
if(amd_Program(pNorFlashInfo, address, buffer[i])) {
return NorCommon_ERROR_CANNOTWRITE;
}
address ++;
}
}
else if( busWidth == FLASH_CHIP_WIDTH_16BITS ){
unsigned short *buffer16 = (unsigned short *) buffer;
size >>= 1;
for(i=0; i < size; i++) {
if(amd_Program(pNorFlashInfo, address, buffer16[i])){
return NorCommon_ERROR_CANNOTWRITE;
}
address+= 2;
}
}
else if(busWidth == FLASH_CHIP_WIDTH_32BITS ){
unsigned int *buffer32 = (unsigned int *) buffer;
size >>= 2;
for(i=0; i < size; i++) {
if(amd_Program(pNorFlashInfo, address, buffer32[i])){
return NorCommon_ERROR_CANNOTWRITE;
}
address+= 4;
}
}
return 0;
}
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