?? flushlogic.v
字號:
/*******************************************************************/
/* This module implements the logic to flush the entropy */
/* encoder pipeline after the last data has arrived */
/*******************************************************************/
module FlushLogic( Reset,
Clock,
Enable,
EndData,
ReadyIn,
Flush,
LastData,
ReadyOut
);
input Reset;
input Clock;
input Enable;
input EndData; // Signals the end of data arrival
input ReadyIn; // Ready status from Data Packer
output Flush; // Signal used to flush the pipeline
output LastData; // Informs Data Packer about last data
output ReadyOut; // Informs the top controller of status
reg Flush;
reg LastData;
reg ReadyOut;
integer Index; // Used to track flush count
reg Over; // Internal flag, set after EndData Pulse
always@(posedge Clock or negedge Reset)
begin
if(!Reset)
begin
Flush <= 0;
Over <= 0;
LastData <= 0;
ReadyOut <= 0;
Index <= 0;
end
else if(Enable)
begin
if(EndData) // if last data has arrived
Over <= 1; // set the internal flag
if(Over) // if internal flag set, start counter
Index <= Index + 1;
if(Index==2) // time to set the flush signal
Flush <= 1;
else if(Index==9) // time to lower the flush signal
Flush <= 0;
else if(Index==14) // time to inform data packer
LastData <= 1;
if(ReadyIn & Over) // if data packer has finished work
begin
ReadyOut <= 1;
Over <= 0;
Index <= 0;
end
else
ReadyOut <= 0;
end
end
endmodule
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