LONG(DEFINED(__AltQEIInterrupt)   ? ABSOLUTE(__AltQEIInterrupt)   :
        (DEFINED(__QEIInterrupt)      ? ABSOLUTE(__QEIInterrupt)      :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltDCIInterrupt)   ? ABSOLUTE(__AltDCIInterrupt)   :
        (DEFINED(__DCIInterrupt)      ? ABSOLUTE(__DCIInterrupt)      :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltLVDInterrupt)   ? ABSOLUTE(__AltLVDInterrupt)   :
        (DEFINED(__LVDInterrupt)      ? ABSOLUTE(__LVDInterrupt)      :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltFLTAInterrupt)  ? ABSOLUTE(__AltFLTAInterrupt)  :
        (DEFINED(__FLTAInterrupt)     ? ABSOLUTE(__FLTAInterrupt)     :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltFLTBInterrupt)  ? ABSOLUTE(__AltFLTBInterrupt)  :
        (DEFINED(__FLTBInterrupt)     ? ABSOLUTE(__FLTBInterrupt)     :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltInterrupt45)    ? ABSOLUTE(__AltInterrupt45)    :
        (DEFINED(__Interrupt45)       ? ABSOLUTE(__Interrupt45)       :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltInterrupt46)    ? ABSOLUTE(__AltInterrupt46)    :
        (DEFINED(__Interrupt46)       ? ABSOLUTE(__Interrupt46)       :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltInterrupt47)    ? ABSOLUTE(__AltInterrupt47)    :
        (DEFINED(__Interrupt47)       ? ABSOLUTE(__Interrupt47)       :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltInterrupt48)    ? ABSOLUTE(__AltInterrupt48)    :
        (DEFINED(__Interrupt48)       ? ABSOLUTE(__Interrupt48)       :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltInterrupt49)    ? ABSOLUTE(__AltInterrupt49)    :
        (DEFINED(__Interrupt49)       ? ABSOLUTE(__Interrupt49)       :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltInterrupt50)    ? ABSOLUTE(__AltInterrupt50)    :
        (DEFINED(__Interrupt50)       ? ABSOLUTE(__Interrupt50)       :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltInterrupt51)    ? ABSOLUTE(__AltInterrupt51)    :
        (DEFINED(__Interrupt51)       ? ABSOLUTE(__Interrupt51)       :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltInterrupt52)    ? ABSOLUTE(__AltInterrupt52)    :
        (DEFINED(__Interrupt52)       ? ABSOLUTE(__Interrupt52)       :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltInterrupt53)    ? ABSOLUTE(__AltInterrupt53)    :
        (DEFINED(__Interrupt53)       ? ABSOLUTE(__Interrupt53)       :
         ABSOLUTE(__DefaultInterrupt)));
  } >aivt

} /* SECTIONS */


/* File Description | Notes:
** =========================
** 1] This file maps special function register(SFR) names used in the datasheet
**   to memory locations in the PIC30Fxxxx device. The memory locations are
**    byte addresses. The PIC30Fxxxx is a family of byte addressable devices.
** 2] The register names used in this file are taken to match the
**    PIC30Fxxxx data sheets as closely as possible.
** 3] SFR address definitions are listed in the ascending order of memory
**    addresses and are grouped based on the module they belong to. For e.g.,
**    WREG10 is listed before ACCAL, and the Core SFRs are grouped
**    separately, prior to the Interrupt Controller SFRs or the General
**    Purpose Timer SFRs.
** 4] SFR names exactly match names in the device specific C "header" file
**    and the Assembly "include" file. Any changes to names in one of these
**    files, calls for similar changes in the other two.
**
* Revision History:
** =================
**-------------------------------------------------------------------------
**Rev:   Date:        Details:                                    Who:
**-------------------------------------------------------------------------
**1.0   11/29/01     Device linker provides from superset       h vasuki
**1.1   13 Dec 2001   Added PMD registers + some changes          -do-
**1.2   02 Dec 2002  CAN buffer correction                        -do-
**1.3   13 Feb 2003  ADCSSLBits/ADPCFGBits Address correction     -do-
**1.4   05 May 2003  Initial release of linker scripts for rev    -do-
**                   B silicon with changes in CAN section
**1.5   06 Oct 2003  CAN2 SFR addess changes                    h vasuki
**                                                              p sinha
**1.6   25 Nov 2003  CAN2 SFR bytes additions                   h vasuki
**1.7   30 Jul 2004  ADCBUF0-ADCBUFF Address Correction         h vasuki
**1.7a  25 Oct 2004  New Device File                            h vasuki
**1.7b  17 Dec 2004  CAN TXERRCNT Address Correction            h vasuki
**
**-------------------------------------------------------------------------
**
**
***************************************/


/*=========================================================================
**       Register Definitions
** (Core and Peripheral Registers in Data Space)
**==========================================================================
**
**==========================================================================
**
**       dsPIC Core Register Definitions
**
**=========================================================================*/
 WREG0 = 0x0000;
_WREG0 = 0x0000;
 WREG1 = 0x0002;
_WREG1 = 0x0002;
 WREG2 = 0x0004;
_WREG2 = 0x0004;
 WREG3 = 0x0006;
_WREG3 = 0x0006;
 WREG4 = 0x0008;
_WREG4 = 0x0008;
 WREG5 = 0x000A;
_WREG5 = 0x000A;
 WREG6 = 0x000C;
_WREG6 = 0x000C;
 WREG7 = 0x000E;
_WREG7 = 0x000E;
 WREG8 = 0x0010;
_WREG8 = 0x0010;
 WREG9 = 0x0012;
_WREG9 = 0x0012;
 WREG10 = 0x0014;
_WREG10 = 0x0014;
 WREG11 = 0x0016;
_WREG11 = 0x0016;
 WREG12 = 0x0018;
_WREG12 = 0x0018;
 WREG13 = 0x001A;
_WREG13 = 0x001A;
 WREG14 = 0x001C;
_WREG14 = 0x001C;
 WREG15 = 0x001E;
_WREG15 = 0x001E;
 SPLIM = 0x0020;
_SPLIM = 0x0020;
 ACCAL = 0x0022;
_ACCAL = 0x0022;
 ACCAH = 0x0024;
_ACCAH = 0x0024;
 ACCAU = 0x0026;
_ACCAU = 0x0026;
 ACCBL = 0x0028;
_ACCBL = 0x0028;
 ACCBH = 0x002A;
_ACCBH = 0x002A;
 ACCBU = 0x002C;
_ACCBU = 0x002C;
 PCL = 0x002E;
_PCL = 0x002E;
 PCH = 0x0030;
_PCH = 0x0030;
 TBLPAG = 0x0032;
_TBLPAG = 0x0032;
 PSVPAG = 0x0034;
_PSVPAG = 0x0034;
 RCOUNT = 0x0036;
_RCOUNT = 0x0036;
 DCOUNT = 0x0038;
_DCOUNT = 0x0038;
 DOSTARTL = 0x003A;
_DOSTARTL = 0x003A;
 DOSTARTH = 0x003C;
_DOSTARTH = 0x003C;
 DOENDL = 0x003E;
_DOENDL = 0x003E;
 DOENDH = 0x0040;
_DOENDH = 0x0040;
 SR = 0x0042;
_SR = 0x0042;
 CORCON = 0x0044;
_CORCON = 0x0044;
 MODCON = 0x0046;
_MODCON = 0x0046;
 XMODSRT = 0x0048;
_XMODSRT = 0x0048;
 XMODEND = 0x004A;
_XMODEND = 0x004A;
 YMODSRT = 0x004C;
_YMODSRT = 0x004C;
 YMODEND = 0x004E;
_YMODEND = 0x004E;
 XBREV = 0x0050;
_XBREV = 0x0050;
 DISICNT = 0x0052;
_DISICNT = 0x0052;



/*==========================================================================
**
**           Interrupt Controller Register Definitions
**
==========================================================================*/
 INTCON1 = 0x0080;
_INTCON1 = 0x0080;
 INTCON2 = 0x0082;
_INTCON2 = 0x0082;
 IFS0 = 0x0084;
_IFS0 = 0x0084;
 IFS1 = 0x0086;
_IFS1 = 0x0086;
 IFS2 = 0x0088;
_IFS2 = 0x0088;
 IEC0 = 0x008C;
_IEC0 = 0x008C;
 IEC1 = 0x008E;
_IEC1 = 0x008E;
 IEC2 = 0x0090;
_IEC2 = 0x0090;
 IPC0 = 0x0094;
_IPC0 = 0x0094;
 IPC1 = 0x0096;
_IPC1 = 0x0096;
 IPC2 = 0x0098;
_IPC2 = 0x0098;
 IPC3 = 0x009A;
_IPC3 = 0x009A;
 IPC4 = 0x009C;
_IPC4 = 0x009C;
 IPC5 = 0x009E;
_IPC5 = 0x009E;
 IPC6 = 0x00A0;
_IPC6 = 0x00A0;
 IPC7 = 0x00A2;
_IPC7 = 0x00A2;
 IPC8 = 0x00A4;
_IPC8 = 0x00A4;
 IPC9 = 0x00A6;
_IPC9 = 0x00A6;
 IPC10 = 0x00A8;
_IPC10 = 0x00A8;



/*==========================================================================
**
**      Input Change Notification Module Register Definitions
**
===========================================================================*/
 CNEN1 = 0x00C0;
_CNEN1 = 0x00C0;
 CNEN2 = 0x00C2;
_CNEN2 = 0x00C2;
 CNPU1 = 0x00C4;
_CNPU1 = 0x00C4;
 CNPU2 = 0x00C6;
_CNPU2 = 0x00C6;


/*=========================================================================
**
**       Peripheral Register Definitions
**
===========================================================================*/
/*=========================================================================
**
**       Timer  Module Register Definitions
**
===========================================================================*/
/*--------------Timer 1 Module---------------------------------------------*/
 TMR1 = 0x0100;
_TMR1 = 0x0100;
 PR1 = 0x0102;
_PR1 = 0x0102;
 T1CON = 0x0104;
_T1CON = 0x0104;

/*--------------Timer2/3 Module--------------------------------------------*/
 TMR2 = 0x0106;
_TMR2 = 0x0106;
 TMR3HLD = 0x0108;
_TMR3HLD = 0x0108;
 TMR3 = 0x010A;
_TMR3 = 0x010A;
 PR2 = 0x010C;
_PR2 = 0x010C;
 PR3 = 0x010E;
_PR3 = 0x010E;
 T2CON = 0x0110;
_T2CON = 0x0110;
 T3CON = 0x0112;
_T3CON = 0x0112;

/*------------- Timer4/5 Module---------------------------------------------*/
 TMR4 = 0x0114;
_TMR4 = 0x0114;
 TMR5HLD = 0x0116;
_TMR5HLD = 0x0116;
 TMR5 = 0x0118;
_TMR5 = 0x0118;
 PR4 = 0x011A;
_PR4 = 0x011A;
 PR5 = 0x011C;
_PR5 = 0x011C;
 T4CON = 0x011E;
_T4CON = 0x011E;
 T5CON = 0x0120;
_T5CON = 0x0120;



/*=========================================================================
**
**       Input Capture Module Register Definitions
**
=========================================================================*/
 IC1BUF = 0x0140;
_IC1BUF = 0x0140;
 IC1CON = 0x0142;
_IC1CON = 0x0142;
 IC2BUF = 0x0144;
_IC2BUF = 0x0144;
 IC2CON = 0x0146;
_IC2CON = 0x0146;
 IC3BUF = 0x0148;
_IC3BUF = 0x0148;
 IC3CON = 0x014A;
_IC3CON = 0x014A;
 IC4BUF = 0x014C;
_IC4BUF = 0x014C;
 IC4CON = 0x014E;
_IC4CON = 0x014E;
 IC5BUF = 0x0150;
_IC5BUF = 0x0150;
 IC5CON = 0x0152;
_IC5CON = 0x0152;
 IC6BUF = 0x0154;
_IC6BUF = 0x0154;
 IC6CON = 0x0156;
_IC6CON = 0x0156;
 IC7BUF = 0x0158;
_IC7BUF = 0x0158;
 IC7CON = 0x015A;
_IC7CON = 0x015A;
 IC8BUF = 0x015C;
_IC8BUF = 0x015C;
 IC8CON = 0x015E;
_IC8CON = 0x015E;


/*==========================================================================
**
**       Output Compare Module Register Definitions
**
===========================================================================*/
 OC1RS = 0x0180;
_OC1RS = 0x0180;
 OC1R = 0x0182;
_OC1R = 0x0182;
 OC1CON = 0x0184;
_OC1CON = 0x0184;
 OC2RS = 0x0186;
_OC2RS = 0x0186;
 OC2R = 0x0188;
_OC2R = 0x0188;
 OC2CON = 0x018A;
_OC2CON = 0x018A;
 OC3RS = 0x018C;
_OC3RS = 0x018C;
 OC3R = 0x018E;
_OC3R = 0x018E;
 OC3CON = 0x0190;
_OC3CON = 0x0190;
 OC4RS = 0x0192;
_OC4RS = 0x0192;
 OC4R = 0x0194;
_OC4R = 0x0194;
 OC4CON = 0x0196;
_OC4CON = 0x0196;
 OC5RS = 0x0198;
_OC5RS = 0x0198;
 OC5R = 0x019A;
_OC5R = 0x019A;
 OC5CON = 0x019C;
_OC5CON = 0x019C;
 OC6RS = 0x019E;
_OC6RS = 0x019E;
 OC6R = 0x01A0;
_OC6R = 0x01A0;
 OC6CON = 0x01A2;
_OC6CON = 0x01A2;
 OC7RS = 0x01A4;
_OC7RS = 0x01A4;
 OC7R = 0x01A6;
_OC7R = 0x01A6;
 OC7CON = 0x01A8;
_OC7CON = 0x01A8;
 OC8RS = 0x01AA;
_OC8RS = 0x01AA;
 OC8R = 0x01AC;
_OC8R = 0x01AC;
 OC8CON = 0x01AE;
_OC8CON = 0x01AE;


/*=========================================================================
**
**       Inter-Integrated Circuit(I2C) Module Register Definitions
**
==========================================================================*/
 I2CRCV = 0x0200;
_I2CRCV = 0x0200;
 I2CTRN = 0x0202;
_I2CTRN = 0x0202;
 I2CBRG = 0x0204;
_I2CBRG = 0x0204;
 I2CCON = 0x0206;
_I2CCON = 0x0206;
 I2CSTAT = 0x0208;
_I2CSTAT = 0x0208;
 I2CADD = 0x020A;
_I2CADD = 0x020A;

/*==========================================================================
**
**          Universal Asynchronous Receiver TransmitterUART Module
**                           Register Definitions
**
==========================================================================*/
/*------------------UART 1 Module-----------------------------------------*/
 U1MODE = 0x020C;
_U1MODE = 0x020C;
 U1STA = 0x020E;
_U1STA = 0x020E;
 U1TXREG = 0x0210;
_U1TXREG = 0x0210;
 U1RXREG = 0x0212;
_U1RXREG = 0x0212;
 U1BRG = 0x0214;
_U1BRG = 0x0214;

/*------------------UART 2 Module-----------------------------------------*/
 U2MODE = 0x0216;
_U2MODE = 0x0216;
 U2STA = 0x0218;
_U2STA = 0x0218;
 U2TXREG = 0x021A;
_U2TXREG = 0x021A;
 U2RXREG = 0x021C;
_U2RXREG = 0x021C;
 U2BRG = 0x021E;
_U2BRG = 0x021E;

/*==========================================================================
**
**       Serial Peripheral Interface(SPI) Module Register Definitions
**
==========================================================================*/
/*-----------------SPI 1 Module-------------------------------------------*/
 SPI1STAT = 0x0220;
_SPI1STAT = 0x0220;
 SPI1CON = 0x0222;
_SPI1CON = 0x0222;
 SPI1BUF = 0x0224;
_SPI1BUF = 0x0224;

/*-----------------SPI 2 Module-------------------------------------------*/
 SPI2STAT = 0x0226;
_SPI2STAT = 0x0226;
 SPI2CON = 0x0228;
_SPI2CON = 0x0228;
 SPI2BUF = 0x022A;
_SPI2BUF = 0x022A;


/*==========================================================================
**
**     CODEC/Data Converter Interface(DCI) Module Register Definitions
**
==========================================================================*/
 DCICON1 = 0x0240;
_DCICON1 = 0x0240;
 DCICON2 = 0x0242;
_DCICON2 = 0x0242;
 DCICON3 = 0x0244;
_DCICON3 = 0x0244;
 DCISTAT = 0x0246;
_DCISTAT = 0x0246;
 TSCON = 0x0248;
_TSCON = 0x0248;

 RSCON = 0x024C;
_RSCON = 0x024C;

 RXBUF0 = 0x0250;
_RXBUF0 = 0x0250;
 RXBUF1 = 0x0252;
_RXBUF1 = 0x0252;
 RXBUF2 = 0x0254;
_RXBUF2 = 0x0254;
 RXBUF3 = 0x0256;
_RXBUF3 = 0x0256;
 TXBUF0 = 0x0258;
_TXBUF0 = 0x0258;
 TXBUF1 = 0x025A;
_TXBUF1 = 0x025A;
 TXBUF2 = 0x025C;
_TXBUF2 = 0x025C;
 TXBUF3 = 0x025E;
_TXBUF3 = 0x025E;