/***************************************************************************//* *	linux/arch/m68knommu/platform/5206e/config.c * *	Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com) *//***************************************************************************/#include <linux/config.h>#include <linux/kernel.h>#include <linux/sched.h>#include <linux/param.h>#include <linux/interrupt.h>#include <asm/irq.h>#include <asm/dma.h>#include <asm/traps.h>#include <asm/machdep.h>#include <asm/coldfire.h>#include <asm/mcftimer.h>#include <asm/mcfsim.h>#include <asm/mcfdma.h>#include <asm/irq.h>#include <asm/delay.h>/***************************************************************************/void coldfire_tick(void);void coldfire_timer_init(irqreturn_t (*handler)(int, void *, struct pt_regs *));unsigned long coldfire_timer_offset(void);void coldfire_trap_init(void);void coldfire_reset(void);/***************************************************************************//* *	DMA channel base address table. */unsigned int   dma_base_addr[MAX_M68K_DMA_CHANNELS] = {        MCF_MBAR + MCFDMA_BASE0,        MCF_MBAR + MCFDMA_BASE1,};unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS];/***************************************************************************/void mcf_autovector(unsigned int vec){	volatile unsigned char  *mbar;	unsigned char		icr;	if ((vec >= 25) && (vec <= 31)) {		vec -= 25;		mbar = (volatile unsigned char *) MCF_MBAR;		icr = MCFSIM_ICR_AUTOVEC | (vec << 3);		*(mbar + MCFSIM_ICR1 + vec) = icr;		vec = 0x1 << (vec + 1);		mcf_setimr(mcf_getimr() & ~vec);	}}/***************************************************************************/void mcf_settimericr(unsigned int timer, unsigned int level){	volatile unsigned char *icrp;	unsigned int icr, imr;	if (timer <= 2) {		switch (timer) {		case 2:  icr = MCFSIM_TIMER2ICR; imr = MCFSIM_IMR_TIMER2; break;		default: icr = MCFSIM_TIMER1ICR; imr = MCFSIM_IMR_TIMER1; break;		}		icrp = (volatile unsigned char *) (MCF_MBAR + icr);		*icrp = MCFSIM_ICR_AUTOVEC | (level << 2) | MCFSIM_ICR_PRI3;		mcf_setimr(mcf_getimr() & ~imr);	}}/***************************************************************************/int mcf_timerirqpending(int timer){	unsigned int imr = 0;	switch (timer) {	case 1:  imr = MCFSIM_IMR_TIMER1; break;	case 2:  imr = MCFSIM_IMR_TIMER2; break;	default: break;	}	return (mcf_getipr() & imr);}/***************************************************************************/void config_BSP(char *commandp, int size){	mcf_setimr(MCFSIM_IMR_MASKALL);#if defined(CONFIG_BOOTPARAM)	strncpy(commandp, CONFIG_BOOTPARAM_STRING, size);	commandp[size-1] = 0;#elif defined(CONFIG_NETtel)	/* Copy command line from FLASH to local buffer... */	memcpy(commandp, (char *) 0xf0004000, size);	commandp[size-1] = 0;#else	memset(commandp, 0, size);#endif /* CONFIG_NETtel */	mach_sched_init = coldfire_timer_init;	mach_tick = coldfire_tick;	mach_gettimeoffset = coldfire_timer_offset;	mach_trap_init = coldfire_trap_init;	mach_reset = coldfire_reset;}/***************************************************************************/