/** * \file drm.h  * Header for the Direct Rendering Manager *  * \author Rickard E. (Rik) Faith <faith@valinux.com> * * \par Acknowledgments: * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic \c cmpxchg. *//* * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. * All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. */#ifndef _DRM_H_#define _DRM_H_#if defined(__linux__)#include <linux/config.h>#include <asm/ioctl.h>		/* For _IO* macros */#define DRM_IOCTL_NR(n)		_IOC_NR(n)#define DRM_IOC_VOID		_IOC_NONE#define DRM_IOC_READ		_IOC_READ#define DRM_IOC_WRITE		_IOC_WRITE#define DRM_IOC_READWRITE	_IOC_READ|_IOC_WRITE#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)#elif defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__)#if defined(__FreeBSD__) && defined(IN_MODULE)/* Prevent name collision when including sys/ioccom.h */#undef ioctl#include <sys/ioccom.h>#define ioctl(a,b,c)		xf86ioctl(a,b,c)#else#include <sys/ioccom.h>#endif /* __FreeBSD__ && xf86ioctl */#define DRM_IOCTL_NR(n)		((n) & 0xff)#define DRM_IOC_VOID		IOC_VOID#define DRM_IOC_READ		IOC_OUT#define DRM_IOC_WRITE		IOC_IN#define DRM_IOC_READWRITE	IOC_INOUT#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)#endif#define XFREE86_VERSION(major,minor,patch,snap) \		((major << 16) | (minor << 8) | patch)#ifndef CONFIG_XFREE86_VERSION#define CONFIG_XFREE86_VERSION XFREE86_VERSION(4,1,0,0)#endif#if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)#define DRM_PROC_DEVICES "/proc/devices"#define DRM_PROC_MISC	 "/proc/misc"#define DRM_PROC_DRM	 "/proc/drm"#define DRM_DEV_DRM	 "/dev/drm"#define DRM_DEV_MODE	 (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP)#define DRM_DEV_UID	 0#define DRM_DEV_GID	 0#endif#if CONFIG_XFREE86_VERSION >= XFREE86_VERSION(4,1,0,0)#define DRM_MAJOR       226#define DRM_MAX_MINOR   15#endif#define DRM_NAME	"drm"	  /**< Name in kernel, /dev, and /proc */#define DRM_MIN_ORDER	5	  /**< At least 2^5 bytes = 32 bytes */#define DRM_MAX_ORDER	22	  /**< Up to 2^22 bytes = 4MB */#define DRM_RAM_PERCENT 10	  /**< How much system ram can we lock? */#define _DRM_LOCK_HELD	0x80000000 /**< Hardware lock is held */#define _DRM_LOCK_CONT	0x40000000 /**< Hardware lock is contended */#define _DRM_LOCK_IS_HELD(lock)	   ((lock) & _DRM_LOCK_HELD)#define _DRM_LOCK_IS_CONT(lock)	   ((lock) & _DRM_LOCK_CONT)#define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT))typedef unsigned long drm_handle_t;typedef unsigned int  drm_context_t;typedef unsigned int  drm_drawable_t;typedef unsigned int  drm_magic_t;/** * Cliprect. *  * \warning: If you change this structure, make sure you change * XF86DRIClipRectRec in the server as well * * \note KW: Actually it's illegal to change either for * backwards-compatibility reasons. */typedef struct drm_clip_rect {	unsigned short	x1;	unsigned short	y1;	unsigned short	x2;	unsigned short	y2;} drm_clip_rect_t;/** * Texture region, */typedef struct drm_tex_region {	unsigned char	next;	unsigned char	prev;	unsigned char	in_use;	unsigned char	padding;	unsigned int	age;} drm_tex_region_t;/** * Hardware lock. * * The lock structure is a simple cache-line aligned integer.  To avoid * processor bus contention on a multiprocessor system, there should not be any * other data stored in the same cache line. */typedef struct drm_hw_lock {	__volatile__ unsigned int lock;		/**< lock variable */	char			  padding[60];	/**< Pad to cache line */} drm_hw_lock_t;/** * DRM_IOCTL_VERSION ioctl argument type. *  * \sa drmGetVersion(). */typedef struct drm_version {	int    version_major;	  /**< Major version */	int    version_minor;	  /**< Minor version */	int    version_patchlevel;/**< Patch level */	size_t name_len;	  /**< Length of name buffer */	char   __user *name;	  /**< Name of driver */	size_t date_len;	  /**< Length of date buffer */	char   __user *date;	  /**< User-space buffer to hold date */	size_t desc_len;	  /**< Length of desc buffer */	char   __user *desc;	  /**< User-space buffer to hold desc */} drm_version_t;/** * DRM_IOCTL_GET_UNIQUE ioctl argument type. * * \sa drmGetBusid() and drmSetBusId(). */typedef struct drm_unique {	size_t unique_len;	  /**< Length of unique */	char   __user *unique;	  /**< Unique name for driver instantiation */} drm_unique_t;typedef struct drm_list {	int		 count;	  /**< Length of user-space structures */	drm_version_t	 __user *version;} drm_list_t;typedef struct drm_block {	int		 unused;} drm_block_t;/** * DRM_IOCTL_CONTROL ioctl argument type. * * \sa drmCtlInstHandler() and drmCtlUninstHandler(). */typedef struct drm_control {	enum {		DRM_ADD_COMMAND,		DRM_RM_COMMAND,		DRM_INST_HANDLER,		DRM_UNINST_HANDLER	}		 func;	int		 irq;} drm_control_t;/** * Type of memory to map. */typedef enum drm_map_type {	_DRM_FRAME_BUFFER   = 0,  /**< WC (no caching), no core dump */	_DRM_REGISTERS	    = 1,  /**< no caching, no core dump */	_DRM_SHM	    = 2,  /**< shared, cached */	_DRM_AGP            = 3,  /**< AGP/GART */	_DRM_SCATTER_GATHER = 4	  /**< Scatter/gather memory for PCI DMA */} drm_map_type_t;/** * Memory mapping flags. */typedef enum drm_map_flags {	_DRM_RESTRICTED	     = 0x01, /**< Cannot be mapped to user-virtual */	_DRM_READ_ONLY	     = 0x02,	_DRM_LOCKED	     = 0x04, /**< shared, cached, locked */	_DRM_KERNEL	     = 0x08, /**< kernel requires access */	_DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */	_DRM_CONTAINS_LOCK   = 0x20, /**< SHM page that contains lock */	_DRM_REMOVABLE	     = 0x40  /**< Removable mapping */} drm_map_flags_t;typedef struct drm_ctx_priv_map {	unsigned int	ctx_id;  /**< Context requesting private mapping */	void		*handle; /**< Handle of map */} drm_ctx_priv_map_t;/** * DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls * argument type. * * \sa drmAddMap(). */typedef struct drm_map {	unsigned long	offset;	 /**< Requested physical address (0 for SAREA)*/	unsigned long	size;	 /**< Requested physical size (bytes) */	drm_map_type_t	type;	 /**< Type of memory to map */	drm_map_flags_t flags;	 /**< Flags */	void		*handle; /**< User-space: "Handle" to pass to mmap() */				 /**< Kernel-space: kernel-virtual address */	int		mtrr;	 /**< MTRR slot used */				 /*   Private data */} drm_map_t;/** * DRM_IOCTL_GET_CLIENT ioctl argument type. */typedef struct drm_client {	int		idx;	/**< Which client desired? */	int		auth;	/**< Is client authenticated? */	unsigned long	pid;	/**< Process ID */	unsigned long	uid;	/**< User ID */	unsigned long	magic;	/**< Magic */	unsigned long	iocs;	/**< Ioctl count */} drm_client_t;typedef enum {	_DRM_STAT_LOCK,	_DRM_STAT_OPENS,	_DRM_STAT_CLOSES,	_DRM_STAT_IOCTLS,	_DRM_STAT_LOCKS,	_DRM_STAT_UNLOCKS,	_DRM_STAT_VALUE,	/**< Generic value */	_DRM_STAT_BYTE,		/**< Generic byte counter (1024bytes/K) */	_DRM_STAT_COUNT,	/**< Generic non-byte counter (1000/k) */	_DRM_STAT_IRQ,		/**< IRQ */	_DRM_STAT_PRIMARY,	/**< Primary DMA bytes */	_DRM_STAT_SECONDARY,	/**< Secondary DMA bytes */	_DRM_STAT_DMA,		/**< DMA */	_DRM_STAT_SPECIAL,	/**< Special DMA (e.g., priority or polled) */	_DRM_STAT_MISSED	/**< Missed DMA opportunity */				/* Add to the *END* of the list */} drm_stat_type_t;/** * DRM_IOCTL_GET_STATS ioctl argument type. */typedef struct drm_stats {	unsigned long count;	struct {		unsigned long   value;		drm_stat_type_t type;	} data[15];} drm_stats_t;/** * Hardware locking flags. */typedef enum drm_lock_flags {	_DRM_LOCK_READY	     = 0x01, /**< Wait until hardware is ready for DMA */	_DRM_LOCK_QUIESCENT  = 0x02, /**< Wait until hardware quiescent */	_DRM_LOCK_FLUSH	     = 0x04, /**< Flush this context's DMA queue first */	_DRM_LOCK_FLUSH_ALL  = 0x08, /**< Flush all DMA queues first */				/* These *HALT* flags aren't supported yet				   -- they will be used to support the				   full-screen DGA-like mode. */	_DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */	_DRM_HALT_CUR_QUEUES = 0x20  /**< Halt all current queues */} drm_lock_flags_t;/** * DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type. *  * \sa drmGetLock() and drmUnlock(). */typedef struct drm_lock {	int		 context;	drm_lock_flags_t flags;} drm_lock_t;/** * DMA flags * * \warning  * These values \e must match xf86drm.h. * * \sa drm_dma. */typedef enum drm_dma_flags {	      				      /* Flags for DMA buffer dispatch */	_DRM_DMA_BLOCK	      = 0x01, /**<				       * Block until buffer dispatched.				       *