/*
*********************************************************************************************************
*                                     MICIRUM BOARD SUPPORT PACKAGE
*
*                          (c) Copyright 2003-2006; Micrium, Inc.; Weston, FL
*
*                   All rights reserved.  Protected by international copyright laws.
*                   Knowledge of the source code may not be used to write a similar
*                   product.  This file may only be used in accordance with a license
*                   and should not be redistributed in any way.
*********************************************************************************************************
*/

/*
*********************************************************************************************************
*
*                                         BOARD SUPPORT PACKAGE
*                                         EXCEPTION MANAGEMENT
*
* Filename      : bsp_exception.c
* Version       : V1.87
* Programmer(s) : JDH
*********************************************************************************************************
*/

/*
*********************************************************************************************************
*                                             INCLUDE FILES
*********************************************************************************************************
*/

#include  <includes.h>


/*
*********************************************************************************************************
*                                                DEFINES
*********************************************************************************************************
*/

                                                                /* ARM exception IDs                                    */
#define  BSP_CPU_ARM_EXECPT_RESET                                                                    0x00
#define  BSP_CPU_ARM_EXECPT_UNDEF_INSTR                                                              0x01
#define  BSP_CPU_ARM_EXECPT_SWI                                                                      0x02
#define  BSP_CPU_ARM_EXECPT_PREFETCH_ABORT                                                           0x03
#define  BSP_CPU_ARM_EXECPT_DATA_ABORT                                                               0x04
#define  BSP_CPU_ARM_EXECPT_ADDR_ABORT                                                               0x05
#define  BSP_CPU_ARM_EXECPT_IRQ                                                                      0x06
#define  BSP_CPU_ARM_EXECPT_FIQ                                                                      0x07
#define  BSP_CPU_ARM_EXECPT_MAX                                                                      0x08

                                                                /* ARM exception vectors addresses                      */
#define  BSP_CPU_ARM_EXCEPT_RESET_VECT_ADDR              (BSP_CPU_ARM_EXECPT_RESET          * 0x04 + 0x00)
#define  BSP_CPU_ARM_EXCEPT_UNDEF_INSTR_VECT_ADDR        (BSP_CPU_ARM_EXECPT_UNDEF_INSTR    * 0x04 + 0x00)
#define  BSP_CPU_ARM_EXCEPT_SWI_VECT_ADDR                (BSP_CPU_ARM_EXECPT_SWI            * 0x04 + 0x00)
#define  BSP_CPU_ARM_EXCEPT_PREFETCH_ABORT_VECT_ADDR     (BSP_CPU_ARM_EXECPT_PREFETCH_ABORT * 0x04 + 0x00)
#define  BSP_CPU_ARM_EXCEPT_DATA_ABORT_VECT_ADDR         (BSP_CPU_ARM_EXECPT_DATA_ABORT     * 0x04 + 0x00)
#define  BSP_CPU_ARM_EXCEPT_ADDR_ABORT_VECT_ADDR         (BSP_CPU_ARM_EXECPT_ADDR_ABORT     * 0x04 + 0x00)
#define  BSP_CPU_ARM_EXCEPT_IRQ_VECT_ADDR                (BSP_CPU_ARM_EXECPT_IRQ            * 0x04 + 0x00)
#define  BSP_CPU_ARM_EXCEPT_FIQ_VECT_ADDR                (BSP_CPU_ARM_EXECPT_FIQ            * 0x04 + 0x00)

                                                                /* ARM exception handlers addresses                     */
#define  BSP_CPU_ARM_EXCEPT_RESET_HANDLER_ADDR           (BSP_CPU_ARM_EXECPT_RESET          * 0x04 + 0x20)
#define  BSP_CPU_ARM_EXCEPT_UNDEF_INSTR_HANDLER_ADDR     (BSP_CPU_ARM_EXECPT_UNDEF_INSTR    * 0x04 + 0x20)
#define  BSP_CPU_ARM_EXCEPT_SWI_HANDLER_ADDR             (BSP_CPU_ARM_EXECPT_SWI            * 0x04 + 0x20)
#define  BSP_CPU_ARM_EXCEPT_PREFETCH_ABORT_HANDLER_ADDR  (BSP_CPU_ARM_EXECPT_PREFETCH_ABORT * 0x04 + 0x20)
#define  BSP_CPU_ARM_EXCEPT_DATA_ABORT_HANDLER_ADDR      (BSP_CPU_ARM_EXECPT_DATA_ABORT     * 0x04 + 0x20)
#define  BSP_CPU_ARM_EXCEPT_ADDR_ABORT_HANDLER_ADDR      (BSP_CPU_ARM_EXECPT_ADDR_ABORT     * 0x04 + 0x20)
#define  BSP_CPU_ARM_EXCEPT_IRQ_HANDLER_ADDR             (BSP_CPU_ARM_EXECPT_IRQ            * 0x04 + 0x20)
#define  BSP_CPU_ARM_EXCEPT_FIQ_HANDLER_ADDR             (BSP_CPU_ARM_EXECPT_FIQ            * 0x04 + 0x20)

                                                                /* ARM "Jump To Self" assembled instruction             */
#define  BSP_CPU_ARM_INSTR_JUMP_TO_SELF                   0xEAFFFFFE
                                                                /* ARM "Jump To Exception Handler" assembled instruction*/
#define  BSP_CPU_ARM_INSTR_JUMP_TO_HANDLER                0xE59FF018


/*
*********************************************************************************************************
*                                          EXCEPTION HANDLERS
*                                         (defined in OS port)
*********************************************************************************************************
*/

void  OS_CPU_ARM_EXCEPT_RESET_HANDLER          (void);
void  OS_CPU_ARM_EXCEPT_UNDEF_INSTR_HANDLER    (void);
void  OS_CPU_ARM_EXCEPT_SWI_HANDLER            (void);
void  OS_CPU_ARM_EXCEPT_PREFETCH_ABORT_HANDLER (void);
void  OS_CPU_ARM_EXCEPT_DATA_ABORT_HANDLER     (void);
void  OS_CPU_ARM_EXCEPT_ADDR_ABORT_HANDLER     (void);
void  OS_CPU_ARM_EXCEPT_IRQ_HANDLER            (void);
void  OS_CPU_ARM_EXCEPT_FIQ_HANDLER            (void);

void  OS_EXCEPT_HANDLER                        (CPU_INT32U  except_id);


/*
*********************************************************************************************************
*                                    INITIALIZE INTERRUPT CONTROLLER
*
* Description : This function should be called by your application code before you make use of any of the
*               functions found in this module.
*
* Arguments   : None.
*********************************************************************************************************
*/

void  BSP_InitExceptVect (void)
{
    (*(CPU_INT32U *)BSP_CPU_ARM_EXCEPT_RESET_VECT_ADDR)              = BSP_CPU_ARM_INSTR_JUMP_TO_HANDLER;
    (*(CPU_INT32U *)BSP_CPU_ARM_EXCEPT_RESET_HANDLER_ADDR)           = (CPU_INT32U)OS_CPU_ARM_EXCEPT_RESET_HANDLER;

    (*(CPU_INT32U *)BSP_CPU_ARM_EXCEPT_UNDEF_INSTR_VECT_ADDR)        = BSP_CPU_ARM_INSTR_JUMP_TO_HANDLER;
    (*(CPU_INT32U *)BSP_CPU_ARM_EXCEPT_UNDEF_INSTR_HANDLER_ADDR)     = (CPU_INT32U)OS_CPU_ARM_EXCEPT_UNDEF_INSTR_HANDLER;

    (*(CPU_INT32U *)BSP_CPU_ARM_EXCEPT_SWI_VECT_ADDR)                = BSP_CPU_ARM_INSTR_JUMP_TO_HANDLER;
    (*(CPU_INT32U *)BSP_CPU_ARM_EXCEPT_SWI_HANDLER_ADDR)             = (CPU_INT32U)OS_CPU_ARM_EXCEPT_SWI_HANDLER;

    (*(CPU_INT32U *)BSP_CPU_ARM_EXCEPT_PREFETCH_ABORT_VECT_ADDR)     = BSP_CPU_ARM_INSTR_JUMP_TO_HANDLER;
    (*(CPU_INT32U *)BSP_CPU_ARM_EXCEPT_PREFETCH_ABORT_HANDLER_ADDR)  = (CPU_INT32U)OS_CPU_ARM_EXCEPT_PREFETCH_ABORT_HANDLER;

    (*(CPU_INT32U *)BSP_CPU_ARM_EXCEPT_DATA_ABORT_VECT_ADDR)         = BSP_CPU_ARM_INSTR_JUMP_TO_HANDLER;
    (*(CPU_INT32U *)BSP_CPU_ARM_EXCEPT_DATA_ABORT_HANDLER_ADDR)      = (CPU_INT32U)OS_CPU_ARM_EXCEPT_DATA_ABORT_HANDLER;

    (*(CPU_INT32U *)BSP_CPU_ARM_EXCEPT_ADDR_ABORT_VECT_ADDR)         = BSP_CPU_ARM_INSTR_JUMP_TO_HANDLER;
    (*(CPU_INT32U *)BSP_CPU_ARM_EXCEPT_ADDR_ABORT_HANDLER_ADDR)      = (CPU_INT32U)OS_CPU_ARM_EXCEPT_ADDR_ABORT_HANDLER;

    (*(CPU_INT32U *)BSP_CPU_ARM_EXCEPT_IRQ_VECT_ADDR)                = BSP_CPU_ARM_INSTR_JUMP_TO_HANDLER;
    (*(CPU_INT32U *)BSP_CPU_ARM_EXCEPT_IRQ_HANDLER_ADDR)             = (CPU_INT32U)OS_CPU_ARM_EXCEPT_IRQ_HANDLER;

    (*(CPU_INT32U *)BSP_CPU_ARM_EXCEPT_FIQ_VECT_ADDR)                = BSP_CPU_ARM_INSTR_JUMP_TO_HANDLER;
    (*(CPU_INT32U *)BSP_CPU_ARM_EXCEPT_FIQ_HANDLER_ADDR)             = (CPU_INT32U)OS_CPU_ARM_EXCEPT_FIQ_HANDLER;
}


/*
*********************************************************************************************************
*                                              DATA TYPES
*********************************************************************************************************
*/

typedef  void  (*BSP_PFNCT)(void);


/*
*********************************************************************************************************
*                                            FIQ ISR HANDLER
*
* Description : This function is called by OS_CPU_FIQ_ISR() to determine the source of the interrupt
*               and process it accordingly.
*
* Arguments   : None.
*********************************************************************************************************
*/

void  OS_EXCEPT_HANDLER (CPU_INT32U  except_id)
{
    BSP_PFNCT    pfnct;


    if (except_id == BSP_CPU_ARM_EXECPT_IRQ) {
        pfnct = (BSP_PFNCT)AT91C_BASE_AIC->AIC_IVR;             /* Read the interrupt vector from the VIC                   */
        if (pfnct != (BSP_PFNCT)0) {                            /* Make sure we don't have a NULL pointer                   */
          (*pfnct)();                                           /* Execute the ISR for the interrupting device              */
        }
    } else if (except_id == BSP_CPU_ARM_EXECPT_FIQ) {
        pfnct = (BSP_PFNCT)AT91C_BASE_AIC->AIC_FVR;              /* Read the interrupt vector from the VIC                   */
        if (pfnct != (BSP_PFNCT)0) {                             /* Make sure we don't have a NULL pointer                   */
          (*pfnct)();                                            /* Execute the ISR for the interrupting device              */
        }
    }
}