/* 3c509.c: A 3c509 EtherLink3 ethernet driver for linux. */
/*
	Written 1993 by Donald Becker.

	Copyright 1993 United States Government as represented by the
	Director, National Security Agency.	 This software may be used and
	distributed according to the terms of the GNU Public License,
	incorporated herein by reference.
	
	This driver is for the 3Com EtherLinkIII series.

	The author may be reached as becker@super.org or
	C/O Supercomputing Research Ctr., 17100 Science Dr., Bowie MD 20715
*/

static char *version = "3c509.c:pl15k 3/5/94 becker@super.org\n";

#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/string.h>
#include <linux/interrupt.h>
#include <linux/ptrace.h>
#include <linux/errno.h>
#include <linux/in.h>
#include <linux/malloc.h>
#include <linux/ioport.h>
#include <asm/bitops.h>
#include <asm/io.h>

#include "dev.h"
#include "eth.h"
#include "skbuff.h"
#include "arp.h"

#ifndef HAVE_ALLOC_SKB
#define alloc_skb(size, priority) (struct sk_buff *) kmalloc(size,priority)
#endif


#ifdef EL3_DEBUG
int el3_debug = EL3_DEBUG;
#else
int el3_debug = 2;
#endif

/* To minimize the size of the driver source I only define operating
   constants if they are used several times.  You'll need the manual
   if you want to understand driver details. */
/* Offsets from base I/O address. */
#define EL3_DATA 0x00
#define EL3_CMD 0x0e
#define EL3_STATUS 0x0e
#define ID_PORT 0x100
#define	 EEPROM_READ 0x80

#define EL3WINDOW(win_num) outw(0x0800+(win_num), ioaddr + EL3_CMD)

/* Register window 1 offsets, the window used in normal operation. */
#define TX_FIFO		0x00
#define RX_FIFO		0x00
#define RX_STATUS 	0x08
#define TX_STATUS 	0x0B
#define TX_FREE		0x0C		/* Remaining free bytes in Tx buffer. */

#define WN4_MEDIA	0x0A		/* Window 4: Various transceiver/media bits. */
#define  MEDIA_TP	0x00C0		/* Enable link beat and jabber for 10baseT. */

struct el3_private {
	struct enet_statistics stats;
};

static ushort id_read_eeprom(int index);
static ushort read_eeprom(short ioaddr, int index);
static int el3_open(struct device *dev);
static int el3_start_xmit(struct sk_buff *skb, struct device *dev);
static void el3_interrupt(int reg_ptr);
static void update_stats(int addr, struct device *dev);
static struct enet_statistics *el3_get_stats(struct device *dev);
static int el3_rx(struct device *dev);
static int el3_close(struct device *dev);
#ifdef HAVE_MULTICAST
static void set_multicast_list(struct device *dev, int num_addrs, void *addrs);
#endif



int el3_probe(struct device *dev)
{
	short lrs_state = 0xff, i;
	ushort ioaddr, irq, if_port;
	short *phys_addr = (short *)dev->dev_addr;
	static int current_tag = 0;

	/* First check for a board on the EISA bus. */
	if (EISA_bus) {
		for (ioaddr = 0x1000; ioaddr < 0x9000; ioaddr += 0x1000) {
			if (inw(ioaddr) != 0x6d50)
				continue;

			irq = inw(ioaddr + 8) >> 12;
			if_port = inw(ioaddr + 6)>>14;
			for (i = 0; i < 3; i++)
				phys_addr[i] = htons(read_eeprom(ioaddr, i));

			/* Restore the "Manufacturer ID" to the EEPROM read register. */
			/* The manual says to restore "Product ID" (reg. 3). !???! */
			read_eeprom(ioaddr, 7);

			/* Was the EISA code an add-on hack?  Nahhhhh... */
			goto found;
		}
	}

#ifdef CONFIG_MCA
	if (MCA_bus) {
		mca_adaptor_select_mode(1);
		for (i = 0; i < 8; i++)
			if ((mca_adaptor_id(i) | 1) == 0x627c) {
				ioaddr = mca_pos_base_addr(i);
				irq = inw(ioaddr + 8) >> 12;
				if_port = inw(ioaddr + 6)>>14;
				for (i = 0; i < 3; i++)
					phys_addr[i] = htons(read_eeprom(ioaddr, i));

				mca_adaptor_select_mode(0);
				goto found;
			}
		mca_adaptor_select_mode(0);

	}
#endif	  

	/* Send the ID sequence to the ID_PORT. */
	outb(0x00, ID_PORT);
	outb(0x00, ID_PORT);
	for(i = 0; i < 255; i++) {
		outb(lrs_state, ID_PORT);
		lrs_state <<= 1;
		lrs_state = lrs_state & 0x100 ? lrs_state ^ 0xcf : lrs_state;
	}

	/* For the first probe, clear all board's tag registers. */
	if (current_tag == 0)
		outb(0xd0, ID_PORT);
	else				/* Otherwise kill off already-found boards. */
		outb(0xd8, ID_PORT);

	if (id_read_eeprom(7) != 0x6d50) {
		return -ENODEV;
	}

	/* Read in EEPROM data, which does contention-select.
	   Only the lowest address board will stay "on-line".
	   3Com got the byte order backwards. */
	for (i = 0; i < 3; i++) {
		phys_addr[i] = htons(id_read_eeprom(i));
	}

	{
		unsigned short iobase = id_read_eeprom(8);
		if_port = iobase >> 14;
		ioaddr = 0x200 + ((iobase & 0x1f) << 4);
	}
	irq = id_read_eeprom(9) >> 12;

	/* The current Space.c structure makes it difficult to have more
	   than one adaptor initialized.  Send me email if you have a need for
	   multiple adaptors, and we'll work out something.	 -becker@super.org */
	if (dev->base_addr != 0
		&&	dev->base_addr != (unsigned short)ioaddr) {
		return -ENODEV;
	}

	/* Set the adaptor tag so that the next card can be found. */
	outb(0xd0 + ++current_tag, ID_PORT);

	/* Activate the adaptor at the EEPROM location. */
	outb(0xff, ID_PORT);

	EL3WINDOW(0);
	if (inw(ioaddr) != 0x6d50)
		return -ENODEV;

 found:
	dev->base_addr = ioaddr;
	dev->irq = irq;
	dev->if_port = if_port;
	snarf_region(dev->base_addr, 16);

	{
		char *if_names[] = {"10baseT", "AUI", "undefined", "BNC"};
		printk("%s: 3c509 at %#3.3x tag %d, %s port, address ",
			   dev->name, dev->base_addr, current_tag, if_names[dev->if_port]);
	}

	/* Read in the station address. */
	for (i = 0; i < 6; i++)
		printk(" %2.2x", dev->dev_addr[i]);
	printk(", IRQ %d.\n", dev->irq);

	/* Make up a EL3-specific-data structure. */
	dev->priv = kmalloc(sizeof(struct el3_private), GFP_KERNEL);
	memset(dev->priv, 0, sizeof(struct el3_private));

	if (el3_debug > 0)
		printk(version);

	/* The EL3-specific entries in the device structure. */
	dev->open = &el3_open;
	dev->hard_start_xmit = &el3_start_xmit;
	dev->stop = &el3_close;
	dev->get_stats = &el3_get_stats;
#ifdef HAVE_MULTICAST
		dev->set_multicast_list = &set_multicast_list;
#endif

	/* Fill in the generic fields of the device structure. */
	for (i = 0; i < DEV_NUMBUFFS; i++)
		dev->buffs[i] = NULL;

	dev->hard_header	= eth_header;
	dev->add_arp		= eth_add_arp;
	dev->queue_xmit		= dev_queue_xmit;
	dev->rebuild_header = eth_rebuild_header;
	dev->type_trans		= eth_type_trans;

	dev->type			= ARPHRD_ETHER;
	dev->hard_header_len = ETH_HLEN;
	dev->mtu			= 1500; /* eth_mtu */
	dev->addr_len		= ETH_ALEN;
	for (i = 0; i < ETH_ALEN; i++) {
		dev->broadcast[i]=0xff;
	}

	/* New-style flags. */
	dev->flags			= IFF_BROADCAST;
	dev->family			= AF_INET;
	dev->pa_addr		= 0;
	dev->pa_brdaddr		= 0;
	dev->pa_mask		= 0;
	dev->pa_alen		= sizeof(unsigned long);

	return 0;
}

/* Read a word from the EEPROM using the regular EEPROM access register.
   Assume that we are in register window zero.
 */
static ushort read_eeprom(short ioaddr, int index)
{
	int timer;

	outw(EEPROM_READ + index, ioaddr + 10);
	/* Pause for at least 162 us. for the read to take place. */
	for (timer = 0; timer < 162*4 + 400; timer++)
		SLOW_DOWN_IO;
	return inw(ioaddr + 12);
}

/* Read a word from the EEPROM when in the ISA ID probe state. */
static ushort id_read_eeprom(int index)
{
	int timer, bit, word = 0;
	
	/* Issue read command, and pause for at least 162 us. for it to complete.
	   Assume extra-fast 16Mhz bus. */
	outb(EEPROM_READ + index, ID_PORT);

	/* This should really be done by looking at one of the timer channels. */
	for (timer = 0; timer < 162*4 + 400; timer++)
		SLOW_DOWN_IO;

	for (bit = 15; bit >= 0; bit--)
		word = (word << 1) + (inb(ID_PORT) & 0x01);
		
	if (el3_debug > 3)
		printk("  3c509 EEPROM word %d %#4.4x.\n", index, word);

	return word;
}



static int
el3_open(struct device *dev)
{
	int ioaddr = dev->base_addr;
	int i;

	if (request_irq(dev->irq, &el3_interrupt)) {
		return -EAGAIN;
	}

	EL3WINDOW(0);
	if (el3_debug > 3)
		printk("%s: Opening, IRQ %d	 status@%x %4.4x.\n", dev->name,
			   dev->irq, ioaddr + EL3_STATUS, inw(ioaddr + EL3_STATUS));

	/* Activate board: this is probably unnecessary. */
	outw(0x0001, ioaddr + 4);

	irq2dev_map[dev->irq] = dev;

	/* Set the IRQ line. */
	outw((dev->irq << 12) | 0x0f00, ioaddr + 8);

	/* Set the station address in window 2 each time opened. */
	EL3WINDOW(2);

	for (i = 0; i < 6; i++)
		outb(dev->dev_addr[i], ioaddr + i);

	if (dev->if_port == 3)
		/* Start the thinnet transceiver. We should really wait 50ms...*/
		outw(0x1000, ioaddr + EL3_CMD);
	else if (dev->if_port == 0) {
		/* 10baseT interface, enabled link beat and jabber check. */
		EL3WINDOW(4);
		outw(inw(ioaddr + WN4_MEDIA) | MEDIA_TP, ioaddr + WN4_MEDIA);
	}

	/* Switch to register set 1 for normal use. */
	EL3WINDOW(1);

	outw(0x8005, ioaddr + EL3_CMD); /* Accept b-case and phys addr only. */
	outw(0xA800, ioaddr + EL3_CMD); /* Turn on statistics. */
	outw(0x2000, ioaddr + EL3_CMD); /* Enable the receiver. */
	outw(0x4800, ioaddr + EL3_CMD); /* Enable transmitter. */
	outw(0x78ff, ioaddr + EL3_CMD); /* Allow all status bits to be seen. */
	dev->interrupt = 0;
	dev->tbusy = 0;
	dev->start = 1;
	outw(0x7098, ioaddr + EL3_CMD); /* Set interrupt mask. */

	if (el3_debug > 3)
		printk("%s: Opened 3c509  IRQ %d  status %4.4x.\n",
			   dev->name, dev->irq, inw(ioaddr + EL3_STATUS));

	return 0;					/* Always succeed */
}

static int
el3_start_xmit(struct sk_buff *skb, struct device *dev)
{
	struct el3_private *lp = (struct el3_private *)dev->priv;
	int ioaddr = dev->base_addr;