/* eexpress.c: Intel EtherExpress device driver for Linux. */
/*
	Written 1993 by Donald Becker.
	Copyright 1993 United States Government as represented by the Director,
	National Security Agency.  This software may only be used and distributed
	according to the terms of the GNU Public License as modified by SRC,
	incorported herein by reference.

	The author may be reached as becker@super.org or
	C/O Supercomputing Research Ctr., 17100 Science Dr., Bowie MD 20715

	Things remaining to do:
	Check that the 586 and ASIC are reset/unreset at the right times.
	Check tx and rx buffer setup.
	The current Tx is single-buffer-only.
	Move the theory of operation and memory map documentation.
	Rework the board error reset
	The statistics need to be updated correctly.
*/

static char *version =
	"eexpress.c:v0.07 1/19/94 Donald Becker (becker@super.org)\n";

#include <linux/config.h>

/*
  Sources:
	This driver wouldn't have been written with the availability of the
	Crynwr driver source code.	It provided a known-working implementation
	that filled in the gaping holes of the Intel documention.  Three cheers
	for Russ Nelson.

	Intel Microcommunications Databook, Vol. 1, 1990. It provides just enough
	info that the casual reader might think that it documents the i82586.
*/

#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/types.h>
#include <linux/fcntl.h>
#include <linux/interrupt.h>
#include <linux/ptrace.h>
#include <linux/ioport.h>
#include <linux/in.h>
#include <asm/system.h>
#include <asm/bitops.h>
#include <asm/io.h>
#include <asm/dma.h>
#include <errno.h>
#include <memory.h>

#include "dev.h"
#include "eth.h"
#include "skbuff.h"
#include "arp.h"

#ifndef HAVE_ALLOC_SKB
#define alloc_skb(size, priority) (struct sk_buff *) kmalloc(size,priority)
#else
/* This isn't quite right, but it's the best version define I can find right now. */
#include <linux/malloc.h>
#endif

/* use 0 for production, 1 for verification, 2..7 for debug */
#ifndef NET_DEBUG
#define NET_DEBUG 2
#endif
static unsigned int net_debug = NET_DEBUG;

/*
  			Details of the i82586.

   You'll really need the databook to understand the details of this part,
   but the outline is that the i82586 has two seperate processing units.

   The Rx unit uses a list of frame descriptors and a list of data buffer
   descriptors.  We use full-sized (1518 byte) data buffers, so there is
   a one-to-one pairing of frame descriptors to buffer descriptors.

   The Tx ("command") unit executes a list of commands that look like:
		Status word		Written by the 82586 when the command is done.
		Command word	Command in lower 3 bits, post-command action in upper 3
		Link word		The address of the next command.
		Parameters		(as needed).

	Some definitions related to the Command Word are:
 */
#define CMD_EOL		0x8000			/* The last command of the list, stop. */
#define CMD_SUSP	0x4000			/* Suspend after doing cmd. */
#define CMD_INTR	0x2000			/* Interrupt after doing cmd. */

enum commands {
	CmdNOp = 0, CmdSASetup = 1, CmdConfigure = 2, CmdMulticastList = 3,
	CmdTx = 4, CmdTDR = 5, CmdDump = 6, CmdDiagnose = 7};

/* Information that need to be kept for each board. */
struct net_local {
	struct enet_statistics stats;
	int last_restart;
	short rx_head;
	short rx_tail;
	short tx_head;
	short tx_cmd_link;
	short tx_reap;
};

/*
  		Details of the EtherExpress Implementation
  The EtherExpress takes an unusual approach to host access to packet buffer
  memory.  The host can use either the Dataport, with independent
  autoincrementing read and write pointers, or it can I/O map 32 bytes of the
  memory using the "Shadow Memory Pointer" (SMB) as follows:
			ioaddr						Normal EtherExpress registers
			ioaddr+0x4000...0x400f		Buffer Memory at SMB...SMB+15
			ioaddr+0x8000...0x800f		Buffer Memory at SMB+16...SMB+31
			ioaddr+0xC000...0xC007		"" SMB+16...SMB+23 (hardware flaw?)
			ioaddr+0xC008...0xC00f		Buffer Memory at 0x0008...0x000f
  The last I/O map set is useful if you put the i82586 System Command Block
  (the command mailbox) exactly at 0x0008.  (There seems to be some
  undocumented init structure at 0x0000-7, so I had to use the Crywnr memory
  setup verbatim for those four words anyway.)

  A problem with using either one of these mechanisms is that you must run
  single-threaded, or the interrupt handler must restore a changed value of
  the read, write, or SMB pointers.

  Unlike the Crynwr driver, my driver mostly ignores the I/O mapped "feature"
  and relies heavily on the dataport for buffer memory access.  To minimize
  switching, the read_pointer is dedicated to the Rx interrupt handler, and
  the write_pointer is used by the send_packet() routine (it's carefully saved
  and restored when it's needed by the interrupt handler).
  */

/* Offsets from the base I/O address. */
#define DATAPORT	0	/* Data Transfer Register. */
#define WRITE_PTR	2	/* Write Address Pointer. */
#define READ_PTR	4	/* Read Address Pointer. */
#define SIGNAL_CA	6	/* Frob the 82586 Channel Attention line. */
#define SET_IRQ		7	/* IRQ Select. */
#define SHADOW_PTR	8	/* Shadow Memory Bank Pointer. */
#define MEM_Ctrl	11
#define MEM_Page_Ctrl	12
#define Config		13
#define EEPROM_Ctrl		14
#define ID_PORT		15

/*	EEPROM_Ctrl bits. */

#define EE_SHIFT_CLK	0x01	/* EEPROM shift clock. */
#define EE_CS			0x02	/* EEPROM chip select. */
#define EE_DATA_WRITE	0x04	/* EEPROM chip data in. */
#define EE_DATA_READ	0x08	/* EEPROM chip data out. */
#define EE_CTRL_BITS	(EE_SHIFT_CLK | EE_CS | EE_DATA_WRITE | EE_DATA_READ)
#define ASIC_RESET		0x40
#define _586_RESET		0x80

/* Offsets to elements of the System Control Block structure. */
#define SCB_STATUS	0xc008
#define SCB_CMD		0xc00A
#define	 CUC_START	 0x0100
#define	 CUC_RESUME	 0x0200
#define	 CUC_SUSPEND 0x0300
#define	 RX_START	 0x0010
#define	 RX_RESUME	 0x0020
#define	 RX_SUSPEND	 0x0030
#define SCB_CBL		0xc00C	/* Command BLock offset. */
#define SCB_RFA		0xc00E	/* Rx Frame Area offset. */

/*
  What follows in 'init_words[]' is the "program" that is downloaded to the
  82586 memory.	 It's mostly tables and command blocks, and starts at the
  reset address 0xfffff6.

  Even with the additional "don't care" values, doing it this way takes less
  program space than initializing the individual tables, and I feel it's much
  cleaner.

  The databook is particularly useless for the first two structures; they are
  completely undocumented.  I had to use the Crynwr driver as an example.

   The memory setup is as follows:
   */

#define CONFIG_CMD	0x0018
#define SET_SA_CMD	0x0024
#define SA_OFFSET	0x002A
#define IDLELOOP	0x30
#define TDR_CMD		0x38
#define TDR_TIME	0x3C
#define DUMP_CMD	0x40
#define DIAG_CMD	0x48
#define SET_MC_CMD	0x4E
#define DUMP_DATA	0x56	/* A 170 byte buffer for dump and Set-MC into. */

#define TX_BUF_START	0x0100
#define NUM_TX_BUFS 	4
#define TX_BUF_SIZE		0x0680	/* packet+header+TBD+extra (1518+14+20+16) */
#define TX_BUF_END		0x2000

#define RX_BUF_START	0x2000
#define RX_BUF_SIZE 	(0x640)	/* packet+header+RBD+extra */
#define RX_BUF_END		0x4000

/*
  That's it: only 86 bytes to set up the beast, including every extra
  command available.  The 170 byte buffer at DUMP_DATA is shared between the
  Dump command (called only by the diagnostic program) and the SetMulticastList
  command.

  To complete the memory setup you only have to write the station address at
  SA_OFFSET and create the Tx & Rx buffer lists.

  The Tx command chain and buffer list is setup as follows:
  A Tx command table, with the data buffer pointing to...
  A Tx data buffer descriptor.  The packet is in a single buffer, rather than
     chaining together several smaller buffers.
  A NoOp command, which initially points to itself,
  And the packet data.

  A transmit is done by filling in the Tx command table and data buffer,
  re-writing the NoOp command, and finally changing the offset of the last
  command to point to the current Tx command.  When the Tx command is finished,
  it jumps to the NoOp, when it loops until the next Tx command changes the
  "link offset" in the NoOp.  This way the 82586 never has to go through the
  slow restart sequence.

  The Rx buffer list is set up in the obvious ring structure.  We have enough
  memory (and low enough interrupt latency) that we can avoid the complicated
  Rx buffer linked lists by alway associating a full-size Rx data buffer with
  each Rx data frame.

  I current use four transmit buffers starting at TX_BUF_START (0x0100), and
  use the rest of memory, from RX_BUF_START to RX_BUF_END, for Rx buffers.

  */

static short init_words[] = {
	0x0000,					/* Set bus size to 16 bits. */
	0x0000,0x0000,			/* Set control mailbox (SCB) addr. */
	0,0,					/* pad to 0x000000. */
	0x0001,					/* Status word that's cleared when init is done. */
	0x0008,0,0,				/* SCB offset, (skip, skip) */

	0,0xf000|RX_START|CUC_START,	/* SCB status and cmd. */
	CONFIG_CMD,				/* Command list pointer, points to Configure. */
	RX_BUF_START,				/* Rx block list. */
	0,0,0,0,				/* Error count: CRC, align, buffer, overrun. */

	/* 0x0018: Configure command.  Change to put MAC data with packet. */
	0, CmdConfigure,		/* Status, command.		*/
	SET_SA_CMD,				/* Next command is Set Station Addr. */
	0x0804,					/* "4" bytes of config data, 8 byte FIFO. */
	0x2e40,					/* Magic values, including MAC data location. */
	0,						/* Unused pad word. */

	/* 0x0024: Setup station address command. */
	0, CmdSASetup,
	SET_MC_CMD,				/* Next command. */
	0xaa00,0xb000,0x0bad,	/* Station address (to be filled in) */

	/* 0x0030: NOP, looping back to itself.	 Point to first Tx buffer to Tx. */
	0, CmdNOp, IDLELOOP, 0 /* pad */,

	/* 0x0038: A unused Time-Domain Reflectometer command. */
	0, CmdTDR, IDLELOOP, 0,

	/* 0x0040: An unused Dump State command. */
	0, CmdDump, IDLELOOP, DUMP_DATA,

	/* 0x0048: An unused Diagnose command. */
	0, CmdDiagnose, IDLELOOP,

	/* 0x004E: An empty set-multicast-list command. */
#ifdef initial_text_tx
	0, CmdMulticastList, DUMP_DATA, 0,
#else
	0, CmdMulticastList, IDLELOOP, 0,
#endif

	/* 0x0056: A continuous transmit command, only here for testing. */
	0, CmdTx, DUMP_DATA, DUMP_DATA+8, 0x83ff, -1, DUMP_DATA, 0,
};

/* Index to functions, as function prototypes. */

extern int express_probe(struct device *dev);	/* Called from Space.c */

static int	eexp_probe1(struct device *dev, short ioaddr);
static int	eexp_open(struct device *dev);
static int	eexp_send_packet(struct sk_buff *skb, struct device *dev);
static void	eexp_interrupt(int reg_ptr);
static void eexp_rx(struct device *dev);
static int	eexp_close(struct device *dev);
static struct enet_statistics *eexp_get_stats(struct device *dev);
#ifdef HAVE_MULTICAST
static void set_multicast_list(struct device *dev, int num_addrs, void *addrs);
#endif

static int read_eeprom(int ioaddr, int location);
static void hardware_send_packet(struct device *dev, void *buf, short length);
static void init_82586_mem(struct device *dev);
static void init_rx_bufs(struct device *dev);


/* Check for a network adaptor of this type, and return '0' iff one exists.
   If dev->base_addr == 0, probe all likely locations.
   If dev->base_addr == 1, always return failure.
   If dev->base_addr == 2, (detachable devices only) alloate space for the
   device and return success.
   */
int
express_probe(struct device *dev)
{
	/* Don't probe all settable addresses, 0x[23][0-7]0, just common ones. */
	int *port, ports[] = {0x300, 0x270, 0x320, 0x340, 0};
	int base_addr = dev->base_addr;

	if (base_addr > 0x1ff)	/* Check a single specified location. */
		return eexp_probe1(dev, base_addr);
	else if (base_addr > 0)
		return ENXIO;		/* Don't probe at all. */

	for (port = &ports[0]; *port; port++) {
		short id_addr = *port + ID_PORT;
		unsigned short sum = 0;
		int i;
#ifdef notdef
		for (i = 16; i > 0; i--)
			sum += inb(id_addr);
		printk("EtherExpress ID checksum is %04x.\n", sum);
#else
		for (i = 4; i > 0; i--) {
			short id_val = inb(id_addr);
			sum |= (id_val >> 4) << ((id_val & 3) << 2);
		}
#endif
		if (sum == 0xbaba
			&& eexp_probe1(dev, *port) == 0)
			return 0;
	}

	return ENODEV;			/* ENODEV would be more accurate. */
}

int eexp_probe1(struct device *dev, short ioaddr)
{
	unsigned short station_addr[3];
	int i;

	printk("%s: EtherExpress at %#x,", dev->name, ioaddr);