?? firandmac.mdl
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Block {
BlockType Outport
Name "new_data"
Position [370, 188, 400, 202]
Port "3"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Line {
SrcBlock "Add"
SrcPort 1
DstBlock "data_addr"
DstPort 1
}
Line {
SrcBlock "Computation Rate Counter"
SrcPort 1
Points [75, 0]
Branch {
Points [0, 60]
DstBlock "Relational"
DstPort 1
}
Branch {
Points [0, 0]
Branch {
DstBlock "coeff_addr"
DstPort 1
}
Branch {
Points [0, -65]
DstBlock "Add"
DstPort 2
}
}
}
Line {
SrcBlock "Relational"
SrcPort 1
DstBlock "new_data"
DstPort 1
}
Line {
SrcBlock "Zero"
SrcPort 1
DstBlock "Relational"
DstPort 2
}
Line {
SrcBlock "Sample Rate Counter"
SrcPort 1
DstBlock "Up Sample"
DstPort 1
}
Line {
SrcBlock "Up Sample"
SrcPort 1
Points [35, 0]
DstBlock "Add"
DstPort 1
}
}
}
Block {
BlockType Reference
Name "Delay"
Ports [1, 1]
Position [590, 163, 625, 197]
ShowName off
SourceBlock "xbsBasic/Delay"
SourceType "Xilinx Delay Block"
latency "12"
period "1"
explicit_period off
dbl_ovrd off
}
Block {
BlockType Reference
Name "Down Sample"
Ports [1, 1]
Position [670, 161, 705, 199]
ShowName off
SourceBlock "xbsBasic/Down Sample"
SourceType "Xilinx Down Sampling Block"
sample_ratio "length(coef)"
sample_ahead on
init_zero off
dbl_ovrd off
}
Block {
BlockType SubSystem
Name "MAC"
Ports [3, 1]
Position [470, 142, 520, 218]
ShowPortLabels on
TreatAsAtomicUnit off
RTWSystemCode "Auto"
RTWFcnNameOpts "Auto"
RTWFileNameOpts "Auto"
System {
Name "MAC"
Location [309, 410, 686, 616]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "automatic"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
ZoomFactor "100"
AutoZoom on
Block {
BlockType Inport
Name "a"
Position [45, 128, 75, 142]
Port "1"
Interpolate on
}
Block {
BlockType Inport
Name "b"
Position [45, 158, 75, 172]
Port "2"
Interpolate on
}
Block {
BlockType Inport
Name "rst"
Position [45, 58, 75, 72]
Port "3"
Interpolate on
}
Block {
BlockType Reference
Name "AddSub"
Ports [2, 1]
Position [220, 98, 260, 167]
SourceBlock "xbsMath/AddSub"
SourceType "Xilinx Adder/Subtractor Block"
mode "Addition"
precision "User Defined"
arith_type "Unsigned"
n_bits "8"
bin_pt "2"
quantization "Truncate"
overflow "Wrap"
latency "0"
period "-1"
explicit_period on
dbl_ovrd off
}
Block {
BlockType Reference
Name "Mult"
Ports [2, 1]
Position [120, 120, 170, 180]
SourceBlock "xbsMath/Mult"
SourceType "Xilinx Multiplier Block"
precision "Full"
arith_type "Signed (2's comp)"
n_bits "8"
bin_pt "2"
quantization "Truncate"
overflow "Wrap"
latency "0"
period "1"
explicit_period off
pipeline off
dbl_ovrd off
use_core on
gen_core on
}
Block {
BlockType Reference
Name "Register"
Ports [2, 1]
Position [140, 35, 180, 75]
SourceBlock "xbsBasic/Register"
SourceType "Xilinx Register Block"
init "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "1"
explicit_period off
reg_only_valid on
dbl_ovrd off
}
Block {
BlockType Outport
Name "result1"
Position [300, 128, 330, 142]
Port "1"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Line {
SrcBlock "b"
SrcPort 1
DstBlock "Mult"
DstPort 2
}
Line {
SrcBlock "a"
SrcPort 1
DstBlock "Mult"
DstPort 1
}
Line {
SrcBlock "Mult"
SrcPort 1
DstBlock "AddSub"
DstPort 2
}
Line {
SrcBlock "AddSub"
SrcPort 1
Points [15, 0]
Branch {
DstBlock "result1"
DstPort 1
}
Branch {
Points [0, -115; -155, 0]
DstBlock "Register"
DstPort 1
}
}
Line {
SrcBlock "Register"
SrcPort 1
Points [20, 0]
DstBlock "AddSub"
DstPort 1
}
Line {
SrcBlock "rst"
SrcPort 1
DstBlock "Register"
DstPort 2
}
}
}
Block {
BlockType Reference
Name "Up Sample"
Ports [1, 1]
Position [105, 162, 140, 198]
ShowName off
SourceBlock "xbsBasic/Up Sample"
SourceType "Xilinx Up Sampling Block"
sample_ratio "length(coef)"
copy_samples on
dbl_ovrd off
}
Block {
BlockType Outport
Name "Dout"
Position [770, 173, 800, 187]
Port "1"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Line {
SrcBlock "Din"
SrcPort 1
DstBlock "Up Sample"
DstPort 1
}
Line {
SrcBlock "Up Sample"
SrcPort 1
DstBlock "Circular Data Buffer"
DstPort 2
}
Line {
SrcBlock "Controller"
SrcPort 3
Points [45, 0; 0, 105]
Branch {
DstBlock "Circular Data Buffer"
DstPort 3
}
Branch {
Points [0, 50; 235, 0]
DstBlock "MAC"
DstPort 3
}
}
Line {
SrcBlock "Controller"
SrcPort 2
Points [100, 0; 0, 80]
DstBlock "Circular Data Buffer"
DstPort 1
}
Line {
SrcBlock "Controller"
SrcPort 1
DstBlock "Coef LUT"
DstPort 1
}
Line {
SrcBlock "Delay"
SrcPort 1
DstBlock "Down Sample"
DstPort 1
}
Line {
SrcBlock "Down Sample"
SrcPort 1
DstBlock "Dout"
DstPort 1
}
Line {
SrcBlock "Circular Data Buffer"
SrcPort 1
DstBlock "MAC"
DstPort 2
}
Line {
SrcBlock "Coef LUT"
SrcPort 1
Points [60, 0; 0, 90]
DstBlock "MAC"
DstPort 1
}
Line {
SrcBlock "MAC"
SrcPort 1
DstBlock "Delay"
DstPort 1
}
}
}
Block {
BlockType Reference
Name "Model Info"
Ports []
Position [150, 49, 489, 227]
ForegroundColor "blue"
BackgroundColor "green"
ShowName off
FontName "Arial"
FontSize 18
FontWeight "bold"
SourceBlock "simulink3/Signals\n& Systems/Model Info"
SourceType "CMBlock"
InitialBlockCM "none"
BlockCM "none"
Frame "on"
DisplayStringWithTags "FPGA設計"
MaskDisplayString "FPGA設計"
HorizontalTextAlignment "Center"
LeftAlignmentValue "0.5"
SourceBlockDiagram "firandmac"
TagMaxNumber "20"
}
Block {
BlockType Scope
Name "Scope"
Ports [2]
Position [525, 103, 555, 147]
Floating off
Location [274, 272, 851, 677]
Open on
NumInputPorts "2"
TickLabels "OneTimeTick"
ZoomMode "yonly"
List {
ListType AxesTitles
axes1 "FIR"
axes2 "MAC Based FIR"
}
Grid "on"
TimeRange "50"
YMin "-5~-5"
YMax "60~60"
SaveToWorkspace off
SaveName "ScopeData"
DataFormat "StructureWithTime"
LimitDataPoints on
MaxDataPoints "5000"
Decimation "1"
SampleInput off
SampleTime "0"
}
Block {
BlockType Reference
Name "Signal From\nWorkspace"
Ports [0, 1]
Position [55, 80, 125, 100]
SourceBlock "dspsrcs2/Signal From\nWorkspace"
SourceType "Signal From Workspace"
X "[1 2 3 4 5]"
Ts "length(coef)"
nsamps "1"
}
Line {
SrcBlock "Signal From\nWorkspace"
SrcPort 1
DstBlock "Din"
DstPort 1
}
Line {
SrcBlock "Din"
SrcPort 1
Points [25, 0]
Branch {
DstBlock "FIR"
DstPort 1
}
Branch {
DstBlock "MAC Based FIR"
DstPort 1
}
}
Line {
SrcBlock "Dout MAC"
SrcPort 1
Points [55, 0]
DstBlock "Scope"
DstPort 2
}
Line {
SrcBlock "Dout"
SrcPort 1
Points [55, 0]
DstBlock "Scope"
DstPort 1
}
Line {
SrcBlock "FIR"
SrcPort 1
DstBlock "Dout"
DstPort 1
}
Line {
SrcBlock "MAC Based FIR"
SrcPort 1
DstBlock "Dout MAC"
DstPort 1
}
}
}
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