?? mc9s08qe128.inc
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PTCDD_PTCDD5: equ 5 ; Data Direction for Port C Bit 5
PTCDD_PTCDD6: equ 6 ; Data Direction for Port C Bit 6
PTCDD_PTCDD7: equ 7 ; Data Direction for Port C Bit 7
; bit position masks
mPTCDD_PTCDD0: equ %00000001
mPTCDD_PTCDD1: equ %00000010
mPTCDD_PTCDD2: equ %00000100
mPTCDD_PTCDD3: equ %00001000
mPTCDD_PTCDD4: equ %00010000
mPTCDD_PTCDD5: equ %00100000
mPTCDD_PTCDD6: equ %01000000
mPTCDD_PTCDD7: equ %10000000
;*** PTDD - Port D Data Register; 0x00000006 ***
PTDD: equ $00000006 ;*** PTDD - Port D Data Register; 0x00000006 ***
; bit numbers for usage in BCLR, BSET, BRCLR and BRSET
PTDD_PTDD0: equ 0 ; Port D Data Register Bit 0
PTDD_PTDD1: equ 1 ; Port D Data Register Bit 1
PTDD_PTDD2: equ 2 ; Port D Data Register Bit 2
PTDD_PTDD3: equ 3 ; Port D Data Register Bit 3
PTDD_PTDD4: equ 4 ; Port D Data Register Bit 4
PTDD_PTDD5: equ 5 ; Port D Data Register Bit 5
PTDD_PTDD6: equ 6 ; Port D Data Register Bit 6
PTDD_PTDD7: equ 7 ; Port D Data Register Bit 7
; bit position masks
mPTDD_PTDD0: equ %00000001
mPTDD_PTDD1: equ %00000010
mPTDD_PTDD2: equ %00000100
mPTDD_PTDD3: equ %00001000
mPTDD_PTDD4: equ %00010000
mPTDD_PTDD5: equ %00100000
mPTDD_PTDD6: equ %01000000
mPTDD_PTDD7: equ %10000000
;*** PTDDD - Port D Data Direction Register; 0x00000007 ***
PTDDD: equ $00000007 ;*** PTDDD - Port D Data Direction Register; 0x00000007 ***
; bit numbers for usage in BCLR, BSET, BRCLR and BRSET
PTDDD_PTDDD0: equ 0 ; Data Direction for Port D Bit 0
PTDDD_PTDDD1: equ 1 ; Data Direction for Port D Bit 1
PTDDD_PTDDD2: equ 2 ; Data Direction for Port D Bit 2
PTDDD_PTDDD3: equ 3 ; Data Direction for Port D Bit 3
PTDDD_PTDDD4: equ 4 ; Data Direction for Port D Bit 4
PTDDD_PTDDD5: equ 5 ; Data Direction for Port D Bit 5
PTDDD_PTDDD6: equ 6 ; Data Direction for Port D Bit 6
PTDDD_PTDDD7: equ 7 ; Data Direction for Port D Bit 7
; bit position masks
mPTDDD_PTDDD0: equ %00000001
mPTDDD_PTDDD1: equ %00000010
mPTDDD_PTDDD2: equ %00000100
mPTDDD_PTDDD3: equ %00001000
mPTDDD_PTDDD4: equ %00010000
mPTDDD_PTDDD5: equ %00100000
mPTDDD_PTDDD6: equ %01000000
mPTDDD_PTDDD7: equ %10000000
;*** PTED - Port E Data Register; 0x00000008 ***
PTED: equ $00000008 ;*** PTED - Port E Data Register; 0x00000008 ***
; bit numbers for usage in BCLR, BSET, BRCLR and BRSET
PTED_PTED0: equ 0 ; Port E Data Register Bit 0
PTED_PTED1: equ 1 ; Port E Data Register Bit 1
PTED_PTED2: equ 2 ; Port E Data Register Bit 2
PTED_PTED3: equ 3 ; Port E Data Register Bit 3
PTED_PTED4: equ 4 ; Port E Data Register Bit 4
PTED_PTED5: equ 5 ; Port E Data Register Bit 5
PTED_PTED6: equ 6 ; Port E Data Register Bit 6
PTED_PTED7: equ 7 ; Port E Data Register Bit 7
; bit position masks
mPTED_PTED0: equ %00000001
mPTED_PTED1: equ %00000010
mPTED_PTED2: equ %00000100
mPTED_PTED3: equ %00001000
mPTED_PTED4: equ %00010000
mPTED_PTED5: equ %00100000
mPTED_PTED6: equ %01000000
mPTED_PTED7: equ %10000000
;*** PTEDD - Port E Data Direction Register; 0x00000009 ***
PTEDD: equ $00000009 ;*** PTEDD - Port E Data Direction Register; 0x00000009 ***
; bit numbers for usage in BCLR, BSET, BRCLR and BRSET
PTEDD_PTEDD0: equ 0 ; Data Direction for Port E Bit 0
PTEDD_PTEDD1: equ 1 ; Data Direction for Port E Bit 1
PTEDD_PTEDD2: equ 2 ; Data Direction for Port E Bit 2
PTEDD_PTEDD3: equ 3 ; Data Direction for Port E Bit 3
PTEDD_PTEDD4: equ 4 ; Data Direction for Port E Bit 4
PTEDD_PTEDD5: equ 5 ; Data Direction for Port E Bit 5
PTEDD_PTEDD6: equ 6 ; Data Direction for Port E Bit 6
PTEDD_PTEDD7: equ 7 ; Data Direction for Port E Bit 7
; bit position masks
mPTEDD_PTEDD0: equ %00000001
mPTEDD_PTEDD1: equ %00000010
mPTEDD_PTEDD2: equ %00000100
mPTEDD_PTEDD3: equ %00001000
mPTEDD_PTEDD4: equ %00010000
mPTEDD_PTEDD5: equ %00100000
mPTEDD_PTEDD6: equ %01000000
mPTEDD_PTEDD7: equ %10000000
;*** PTFD - Port F Data Register; 0x0000000A ***
PTFD: equ $0000000A ;*** PTFD - Port F Data Register; 0x0000000A ***
; bit numbers for usage in BCLR, BSET, BRCLR and BRSET
PTFD_PTFD0: equ 0 ; Port F Data Register Bit 0
PTFD_PTFD1: equ 1 ; Port F Data Register Bit 1
PTFD_PTFD2: equ 2 ; Port F Data Register Bit 2
PTFD_PTFD3: equ 3 ; Port F Data Register Bit 3
PTFD_PTFD4: equ 4 ; Port F Data Register Bit 4
PTFD_PTFD5: equ 5 ; Port F Data Register Bit 5
PTFD_PTFD6: equ 6 ; Port F Data Register Bit 6
PTFD_PTFD7: equ 7 ; Port F Data Register Bit 7
; bit position masks
mPTFD_PTFD0: equ %00000001
mPTFD_PTFD1: equ %00000010
mPTFD_PTFD2: equ %00000100
mPTFD_PTFD3: equ %00001000
mPTFD_PTFD4: equ %00010000
mPTFD_PTFD5: equ %00100000
mPTFD_PTFD6: equ %01000000
mPTFD_PTFD7: equ %10000000
;*** PTFDD - Port F Data Direction Register; 0x0000000B ***
PTFDD: equ $0000000B ;*** PTFDD - Port F Data Direction Register; 0x0000000B ***
; bit numbers for usage in BCLR, BSET, BRCLR and BRSET
PTFDD_PTFDD0: equ 0 ; Data Direction for Port F Bit 0
PTFDD_PTFDD1: equ 1 ; Data Direction for Port F Bit 1
PTFDD_PTFDD2: equ 2 ; Data Direction for Port F Bit 2
PTFDD_PTFDD3: equ 3 ; Data Direction for Port F Bit 3
PTFDD_PTFDD4: equ 4 ; Data Direction for Port F Bit 4
PTFDD_PTFDD5: equ 5 ; Data Direction for Port F Bit 5
PTFDD_PTFDD6: equ 6 ; Data Direction for Port F Bit 6
PTFDD_PTFDD7: equ 7 ; Data Direction for Port F Bit 7
; bit position masks
mPTFDD_PTFDD0: equ %00000001
mPTFDD_PTFDD1: equ %00000010
mPTFDD_PTFDD2: equ %00000100
mPTFDD_PTFDD3: equ %00001000
mPTFDD_PTFDD4: equ %00010000
mPTFDD_PTFDD5: equ %00100000
mPTFDD_PTFDD6: equ %01000000
mPTFDD_PTFDD7: equ %10000000
;*** KBI1SC - KBI1 Status and Control Register; 0x0000000C ***
KBI1SC: equ $0000000C ;*** KBI1SC - KBI1 Status and Control Register; 0x0000000C ***
; bit numbers for usage in BCLR, BSET, BRCLR and BRSET
KBI1SC_KBIMOD: equ 0 ; Keyboard Detection Mode
KBI1SC_KBIE: equ 1 ; Keyboard Interrupt Enable
KBI1SC_KBACK: equ 2 ; Keyboard Interrupt Acknowledge
KBI1SC_KBF: equ 3 ; Keyboard Interrupt Flag
; bit position masks
mKBI1SC_KBIMOD: equ %00000001
mKBI1SC_KBIE: equ %00000010
mKBI1SC_KBACK: equ %00000100
mKBI1SC_KBF: equ %00001000
;*** KBI1PE - KBI1 Pin Enable Register; 0x0000000D ***
KBI1PE: equ $0000000D ;*** KBI1PE - KBI1 Pin Enable Register; 0x0000000D ***
; bit numbers for usage in BCLR, BSET, BRCLR and BRSET
KBI1PE_KBIPE0: equ 0 ; Keyboard Pin Enable for KBI Port Bit 0
KBI1PE_KBIPE1: equ 1 ; Keyboard Pin Enable for KBI Port Bit 1
KBI1PE_KBIPE2: equ 2 ; Keyboard Pin Enable for KBI Port Bit 2
KBI1PE_KBIPE3: equ 3 ; Keyboard Pin Enable for KBI Port Bit 3
KBI1PE_KBIPE4: equ 4 ; Keyboard Pin Enable for KBI Port Bit 4
KBI1PE_KBIPE5: equ 5 ; Keyboard Pin Enable for KBI Port Bit 5
KBI1PE_KBIPE6: equ 6 ; Keyboard Pin Enable for KBI Port Bit 6
KBI1PE_KBIPE7: equ 7 ; Keyboard Pin Enable for KBI Port Bit 7
; bit position masks
mKBI1PE_KBIPE0: equ %00000001
mKBI1PE_KBIPE1: equ %00000010
mKBI1PE_KBIPE2: equ %00000100
mKBI1PE_KBIPE3: equ %00001000
mKBI1PE_KBIPE4: equ %00010000
mKBI1PE_KBIPE5: equ %00100000
mKBI1PE_KBIPE6: equ %01000000
mKBI1PE_KBIPE7: equ %10000000
;*** KBI1ES - KBI1 Edge Select Register; 0x0000000E ***
KBI1ES: equ $0000000E ;*** KBI1ES - KBI1 Edge Select Register; 0x0000000E ***
; bit numbers for usage in BCLR, BSET, BRCLR and BRSET
KBI1ES_KBEDG0: equ 0 ; Keyboard Edge Select Bit 0
KBI1ES_KBEDG1: equ 1 ; Keyboard Edge Select Bit 1
KBI1ES_KBEDG2: equ 2 ; Keyboard Edge Select Bit 2
KBI1ES_KBEDG3: equ 3 ; Keyboard Edge Select Bit 3
KBI1ES_KBEDG4: equ 4 ; Keyboard Edge Select Bit 4
KBI1ES_KBEDG5: equ 5 ; Keyboard Edge Select Bit 5
KBI1ES_KBEDG6: equ 6 ; Keyboard Edge Select Bit 6
KBI1ES_KBEDG7: equ 7 ; Keyboard Edge Select Bit 7
; bit position masks
mKBI1ES_KBEDG0: equ %00000001
mKBI1ES_KBEDG1: equ %00000010
mKBI1ES_KBEDG2: equ %00000100
mKBI1ES_KBEDG3: equ %00001000
mKBI1ES_KBEDG4: equ %00010000
mKBI1ES_KBEDG5: equ %00100000
mKBI1ES_KBEDG6: equ %01000000
mKBI1ES_KBEDG7: equ %10000000
;*** IRQSC - Interrupt request status and control register; 0x0000000F ***
IRQSC: equ $0000000F ;*** IRQSC - Interrupt request status and control register; 0x0000000F ***
; bit numbers for usage in BCLR, BSET, BRCLR and BRSET
IRQSC_IRQMOD: equ 0 ; IRQ Detection Mode
IRQSC_IRQIE: equ 1 ; IRQ Interrupt Enable
IRQSC_IRQACK: equ 2 ; IRQ Acknowledge
IRQSC_IRQF: equ 3 ; IRQ Flag
IRQSC_IRQPE: equ 4 ; IRQ Pin Enable
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