?? excarchshow.c
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/* excArchShow.c - SH exception show facilities *//* Copyright 1994-2001 Wind River Systems, Inc. */#include "copyright_wrs.h"/*modification history--------------------02f,10dec01,zl removed local typedefs of UINT64 and INT64.02e,21aug00,hk merge SH7729 to SH7700. merge SH7410 and SH7040 to SH7600.02d,22jun00,hk changed fpscr display for SH7750.02c,20apr00,hk changed sysBErrVecNum to excBErrVecNum.02b,19aug99,zl included floating point info for SH7750.02a,07oct98,st deleted debug code in excInfoShow().01z,22sep98,hms deleted SH7700 "NULL" message in excMsgs[] (0x120, 0x140) and added comment "SH7750 only". deleted debug code. modified comments. change "SCIF1","SCIF2" message in excMsgs[] to "SCI","SCIF".01y,16jul98,st added SH7750 support.01y,08may98,jmc added support for SH-DSP and SH3-DSP.01z,12may98,hk added FPSCR support in excInfoShow().01w,26nov97,hms added fpp support definitions.01x,04jan98,hk fixed range check for sysBErrVecNum.01w,25nov97,hk changed to use sequential interrupt vector number for SH7700.01v,25apr97,hk changed SH704X to SH7040.01u,23feb97,hk added validity check for EXPEVT display in excInfoShow().01t,17feb97,hk reworked on excMsgs[] to display uniform exception messages.01s,17feb97,hk did minor format change in access address display. 01r,17feb97,hk improved excInfoShow() to display event specific registers.01q,16feb97,hk added uninitialized interrupt messages for SH7708/SH7707 to excMsgs[]. changed excIntInfoFmt and excInfoShow() for SH7700. fixed SH7700 vecName fetch code in excIntInfoShow().01p,12feb97,hk changed excIntInfoFmt for SH7700.01o,09feb97,hk moved zero divide message in excMsgs[] to 2nd. message review.01n,18jan97,hk added access address display in excInfoShow() for SH7700.01m,19aug96,hk deleted bank register display from excRegsShow().01l,19aug96,hk moved SH7700 "Zero Divide" message in excMsgs[] to 254th.01k,13aug96,hk added uninitialized interrupt message for SH7700.01j,09aug96,hk changed exception messages for SH7700. deleted unnecessary NULLs for all cpus.01i,04aug96,hk changed code layout.01h,13jun96,hk added support for SH7700. changed excRegsShow() format.01g,06jly95,sa added "Zero Divide" on #62 of excMsgs.01f,27mar95,hk added bus err support, disabled excRegsShow(), copyright 1995.01e,17jan95,hk added excRegsShow().01d,15dec94,sa changed 'Vector number %d (0-255)' -> '(0-127)'.01c,30oct94,hk restored 68k code, adjusted for SH.01b,25oct94,hk edited excMsgs[] for sh.01a,18jul94,hk derived from 01c of 68k. Just a stub.*//*This module contains SH architecture dependent portions of theexception handling facilities. See excLib for the portions that arearchitecture independent.SEE ALSO: dbgLib, sigLib, intLib, "Debugging"*/#include "vxWorks.h"#include "esf.h"#include "iv.h"#include "taskLib.h"#include "errno.h"#include "string.h"#include "logLib.h"#include "stdio.h"#include "fioLib.h"#include "intLib.h"#include "qLib.h"#include "private/kernelLibP.h"#include "private/funcBindP.h"#if (CPU==SH7750 || CPU==SH7700)#include "fppLib.h" /* FP_CONTEXT */#include "private/taskLibP.h" /* pTaskLastFpTcb prototype */#endif/* external data */IMPORT int excBErrVecNum; /* interrupt vecter number used for bus error *//* locals *//* * Exception error messages. These are used by the exception printing routine. * Exception numbers are the same as used by the CPU. */LOCAL char *excMsgs [] = {#if (CPU==SH7750 || CPU==SH7700) "(VxWorks Software Breakpoint)", /* 0 0x000: */ "Zero Divide", /* 1 0x020: */ "TLB Miss/Invalid (Load)", /* 2 0x040: */ "TLB Miss/Invalid (Store)", /* 3 0x060: */ "Initial Page Write", /* 4 0x080: */ "TLB Protection Violation (Load)", /* 5 0x0a0: */ "TLB Protection Violation (Store)", /* 6 0x0c0: */ "Address Error (Load)", /* 7 0x0e0: */ "Address Error (Store)", /* 8 0x100: */ "FPU Exception", /* 9 0x120: (SH7750/SH7700 only) */ "TLB Multiple Hit", /* 10 0x140: (SH7750 only) */ "Unconditional Trap", /* 11 0x160: */ "Reserved Instruction Code", /* 12 0x180: */ "Illegal Slot Instruction", /* 13 0x1a0: */ "(NMI)", /* 14 0x1c0: */ "User Breakpoint Trap", /* 15 0x1e0: */ "(IRL15)", /* 16 0x200: */ "(IRL14)", /* 17 0x220: */ "(IRL13)", /* 18 0x240: */ "(IRL12)", /* 19 0x260: */ "(IRL11)", /* 20 0x280: */ "(IRL10)", /* 21 0x2a0: */ "(IRL9)", /* 22 0x2c0: */ "(IRL8)", /* 23 0x2e0: */ "(IRL7)", /* 24 0x300: */ "(IRL6)", /* 25 0x320: */ "(IRL5)", /* 26 0x340: */ "(IRL4)", /* 27 0x360: */ "(IRL3)", /* 28 0x380: */ "(IRL2)", /* 29 0x3a0: */ "(IRL1)", /* 30 0x3c0: */ NULL, /* 31 0x3e0: (reserved) */ "(TMU0 Underflow)", /* 32 0x400: */ "(TMU1 Underflow)", /* 33 0x420: */ "(TMU2 Underflow)", /* 34 0x440: */ "(TMU2 Input Capture)", /* 35 0x460: */ "(RTC Alarm Int)", /* 36 0x480: */ "(RTC Periodic Int)", /* 37 0x4a0: */ "(RTC Carry Int)", /* 38 0x4c0: */ "(SCI Rx Err)", /* 39 0x4e0: */ "(SCI Rx Int)", /* 40 0x500: */ "(SCI Tx Int)", /* 41 0x520: */ "(SCI Tx Err)", /* 42 0x540: */ "(WDT)", /* 43 0x560: */ "(BSC Refresh Compare Match)", /* 44 0x580: */ "(BSC Refresh Overflow)", /* 45 0x5a0: */ NULL, /* 46 0x5c0: */ NULL, /* 47 0x5e0: */#if (CPU==SH7750) "JTAG", /* 48 0x600: */ NULL, /* 49 0x620: */ "(DMAC DMTE0)", /* 50 0x640: */ "(DMAC DMTE1)", /* 51 0x660: */ "(DMAC DMTE2)", /* 52 0x680: */ "(DMAC DMTE3)", /* 53 0x6a0: */ "(DMAC DMTER)", /* 54 0x6c0: */ NULL, /* 55 0x6e0: */ "(SCIF Rx Err)", /* 56 0x700: */ "(SCIF Rx Int)", /* 57 0x720: */ "(SCIF Tx Int)", /* 58 0x740: */ "(SCIF Tx Err)", /* 59 0x760: */ NULL, /* 60 0x780: */ NULL, /* 61 0x7a0: */ NULL, /* 62 0x7c0: */ NULL, /* 63 0x7e0: */ "FPU Disable", /* 64 0x800: */ "Illegal Slot Instruction(FPU)", /* 65 0x820: */ NULL, /* 66 0x840: */ NULL, /* 67 0x860: */ NULL, /* 68 0x880: */ NULL, /* 69 0x8a0: */ NULL, /* 70 0x8c0: */ NULL, /* 71 0x8e0: */ NULL, /* 72 0x900: */ NULL, /* 73 0x920: */ NULL, /* 74 0x940: */ NULL, /* 75 0x960: */ NULL, /* 76 0x980: */ NULL, /* 77 0x9a0: */ NULL, /* 78 0x9c0: */ NULL, /* 79 0x9e0: */#elif (CPU==SH7700) "(IRQ0)", /* 48 0x600: SH7707 */ "(IRQ1)", /* 49 0x620: SH7707 */ "(IRQ2)", /* 50 0x640: SH7707 */ "(IRQ3)", /* 51 0x660: SH7707 */ "(IRQ4)", /* 52 0x680: SH7707 */ "(IRQ5)", /* 53 0x6a0: SH7707 */ NULL, /* 54 0x6c0: */ NULL, /* 55 0x6e0: */ "(PINT0 - PINT7)", /* 56 0x700: SH7707 */ "(PINT8 - PINT15)", /* 57 0x720: SH7707 */ NULL, /* 58 0x740: */ NULL, /* 59 0x760: */ NULL, /* 60 0x780: */ NULL, /* 61 0x7a0: */ NULL, /* 62 0x7c0: */ NULL, /* 63 0x7e0: */ "(DMAC0)", /* 64 0x800: SH7707 */ "(DMAC1)", /* 65 0x820: SH7707 */ "(DMAC2)", /* 66 0x840: SH7707 */ "(DMAC3)", /* 67 0x860: SH7707 */ "(SCIF1 Rx Err)", /* 68 0x880: SH7707 */ "(SCIF1 Rx Int)", /* 69 0x8a0: SH7707 */ "(SCIF1 Break Int)", /* 70 0x8c0: SH7707 */ "(SCIF1 Tx Int)", /* 71 0x8e0: SH7707 */ "(SCIF2 Rx Err)", /* 72 0x900: SH7707 */ "(SCIF2 Rx Int)", /* 73 0x920: SH7707 */ "(SCIF2 Break Int)", /* 74 0x940: SH7707 */ "(SCIF2 Tx Int)", /* 75 0x960: SH7707 */ "(AD)", /* 76 0x980: SH7707 */ "(LCD)", /* 77 0x9a0: SH7707 */ "(PC Card 0)", /* 78 0x9c0: SH7707 */ "(PC Card 1)", /* 79 0x9e0: SH7707 */#endif /* CPU==SH7700 */#elif (CPU==SH7600 || CPU==SH7000) NULL, /* 0: (power-on reset pc) */ NULL, /* 1: (power-on reset sp) */ NULL, /* 2: (manual reset pc) */ NULL, /* 3: (manual reset sp) */ "Reserved Instruction Code", /* 4: */ NULL, /* 5: (reserved) */ "Illegal Slot Instruction", /* 6: */ NULL, /* 7: (reserved) */ NULL, /* 8: (reserved) */ "CPU Address Error", /* 9: */ "DMA Address Error", /* 10: */ "(NMI)", /* 11: */ "User Break Interrupt", /* 12: */ NULL, NULL, NULL, /* 13-15: (reserved) */ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, /* 16-23: (reserved) */ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, /* 24-31: (reserved) */ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, /* 32-39: user trap */ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, /* 40-47: user trap */ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, /* 48-55: user trap */ NULL, NULL, NULL, NULL, NULL, NULL, /* 56-61: user trap */ "Zero Divide", /* 62: (used by VxWorks) */ "(VxWorks Software Breakpoint)", /* 63: (used by VxWorks) */#endif /* CPU==SH7600 || CPU==SH7000 */ };#if (CPU==SH7750 || CPU==SH7700)LOCAL char *excIntInfoFmt = "\n\Uninitialized Interrupt!\n\INTEVT Register: 0x%08x %s\n\Program Counter: 0x%08x\n\Status Register: 0x%08x\n";#elif (CPU==SH7600 || CPU==SH7000)LOCAL char *excIntInfoFmt = "\n\Uninitialized Interrupt!\n\Vector number %d (0-127). %s\n\Program Counter: 0x%08x\n\Status Register: 0x%08x\n";#endifLOCAL REG_SET excRegsBuf;/* forward declarations */LOCAL void excInfoShow (EXC_INFO *pExcInfo, BOOL doBell);LOCAL void excIntInfoShow (int vecNum, ESFSH *pEsf, REG_SET *pRegs, EXC_INFO *pExcInfo);LOCAL void excPanicShow (int vecNum, ESFSH *pEsf, REG_SET *pRegs, EXC_INFO *pExcInfo);LOCAL void excRegsShow (REG_SET * pRegs);#if (CPU==SH7750 || CPU==SH7700)LOCAL void excFpregsShow (FP_CONTEXT * pFp);#endif/********************************************************************************* excShowInit - initialize exception show facility** NOMANUAL*/STATUS excShowInit (void) { _func_excInfoShow = (FUNCPTR) excInfoShow; _func_excIntHook = (FUNCPTR) excIntInfoShow; _func_excPanicHook = (FUNCPTR) excPanicShow; return (OK); }/********************************************************************************* excInfoShow - print exception info** NOMANUAL*/LOCAL void excInfoShow ( EXC_INFO * pExcInfo, /* exception information to summarize */ BOOL doBell /* print task id and ring warning bell */ ) { FAST int valid = pExcInfo->valid; FAST int vecNum = pExcInfo->vecNum; /* print each piece of info if valid */ if (valid & EXC_VEC_NUM) { if ((excBErrVecNum != NONE) && (vecNum == excBErrVecNum)) printExc ("\nBus Error\n", 0,0,0,0,0); else if ((vecNum < NELEMENTS (excMsgs)) && (excMsgs [vecNum] != NULL)) printExc ("\n%s\n", (int) excMsgs [vecNum], 0, 0, 0, 0); else printExc ("\nTrap to uninitialized vector number %d (0-255).\n", vecNum, 0, 0, 0, 0); }#if (CPU==SH7750 || CPU==SH7700) if (valid & EXC_TRAP) printExc ("TRA Register : 0x%08x (TRAPA #%d)\n", (int)pExcInfo->info, (int)(pExcInfo->info >> 2), 0,0,0); else if (valid & EXC_VEC_NUM) printExc ("EXPEVT Register: 0x%08x\n", INUM_TO_IEVT(vecNum),0,0,0,0);#endif if (valid & EXC_PC) printExc ("Program Counter: 0x%08x\n", (int)pExcInfo->pc,0,0,0,0); if (valid & EXC_STATUS_REG) printExc ("Status Register: 0x%08x\n", (int)pExcInfo->sr,0,0,0,0);#if (CPU==SH7750 || CPU==SH7700) if (valid & EXC_ACCESS_ADDR) printExc ("Access Address: 0x%08x\n", (int)pExcInfo->info,0,0,0,0); if (valid & EXC_FPSCR) { printExc ("FPSCR Register: 0x%08x ", (int)pExcInfo->info,0,0,0,0); if ((UINT32)pExcInfo->info & FPSCR_CAUSE_INVALID_OP) printExc ("(Invalid Operation)", 0,0,0,0,0); else if ((UINT32)pExcInfo->info & FPSCR_CAUSE_ZERO_DIVIDE) printExc ("(Zero Divide)", 0,0,0,0,0); printExc ("\n", 0,0,0,0,0); }#endif if (doBell) printExc ("Task: %#x \"%s\"\007\n", (int)taskIdCurrent, (int)taskName ((int)taskIdCurrent), 0, 0, 0);#if (CPU==SH7750 || CPU==SH7700) if ((valid & EXC_FPSCR) && (pTaskLastFpTcb != NULL)) excFpregsShow (pTaskLastFpTcb->pFpContext);#endif }/********************************************************************************* excIntInfoShow - print out uninitialized interrupt info*/LOCAL void excIntInfoShow (
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