{    FAST UCHAR *pCode;		/* pointer to newly synthesized code */    FAST int ix;    pCode = (UCHAR *)memalign (_CACHE_ALIGN_SIZE, sizeof (intConnectCode));    if (pCode != NULL)	{	/* copy intConnectCode into new code area */	bcopy ((char *)intConnectCode, (char *)pCode, sizeof (intConnectCode));	/* set the addresses & instructions */	*(int *)&pCode[ICC_INT_ENT] = (int)intEnt - 				      (int)&pCode[ICC_INT_ENT + 4];	if (routineBoi == NULL)			/* BOI routine */	    {	    for (ix = 0; ix < 10; ix++)		pCode[ICC_BOI_PUSH + ix] = 0x90;	/* replace by NOP */	    pCode[ICC_ADD_N] = 8;			/* pop two params */	    }	else	    {	    *(int *)&pCode[ICC_BOI_PARAM] = (int)parameterBoi;	    *(int *)&pCode[ICC_BOI_ROUTN] = (int)routineBoi - 					    (int)&pCode[ICC_BOI_ROUTN + 4];	    }	*(int *)&pCode[ICC_INT_PARAM] = (int)parameter;	*(int *)&pCode[ICC_INT_ROUTN] = (int)routine - 					(int)&pCode[ICC_INT_ROUTN + 4];	if (routineEoi == NULL)			/* EOI routine */	    {	    for (ix = 0; ix < 5; ix++)		pCode[ICC_EOI_CALL + ix] = 0x90;	/* replace by NOP */	    }	else	    {	    *(int *)&pCode[ICC_EOI_PARAM] = (int)parameterEoi;	    *(int *)&pCode[ICC_EOI_ROUTN] = (int)routineEoi - 					    (int)&pCode[ICC_EOI_ROUTN + 4];	    }	*(int *)&pCode[ICC_INT_EXIT] = (int)intExit - 				       (int)&pCode[ICC_INT_EXIT + 4];	}    CACHE_TEXT_UPDATE ((void *) pCode, sizeof (intConnectCode));    return ((FUNCPTR)(int)pCode);    }/********************************************************************************* intLockLevelSet - set the current interrupt lock-out level** This routine sets the current interrupt lock-out level and stores it* in the globally accessible variable `intLockMask'.  The specified* interrupt level is masked when interrupts are locked by* intLock().  The default lock-out level (1 for I80x86 processors)* is initially set by kernelInit() when VxWorks is initialized.* * RETURNS: N/A*/void intLockLevelSet    (    int newLevel		/* new interrupt level */    )    {    intLockMask    = newLevel;    }/********************************************************************************* intLockLevelGet - get the current interrupt lock-out level* * This routine returns the current interrupt lock-out level, which is* set by intLockLevelSet() and stored in the globally accessible* variable `intLockMask'.  This is the interrupt level currently* masked when interrupts are locked out by intLock().  The default* lock-out level is 1 for I80x86 processors, and is initially set by* kernelInit() when VxWorks is initialized.** RETURNS:* The interrupt level currently stored in the interrupt lock-out mask.*/int intLockLevelGet (void)    {    return ((int)(intLockMask));    }/********************************************************************************* intVecBaseSet - set the vector base address** This routine sets the vector base address.  The CPU's vector base register* is set to the specified value, and subsequent calls to intVecGet() or* intVecSet() will use this base address.  The vector base address is* initially 0, until modified by calls to this routine.** RETURNS: N/A** SEE ALSO: intVecBaseGet(), intVecGet(), intVecSet()*/void intVecBaseSet    (    FUNCPTR *baseAddr	    /* new vector base address */    )    {    char idt[6];		/* interrupt descriptor table register */    char *p = idt;    intVecBase = baseAddr;	/* keep the base address in a static variable */    *(short *)p = 0x07ff;		/* IDT limit */    *(int *)(p + 2) = (int)baseAddr;	/* IDT base address */    intVBRSet ((FUNCPTR *)idt);		/* set the actual IDT register */    CACHE_TEXT_UPDATE ((void *)baseAddr, 256 * 8);    }/********************************************************************************* intVecBaseGet - get the vector base address** This routine returns the current vector base address, which is set* with intVecBaseSet().** RETURNS: The current vector base address.** SEE ALSO: intVecBaseSet()*/FUNCPTR *intVecBaseGet (void)    {    return (intVecBase);    }/******************************************************************************** intVecSet - set a CPU vector** This routine attaches an exception/interrupt handler to a specified vector.* The vector is specified as an offset into the CPU's vector table.  This* vector table starts, by default, at address 0.  * However, the vector table may be set to start at any address with* intVecBaseSet().  The vector table is set up in usrInit().** RETURNS: N/A** SEE ALSO: intVecBaseSet(), intVecGet(), intVecGet2(), intVecSet2()*/void intVecSet    (    FUNCPTR *vector,		/* vector offset              */    FUNCPTR function		/* address to place in vector */    )    {    FUNCPTR *	newVector;    UINT	state;    BOOL	writeProtected = FALSE;    int		pageSize = 0;    char *	pageAddr = 0;    if (intVecSetEnt != NULL)				/* entry hook */	(* intVecSetEnt) (vector, function);    /* vector is offset by the vector base address */    newVector = (FUNCPTR *) ((int) vector + (int) intVecBaseGet ());    /* see if we need to write enable the memory */    if (vmLibInfo.vmLibInstalled)	{	pageSize = VM_PAGE_SIZE_GET();	pageAddr = (char *) ((UINT) newVector / pageSize * pageSize);	if (VM_STATE_GET (NULL, (void *) pageAddr, &state) != ERROR)	    if ((state & VM_STATE_MASK_WRITABLE) == VM_STATE_WRITABLE_NOT)		{		writeProtected = TRUE;		VM_STATE_SET (NULL, pageAddr, pageSize, VM_STATE_MASK_WRITABLE,			      VM_STATE_WRITABLE);		}	}    *(int *)newVector = (sysCsInt << 16) | ((int)function & 0xffff);    *((short *)newVector + 3) = (short)(((int)function & 0xffff0000) >> 16);    if (writeProtected)	{	VM_STATE_SET (NULL, pageAddr, pageSize, 		      VM_STATE_MASK_WRITABLE, VM_STATE_WRITABLE_NOT);	}    if (intVecSetExit != NULL)				/* exit hook */	(* intVecSetExit) (vector, function);    CACHE_TEXT_UPDATE ((void *)newVector, 8);    }/******************************************************************************** intVecSet2 - set a CPU vector, gate type(int/trap), and selector (x86)** This routine attaches an exception handler to a specified vector,* with the type of the gate and the selector of the gate.  * The vector is specified as an offset into the CPU's vector table.  This* vector table starts, by default, at address 0.  * However, the vector table may be set to start at any address with* intVecBaseSet().  The vector table is set up in usrInit().** RETURNS: N/A** SEE ALSO: intVecBaseSet(), intVecGet(), intVecSet(), intVecGet2()*/void intVecSet2    (    FUNCPTR * vector,		/* vector offset              */    FUNCPTR function,		/* address to place in vector */    int idtGate,		/* IDT_TRAP_GATE or IDT_INT_GATE */    int idtSelector		/* sysCsExc or sysCsInt */    )    {    FUNCPTR *	newVector;    UINT	state;    BOOL	writeProtected = FALSE;    int		pageSize = 0;    char *	pageAddr = 0;    if (intVecSetEnt != NULL)				/* entry hook */	(* intVecSetEnt) (vector, function);    /* vector is offset by the vector base address */    newVector = (FUNCPTR *) ((int) vector + (int) intVecBaseGet ());    /* see if we need to write enable the memory */    if (vmLibInfo.vmLibInstalled)	{	pageSize = VM_PAGE_SIZE_GET();	pageAddr = (char *) ((UINT) newVector / pageSize * pageSize);	if (VM_STATE_GET (NULL, (void *) pageAddr, &state) != ERROR)	    if ((state & VM_STATE_MASK_WRITABLE) == VM_STATE_WRITABLE_NOT)		{		writeProtected = TRUE;		VM_STATE_SET (NULL, pageAddr, pageSize, VM_STATE_MASK_WRITABLE,			      VM_STATE_WRITABLE);		}	}    *(int *)newVector = (idtSelector << 16) | ((int)function & 0x0000ffff);    *((int *)newVector + 1) = ((int)function & 0xffff0000) | idtGate;    if (writeProtected)	{	VM_STATE_SET (NULL, pageAddr, pageSize, 		      VM_STATE_MASK_WRITABLE, VM_STATE_WRITABLE_NOT);	}    if (intVecSetExit != NULL)				/* exit hook */	(* intVecSetExit) (vector, function);    CACHE_TEXT_UPDATE ((void *)newVector, 8);    }/********************************************************************************* intVecGet - get an interrupt vector** This routine returns a pointer to the exception/interrupt handler attached* to a specified vector.  The vector is specified as an offset into the CPU's* vector table.  This vector table starts, by default, at address 0.* However, the vector table may be set to start at any address with* intVecBaseSet().** RETURNS:* A pointer to the exception/interrupt handler attached to the specified vector.** SEE ALSO: intVecSet(), intVecBaseSet(), intVecGet2(), intVecSet2()*/FUNCPTR intVecGet    (    FUNCPTR *vector	/* vector offset */    )    {    FUNCPTR *newVector;    /* vector is offset by vector base address */    newVector = (FUNCPTR *) ((int) vector + (int) intVecBaseGet ());    return ((FUNCPTR)(((int)*(newVector + 1) & 0xffff0000) | 			 ((int)*newVector & 0x0000ffff)));    }/******************************************************************************** intVecGet2 - get a CPU vector, gate type(int/trap), and gate selector (x86)** This routine gets a pointer to the exception/interrupt handler attached* to a specified vector, the type of the gate, the selector of the gate.  * The vector is specified as an offset into the CPU's vector table.  * This vector table starts, by default, at address 0.* However, the vector table may be set to start at any address with* intVecBaseSet().** RETURNS: N/A** SEE ALSO: intVecBaseSet(), intVecGet(), intVecSet(), intVecSet2()*/void intVecGet2    (    FUNCPTR * vector,		/* vector offset              */    FUNCPTR * pFunction,	/* address to place in vector */    int *     pIdtGate,		/* IDT_TRAP_GATE or IDT_INT_GATE */    int *     pIdtSelector	/* sysCsExc or sysCsInt */    )    {    FUNCPTR *newVector;    /* vector is offset by vector base address */    newVector = (FUNCPTR *) ((int) vector + (int) intVecBaseGet ());    /* get a pointer to the handler */    *pFunction = ((FUNCPTR)(((int)*(newVector + 1) & 0xffff0000) | 			    ((int)*newVector & 0x0000ffff)));    /* get a gate selector */    *pIdtSelector = ((int)*newVector >> 16) & 0x0000ffff;    /* get a gate type (int/trap) */    *pIdtGate = (int)*(newVector + 1) & 0x0000ffff;    }/********************************************************************************* intVecTableWriteProtect - write protect exception vector table** If the unbundled Memory Management Unit (MMU) support package (VxVMI) is* present, this routine write-protects the exception vector table to* protect it from being accidentally corrupted.* * Note that other data structures contained in the page will also be* write-protected.  In the default VxWorks configuration, the exception vector* table is located at location 0 in memory.  Write-protecting this affects* the backplane anchor, boot configuration information, and potentially the* text segment (assuming the default text location of 0x1000.)  All code* that manipulates these structures has been modified to write-enable the* memory for the duration of the operation.  If you select a different* address for the exception vector table, be sure it resides in a page* separate from other writable data structures.* * RETURNS: OK, or ERROR if unable to write protect memory.** ERRNO: S_intLib_VEC_TABLE_WP_UNAVAILABLE*/STATUS intVecTableWriteProtect    (    void    )    {    int pageSize;    UINT vectorPage;    if (!vmLibInfo.vmLibInstalled)	{	errno = S_intLib_VEC_TABLE_WP_UNAVAILABLE;	return (ERROR);	}    pageSize = VM_PAGE_SIZE_GET();    vectorPage = (UINT) intVecBaseGet () / pageSize * pageSize;    return (VM_STATE_SET (0, (void *) vectorPage, pageSize, 			  VM_STATE_MASK_WRITABLE, VM_STATE_WRITABLE_NOT));    }/******************************************************************************** intRegsLock - modify a REG_SET to have interrupts locked.*/int intRegsLock    (    REG_SET *pRegs                      /* register set to modify */    )    {    int oldFlags = pRegs->eflags;    pRegs->eflags &= ~INT_FLAG;    return (oldFlags);    }/******************************************************************************** intRegsUnlock - restore an REG_SET's interrupt lockout level.*/void intRegsUnlock    (    REG_SET *   pRegs,                  /* register set to modify */    int         oldFlags                /* int lock level to restore */    )    {    pRegs->eflags &= ~INT_FLAG;    pRegs->eflags |= (oldFlags & INT_FLAG);    }