?? uss_fpopns.s
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/* Copyright 1991-1992 Wind River Systems, Inc. */ .data .globl _copyright_wind_river .long _copyright_wind_river/*modification history--------------------01g,14mar95,tmk inverted conditional assembly logic for 68000/10 to allow for CPUs other than 68020.01f,23aug92,jcf changed bxxx to jxx.01e,26may92,rrr the tree shuffle01d,30mar92,kdl added include of "uss_fp.h"; commented-out ".set" directives (SPR #1398).01c,04oct91,rrr passed through the ansification filter -changed ASMLANGUAGE to _ASMLANGUAGE -changed copyright notice01b,29jan91,kdl added include of vxWorks.h for conditional assembly.01a,28jan91,kdl modified original US Software version to use conditional assembly for 68000/10 multiply and divide operations.*//*DESCRIPTION| ttl FPAC 68K/FPOPNS: IEEE Single Precision Operations|FPOPNS idnt 1,0 ; IEEE Single Precision Operations| ; FPOPNS.A68|| * * * * * * * * * *|| Copyright (c) 1985,1989 by| United States Software Corporation| 14215 N.W. Science Park Drive| Portland, Oregon 97229|| This software is furnished under a license and may be used| and copied only in accordance with the terms of such license| and with the inclusion of the above copyright notice.| This software or any other copies thereof may not be provided| or otherwise made available to any other person. No title to| and ownership of the software is hereby transferred.|| The information in this software is subject to change without| notice and should not be construed as a commitment by United| States Software Corporation.|| Released: 12 January 1989 V2.0|| * * * * * * * * * *|NOMANUAL*/#define _ASMLANGUAGE#include "vxWorks.h"#include "uss_fp.h"| .set comp64,0 |the 64 bit multiply/divide flag| opt BRS ; Default to forward branches SHORT| .globl FLOAT .globl FIX .globl INT .globl AINT .globl FPADD .globl FPMUL .globl FPDIV .globl FPRDIV .globl FPCMP| .globl GETFP1,FOPRSL| .globl FNANRS,FINFRS,FUNFRS,FZERRS||| xref FPERR,NANFLG,INFFLG,UNFFLG||| .set FBIAS,127 | Single precision format exponent bias||| .set CCRC,0x01 | Carry bit in CCR| .set CCRV,0x02 | Overflow bit in CCR| .set CCRZ,0x04 | Zero bit in CCR| .set CCRN,0x08 | Negative bit in CCR| .set CCRX,0x10 | Extend bit in CCR||| .set ERNAN,3| .set EROVF,2| .set ERUNF,1|| .text | General code section/*|| page|| FLOAT| =====| Float the integer value in D0 into a single precision floating| point value on the stack.|*/FLOAT: moveal sp@+,a0 | Return addr into a0 subal a2,a2 | Set a2 = 0 andl d0,d0 jne FLT01 | J/ value <> 0| movel d0,sp@- | Place 0 value on stack jmp a0@ | Return|FLT01: jge FLT02 | J/ value > 0 subql #1,a2 | Set a2 = -1 negl d0|FLT02: movel #FBIAS+15,d2 | Default bias value swap d0 andw d0,d0 jeq FLT03 | J/ 16 bit shift required| swap d0 | Undo the shift addw #16,d2 | Reflect the larger number|FLT03: andl d0,d0 jmi FLT06 | J/ value normalized|FLT04: subqw #1,d2 | Dec exponent, shift mantissa asll #1,d0 jpl FLT04 | J/ more shifts to do|FLT06: exg d0,d2 | Position to standard d0/d2/a2 form jra FOPRSL | J/ single precision result (w/ round)/*|| page|| FIX| ===| Routine to convert the single precision argument on the stack| to an integer value (with a dropoff flag).|*/FIX: bsr GETFP1 | Extract/unpack one single prec val bsr FIX00 | Use internal routine jmp a0@ | Return to caller||FIX00: andw d0,d0 jne FIX01 | J/ value <> 0.0| subl d0,d0 | Return a zero value, no drop off rts|FIX01: cmpiw #FBIAS,d0 jcc FIX02 | J/ abs() >= 1.0 [BCC == BHS]| subl d0,d0 | Return a zero value orib #CCRC+CCRX,ccr | Set carry/extend bits| ### ORI #$11,CCR rts|FIX02: subiw #FBIAS+31,d0 jcs FIX03 | J/ abs() < 2^31| moveq #-1,d0 | Set d0 to the maximum integer value lsrl #1,d0 | d0 = 0x7FFFFFFF subl a2,d0 | Account for the sign of the arg. rts|FIX03: negw d0 | Positive shift count rorl d0,d2 | Multibit shift moveq #-1,d1 | Mask for bit dropout check lsrl d0,d1 notl d1 andl d2,d1 | Bit(s) dropped left in d1 eorl d1,d2 | Integer value in d2 movel a2,d0 eorl d2,d0 | Negate as required, move to d0 subl a2,d0 moveq #-1,d2 addl d2,d1 | Set carry/extend if bits lost rts/*|| page|| INT| ===| Return the largest integer smaller than the argument provided|*/INT: bsr GETFP1 bsr FIX00| jcc INT00 | J/ no bits lost cmpaw #0,a2 jeq INT00 | J/ not negative subql #1,d0 | Decrement integer valueINT00: jmp a0@/*|| page|| AINT| ====| Floating point corollary to the INT function|*/AINT: bsr GETFP1 cmpiw #FBIAS+23,d0 | Check for value too large jcc FOPRSL | J/ return with same value| movew d0,d3 subiw #FBIAS-1,d3 jgt AINT02 | J/ abs() >= 1.0| movew a2,d2 jne AINT01 | J/ 0.0 > value > -1.0| movel #0,sp@- | Return a zero value jmp a0@|AINT01: movel #0xBF800000,sp@- | Return -1.0 jmp a0@|AINT02: moveq #-1,d1 | Fill d1 with ones lsrl d3,d1 | Shift mask over moveq #1,d3 addl d1,d3 | Create increment bit andl d2,d1 | Extract bits to drop jeq FOPRSL | J/ no drop off, return as provided| eorl d1,d2 | Remove bits that must be dropped cmpaw #0,a2 jeq FOPRSL | Bits dropped from a positive number| addl d3,d2 | Bump the magnitude (negative number) jcc AINT03 | J/ no overflow| roxll #1,d2 addqw #1,d0|AINT03: jra FOPRSL | Return computed value/*|| page|| FPADD| =====| Single precision add routine|*/FPADD: bsr GETFP2 | Fetch both operands cmpiw #0xFF,d0| jne FPA010 | J/ operand not NaN/INF| lsll #1,d2 | Remove implicit bit jne FNANRS | J/ ? + NaN -> NaN| cmpiw #0xFF,d1 jne FINFRS | J/ 0,num + INF -> INF| lsll #1,d3 | Remove implicit bit jne FNANRS | J/ INF + NaN -> NaN| cmpal a2,a3 jne FNANRS | J/ INF - INF -> NaN jra FINFRS | INF + INF -> INF||FPA010: cmpiw #0xFF,d1 jne FPA040 | J/ not NaN or INF| lsll #1,d3 | Remove implicit bit jne FNANRS | J/ NaN + 0,num -> NaN| moveal a3,a2 | Move sign over jra FINFRS | INF result||FPXSUB: |dsw 0 | Entry for FPCMP|FPA040: andw d1,d1 jeq FPA041 | J/ 0,num + 0 -> 0,num| andw d0,d0 jne FPA045 | J/ no zeroes involved| movew d1,d0 | Copy over data movel d3,d2 moveal a3,a2FPA041: jra FOPR02 | Return w/o range check||FPA045: |dsw 0| cmpw d1,d0 jcc FPA060 | J/ op1.exp >= op2.exp| exg d2,d3 | Flip mantissas exg d0,d1 exg a2,a3|FPA060: subw d0,d1 negw d1 cmpiw #24,d1 jhi FOPRSL | J/ op2 too small to matter| lsrl d1,d3 cmpal a2,a3 jne FPS100 | J/ subtract operation| addl d3,d2 jcc FOPRSL | J/ no carry out| roxrl #1,d2 | Handle carry out addqw #1,d0 | Bump the exponent jra FOPRSL||FPS100: subl d3,d2 | Do the subtract jeq FZERRS | J/ zero result jcc FPS110| negl d2| moveal a3,a2 | Flip sign|FPS110: andl d2,d2 | Normalization section jmi FOPRSL | J/ normalized| subqw #1,d0 | Decrease exponent valueFPS120: addl d2,d2 | Left shift d2 dbmi d0,FPS120 | J/ not normalized| jra FOPRSL/*|| page|| FPMUL| =====| Single precision multiply routine.|*/FPMUL: bsr GETFP2 | Fetch both operands movew a2,d4 movew a3,d5 eorw d4,d5 moveaw d5,a2 | /* Result's sign */| andw d0,d0 jne FPM010 | J/ operand <> 0.0| cmpiw #0xFF,d1 jeq FNANRS | J/ 0.0 * NaN,INF -> NaN jra FZERRS | J/ 0.0 * 0.0,num -> 0.0|FPM010: cmpiw #0xFF,d0 jne FPM020 | J/ operand is a number| lsll #1,d2 jne FNANRS | J/ NaN * ? -> NaN| andw d1,d1 jeq FNANRS | J/ INF * 0.0 -> NaN| cmpiw #0xFF,d1 jne FINFRS | J/ INF * num -> INF lsll #1,d3 jeq FINFRS | J/ INF * INF -> INF jra FNANRS | J/ INF * NaN -> NaN|FPM020: andw d1,d1 jeq FZERRS | J/ num * 0.0 -> 0.0| cmpiw #0xFF,d1 jne FPM040 | J/ num * num| lsll #1,d3 jeq FINFRS | J/ num * INF -> INF jra FNANRS | J/ num * NaN -> NaN
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