?? mmu440lib.c
字號:
/* get the level 1 descriptor */ lvl1Desc.l1desc = pLvl1Desc->l1desc; if (!lvl1Desc.field.v) { if (mmu440Lvl1DescInit(pTransTbl, pLvl1Desc, effectiveAddr) == ERROR) return (ERROR); } /* * Get the level 2 descriptor address. If the level 2 descriptor doesn't * exist then return ERROR. */ if (mmu440Lvl2DescAddrGet (pTransTbl, effectiveAddr, &pLvl2Desc) == ERROR) return (ERROR); /* get the level 2 descriptor */ lvl2Desc = *pLvl2Desc; /* save the real address & effective addr in the level 2 descriptors */ lvl2Desc.field.rpn = (UINT32) physicalAddr >> MMU_RPN_SHIFT; lvl2Desc.field.epn = (UINT32) effectiveAddr >> MMU_RPN_SHIFT; /* set the valid bit in the level 2 descriptor */ lvl2Desc.field.v = 1; /* update the Level 2 descriptor in table */ mmu440Lvl2DescUpdate (pLvl2Desc, lvl2Desc); /* invalidate the tlb entry for this effective addr */ mmu440Tlbie (pTransTbl, effectiveAddr); return (OK); }/******************************************************************************** mmu440GlobalPageMap - map physical memory page to global virtual memory page** mmuPpcGlobalPageMap is used to map physical pages into global virtual memory* that is shared by all virtual memory contexts. The translation tables* for this section of the virtual space are shared by all virtual memory* contexts.** RETURNS: OK, or ERROR if no pte for given virtual page.*/LOCAL STATUS mmu440GlobalPageMap ( void * effectiveAddr, /* effective address */ void * physicalAddr /* physical address */ ) { return (mmu440PageMap (mmuGlobalTransTbl, effectiveAddr, physicalAddr)); }/******************************************************************************** mmu440Translate - translate a virtual address to a physical address** Traverse the translation table and extract the physical address for the* given virtual address from the level 2 descriptor corresponding to the* virtual address.** RETURNS: OK, or ERROR if no level 2 descriptor found for given virtual address.*/LOCAL STATUS mmu440Translate ( MMU_TRANS_TBL * pTransTbl, /* translation table */ void * effectiveAddr, /* effective address */ void ** physicalAddr /* where to place the result */ ) { LEVEL_2_DESC * pLvl2Desc; /* Level 2 descriptor address */ EFFECTIVE_ADDR effAddr; /* effective address */ REAL_ADDRESS realAddr; /* real address */ /* * find the level 2 descriptor corresponding to the <effectiveAddr> * in the translation table pointed to by the <pTransTbl> structure. * If this level 2 descriptor cannot be found then return ERROR. */ if (mmu440Lvl2DescAddrGet (pTransTbl, effectiveAddr, &pLvl2Desc) != OK) { errno = S_mmuLib_NO_DESCRIPTOR; return (ERROR); } /* check if the level 2 descriptor found is valid. If not return ERROR */ if (!pLvl2Desc->field.v) { errno = S_mmuLib_NO_DESCRIPTOR; return (ERROR); } effAddr = * ((EFFECTIVE_ADDR *) &effectiveAddr); /* build the real address */ realAddr.field.rpn = pLvl2Desc->field.rpn; realAddr.field.po = effAddr.field.po; * physicalAddr = realAddr.realAddr; return (OK); }/******************************************************************************** mmu440CurrentSet - change active translation table** This function changes the virtual memory context by loading the PID* register with the PID value saved in the translation* table structure pointed to by <pTransTbl>.** RETURNS: N/A**/LOCAL void mmu440CurrentSet ( MMU_TRANS_TBL * pTransTbl /* new active tranlation table */ ) { FAST int lockKey; /* intLock lock key */ static BOOL firstTime = TRUE; /* first time call flag */ if (firstTime) { /* * write protect all the pages containing the descriptors allocated for * the global translation table. Need to do this because when this * memory is allocated, the global translation table doesn't exist yet. */ mmu440MemPagesWriteDisable (mmuGlobalTransTbl); mmu440MemPagesWriteDisable (pTransTbl); firstTime = FALSE; } lockKey = intLock (); /* * save the PID value in the PID register via * mmuPpcPidSet(). If one or both MMUs are turned on then disable * the MMU, set the PID register and re-enable the MMU. */ if (mmu440IsOn (MMU_INST) || mmu440IsOn (MMU_DATA)) { mmu440Enable (FALSE); /* disable the MMU */ mmuPpcPidSet (pTransTbl->pid); mmu440Enable (TRUE); /* re-enable the MMU */ } else mmuPpcPidSet (pTransTbl->pid); intUnlock (lockKey); }/********************************************************************************* mmu440Lvl2DescAddrGet - get the address of a level 2 Desciptor** This routine finds the address of a level 2 descriptor corresponding to the* <effectiveAddr> in the translation table pointed to by <pTransTbl> structure.* If a matching level 2 Descriptor exists, the routine save the level 2* descriptor address at the address pointed to by <ppLvl2Desc>.* If any level 2 Descriptor matching the <effectiveAddr> is not found then* the function return ERROR.** RETURNS: OK or ERROR.*/LOCAL STATUS mmu440Lvl2DescAddrGet ( MMU_TRANS_TBL * pTransTbl, /* translation table */ void * effectiveAddr, /* effective address */ LEVEL_2_DESC ** ppLvl2Desc /* where to save the lvl 2 desc addr */ ) { LEVEL_1_DESC * pLvl1Desc; /* level 1 descriptor address */ LEVEL_2_DESC * pLvl2Desc; /* level 2 descriptor address */ EFFECTIVE_ADDR effAddr; /* effective address */ /* get address of the level 1 descriptor */ pLvl1Desc = mmu440Lvl1DescAddrGet (pTransTbl, effectiveAddr); /* * check the valid bit. If the level 1 descriptor is not valid than * the level 2 descriptor doesn't exist. In this case return ERROR. */ if (!pLvl1Desc->field.v) return (ERROR); effAddr.effAddr = effectiveAddr; /* * save the level 2 descriptor address at the address * pointed to by <ppLvl2Desc>. */ pLvl2Desc = (LEVEL_2_DESC *) (pLvl1Desc->field.l2ba << 2); * ppLvl2Desc = pLvl2Desc + effAddr.field.l2index; return (OK); }/********************************************************************************* mmu440Lvl1DescAddrGet - get the address of a level 1 descriptor** This function returns the address of the level 1 descriptor corresponding* to the effective address pointed to by <effectiveAddr>.** RETRUNS: always the address of the level 1 descriptor**/LOCAL LEVEL_1_DESC * mmu440Lvl1DescAddrGet ( MMU_TRANS_TBL * pTransTbl, /* translation table */ void * effectiveAddr /* effective address */ ) { EFFECTIVE_ADDR effAddr; effAddr = * ((EFFECTIVE_ADDR *) &effectiveAddr); /* * build the Level 1 descriptor address corresponding to the effective * address pointed to by <effectiveAddr>. */ return ( pTransTbl->l1TblPtr.pL1Desc + effAddr.field.l1index ); }/********************************************************************************* mmu440Lvl1DescUpdate - update a level 1 descriptor** This function updates a level 1 descriptor. The address of the level 1* descriptor is handled by <pLvl1Desc> and the new value of the level 1* descriptor by <lvl1Desc>.** RETURNS: N/A*/LOCAL void mmu440Lvl1DescUpdate ( LEVEL_1_DESC * pLvl1Desc, /* Level 1 descriptor address */ LEVEL_1_DESC lvl1Desc /* Level 1 descriptor */ ) { UINT32 key; if (mmu440IsOn (MMU_INST) || mmu440IsOn (MMU_DATA)) { /* circumvent page protection by turning MMU off to write entry */ key = intLock(); /* lock interrupt */ mmu440Enable (FALSE); /* disable the mmu */ pLvl1Desc->l1desc = lvl1Desc.l1desc; /* update the descriptor */ mmu440Enable (TRUE); /* enable the MMU */ intUnlock(key); /* re-enable interrupt */ } else pLvl1Desc->l1desc = lvl1Desc.l1desc; /* update the descriptor */ }/************************************************************************* mmu440Lvl1DescInit -- initialize a level 1 descriptor** Create the level 2 descriptor table, fill it in with appropriate* defaults, and set up the level 1 descriptor to point at it.*/LOCAL STATUS mmu440Lvl1DescInit ( MMU_TRANS_TBL * pTransTbl, /* translation table */ LEVEL_1_DESC * pLvl1Desc, /* level 1 descriptor address */ void * effectiveAddr /* effective address */ ) { LEVEL_2_DESC * pLvl2Desc; /* Level 2 descriptor address */ LEVEL_2_DESC lvl2Desc; /* Level 2 descriptor copy */ LEVEL_1_DESC lvl1Desc; /* level 1 descriptor copy */ int ix; /* general index counter */ /* * Allocate memory to save the level 2 descriptor table. * The level 2 table needs to be aligned on a page boundary * and has a size of 1024 entries * 16 bytes/entry = 16K. */ pLvl2Desc = (LEVEL_2_DESC *) memalign (MMU_PAGE_SIZE, MMU_LVL_2_DESC_NB * sizeof(LEVEL_2_DESC)); /* * check if the level 2 descriptor table was created properly. * If not then return ERROR. */ if (pLvl2Desc == NULL) return (ERROR); /* * Initialize the very first level 2 descriptor in the table. * Note it is set up invalid. */ lvl2Desc.field.epn = 0; /* effective page number */ lvl2Desc.field.rsvd1 = 0; lvl2Desc.field.v = 0; /* initially invalid */ lvl2Desc.field.ts = 1; /* translation space 1 */ lvl2Desc.field.size = 1; /* default 4KB page */ lvl2Desc.field.rsvd2 = 0; lvl2Desc.field.rpn = 0; /* real page number */ lvl2Desc.field.rsvd3 = 0; lvl2Desc.field.erpn = 0; /* extended real page number */ lvl2Desc.field.rsvd4 = 0; lvl2Desc.field.u0 = 0; /* user attribute 0 unused */ lvl2Desc.field.u1 = 0; /* user attribute 1 unused */ lvl2Desc.field.u2 = 0; /* user attribute 2 unused */ lvl2Desc.field.u3 = 0; /* user attribute 3 unused */ lvl2Desc.field.w = 0; /* no write thru */ lvl2Desc.field.i = 0; /* no cache inhibit */ lvl2Desc.field.m = 0; /* memory coherent: no effect */ lvl2Desc.field.g = 0; /* memory unguarded */ lvl2Desc.field.e = 0; /* big endian */ lvl2Desc.field.rsvd5 = 0; lvl2Desc.field.ux = 0; /* user execute off */ lvl2Desc.field.uw = 0; /* user write off */ lvl2Desc.field.ur = 0; /* user read off */ lvl2Desc.field.sx = 1; /* supervisor execute on */ lvl2Desc.field.sw = 0; /* supervisor write off */ lvl2Desc.field.sr = 1; /* supervisor read on */ lvl2Desc.field.rsvd6 = 0; /* * duplicate the first L2 descriptor through the rest of the table */ for (ix = 0; ix < MMU_LVL_2_DESC_NB; ix ++) pLvl2Desc[ix] = lvl2Desc; /* * set up the Level 1 Descriptor with the new level 2 table pointer */ lvl1Desc.l1desc = ((UINT32) pLvl2Desc) & MMU_LVL_1_L2BA_MSK; lvl1Desc.field.v = 1; /* segment valid */ /* update the Level 1 descriptor in table */ mmu440Lvl1DescUpdate (pLvl1Desc, lvl1Desc); return (OK); }/********************************************************************************* mmu440Lvl2DescUpdate - update a level 2 descriptor** This function updates a level 2 descriptor. The addess of the level 2* descriptor is handled by <pLvl2Desc> and the new value of the level 2* descriptor by <lvl2Desc>.** RETURNS: N/A*/LOCAL void mmu440Lvl2DescUpdate ( LEVEL_2_DESC * pLvl2Desc, /* Level 2 descriptor address */ LEVEL_2_DESC lvl2Desc /* Level 2 descriptor */ ) { UINT32 key; if (mmu440IsOn (MMU_INST) || mmu440IsOn (MMU_DATA)) { /* circumvent page protection by turning MMU off to write entry */ key = intLock(); /* lock interrupt */ mmu440Enable (FALSE); /* disable the mmu */ *pLvl2Desc = lvl2Desc; /* update the descriptor */ mmu440Enable (TRUE); /* enable the MMU */ intUnlock(key); /* re-enable interrupt */ } else *pLvl2Desc = lvl2Desc; /* update the descriptor */ }/********************************************************************************* mmu440IsOn - return the state of the MMU** This function returns TRUE if the MMU selected by <mmuType> is set to* translation space 1.** RETURNS: TRUE or FALSE**/LOCAL BOOL mmu440IsOn ( int mmuType /* MMU type to return the state of */ ) { switch (mmuType) { case MMU_INST: /* Instruction MMU to test */ return (vxMsrGet () & _PPC_MSR_IS); break; case MMU_DATA: /* Data MMU to test */ return (vxMsrGet () & _PPC_MSR_DS); break; default: /* default value */ return (FALSE); } }/********************************************************************************* mmu440PidAlloc - get a free PID for use with a new address map from* mmuAddrMapArray, and set the address map element
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