?? hw_usb.h
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#define USB_TXCSRL3_ERROR 0x00000004 // Error.
#define USB_TXCSRL3_UNDRN 0x00000004 // Underrun.
#define USB_TXCSRL3_FIFONE 0x00000002 // FIFO Not Empty.
#define USB_TXCSRL3_TXRDY 0x00000001 // Transmit Packet Ready.
//*****************************************************************************
//
// The following are defines for the bit fields in the USB_O_TXCSRH3 register.
//
//*****************************************************************************
#define USB_TXCSRH3_AUTOSET 0x00000080 // Auto Set.
#define USB_TXCSRH3_ISO 0x00000040 // ISO.
#define USB_TXCSRH3_MODE 0x00000020 // Mode.
#define USB_TXCSRH3_DMAEN 0x00000010 // DMA Request Enable.
#define USB_TXCSRH3_FDT 0x00000008 // Force Data Toggle.
#define USB_TXCSRH3_DMAMOD 0x00000004 // DMA Request Mode.
#define USB_TXCSRH3_DTWE 0x00000002 // Data Toggle Write Enable.
#define USB_TXCSRH3_DT 0x00000001 // Data Toggle.
//*****************************************************************************
//
// The following are defines for the bit fields in the USB_O_RXMAXP3 register.
//
//*****************************************************************************
#define USB_RXMAXP3_MULT_M 0x0000F800 // Multiplier.
#define USB_RXMAXP3_MAXLOAD_M 0x000007FF // Maximum Payload.
#define USB_RXMAXP3_MULT_S 11
#define USB_RXMAXP3_MAXLOAD_S 0
//*****************************************************************************
//
// The following are defines for the bit fields in the USB_O_RXCSRL3 register.
//
//*****************************************************************************
#define USB_RXCSRL3_CLRDT 0x00000080 // Clear Data Toggle.
#define USB_RXCSRL3_STALLED 0x00000040 // Endpoint Stalled.
#define USB_RXCSRL3_STALL 0x00000020 // Send Stall.
#define USB_RXCSRL3_REQPKT 0x00000020 // Request Packet.
#define USB_RXCSRL3_FLUSH 0x00000010 // Flush FIFO.
#define USB_RXCSRL3_DATAERR 0x00000008 // Data Error.
#define USB_RXCSRL3_NAKTO 0x00000008 // NAK Timeout.
#define USB_RXCSRL3_ERROR 0x00000004 // Error.
#define USB_RXCSRL3_OVER 0x00000004 // Overrun.
#define USB_RXCSRL3_FULL 0x00000002 // FIFO Full.
#define USB_RXCSRL3_RXRDY 0x00000001 // Receive Packet Ready.
//*****************************************************************************
//
// The following are defines for the bit fields in the USB_O_RXCSRH3 register.
//
//*****************************************************************************
#define USB_RXCSRH3_AUTOCL 0x00000080 // Auto Clear.
#define USB_RXCSRH3_AUTORQ 0x00000040 // Auto Request.
#define USB_RXCSRH3_ISO 0x00000040 // ISO.
#define USB_RXCSRH3_DMAEN 0x00000020 // DMA Request Enable.
#define USB_RXCSRH3_DISNYET 0x00000010 // Disable NYET
#define USB_RXCSRH3_PIDERR 0x00000010 // PID Error.
#define USB_RXCSRH3_DMAMOD 0x00000008 // DMA Request Mode.
#define USB_RXCSRH3_DTWE 0x00000004 // Data Toggle Write Enable.
#define USB_RXCSRH3_DT 0x00000002 // Data Toggle.
#define USB_RXCSRH3_INCRX 0x00000001 // Incomplete Receive.
//*****************************************************************************
//
// The following are defines for the bit fields in the USB_O_RXCOUNT3 register.
//
//*****************************************************************************
#define USB_RXCOUNT3_COUNT_M 0x00001FFF // Receive Packet Count.
#define USB_RXCOUNT3_COUNT_S 0
//*****************************************************************************
//
// The following are defines for the bit fields in the USB_O_TXTYPE3 register.
//
//*****************************************************************************
#define USB_TXTYPE3_SPEED_M 0x000000C0 // Operating Speed.
#define USB_TXTYPE3_SPEED_DFLT 0x00000000 // Default
#define USB_TXTYPE3_SPEED_FULL 0x00000080 // Full
#define USB_TXTYPE3_SPEED_LOW 0x000000C0 // Low
#define USB_TXTYPE3_PROTO_M 0x00000030 // Protocol.
#define USB_TXTYPE3_PROTO_CTRL 0x00000000 // Control
#define USB_TXTYPE3_PROTO_ISOC 0x00000010 // Isochronous
#define USB_TXTYPE3_PROTO_BULK 0x00000020 // Bulk
#define USB_TXTYPE3_PROTO_INT 0x00000030 // Interrupt
#define USB_TXTYPE3_TEP_M 0x0000000F // Target Endpoint Number.
#define USB_TXTYPE3_TEP_S 0
//*****************************************************************************
//
// The following are defines for the bit fields in the USB_O_TXINTERVAL3
// register.
//
//*****************************************************************************
#define USB_TXINTERVAL3_TXPOLL_M \
0x000000FF // TX Polling
#define USB_TXINTERVAL3_NAKLMT_M \
0x000000FF // NAK Limit.
#define USB_TXINTERVAL3_TXPOLL_S \
0
#define USB_TXINTERVAL3_NAKLMT_S \
0
//*****************************************************************************
//
// The following are defines for the bit fields in the USB_O_RXTYPE3 register.
//
//*****************************************************************************
#define USB_RXTYPE3_SPEED_M 0x000000C0 // Operating Speed.
#define USB_RXTYPE3_SPEED_DFLT 0x00000000 // Default
#define USB_RXTYPE3_SPEED_FULL 0x00000080 // Full
#define USB_RXTYPE3_SPEED_LOW 0x000000C0 // Low
#define USB_RXTYPE3_PROTO_M 0x00000030 // Protocol.
#define USB_RXTYPE3_PROTO_CTRL 0x00000000 // Control
#define USB_RXTYPE3_PROTO_ISOC 0x00000010 // Isochronous
#define USB_RXTYPE3_PROTO_BULK 0x00000020 // Bulk
#define USB_RXTYPE3_PROTO_INT 0x00000030 // Interrupt
#define USB_RXTYPE3_TEP_M 0x0000000F // Target Endpoint Number.
#define USB_RXTYPE3_TEP_S 0
//*****************************************************************************
//
// The following are defines for the bit fields in the USB_O_RXINTERVAL3
// register.
//
//*****************************************************************************
#define USB_RXINTERVAL3_TXPOLL_M \
0x000000FF // RX Polling
#define USB_RXINTERVAL3_NAKLMT_M \
0x000000FF // NAK Limit.
#define USB_RXINTERVAL3_TXPOLL_S \
0
#define USB_RXINTERVAL3_NAKLMT_S \
0
//*****************************************************************************
//
// The following are defines for the bit fields in the USB_O_RQPKTCOUNT1
// register.
//
//*****************************************************************************
#define USB_RQPKTCOUNT1_M 0x0000FFFF // Block Transfer Packet Count.
#define USB_RQPKTCOUNT1_S 0
//*****************************************************************************
//
// The following are defines for the bit fields in the USB_O_RQPKTCOUNT2
// register.
//
//*****************************************************************************
#define USB_RQPKTCOUNT2_M 0x0000FFFF // Block Transfer Packet Count.
#define USB_RQPKTCOUNT2_S 0
//*****************************************************************************
//
// The following are defines for the bit fields in the USB_O_RQPKTCOUNT3
// register.
//
//*****************************************************************************
#define USB_RQPKTCOUNT3_M 0x0000FFFF // Block Transfer Packet Count.
#define USB_RQPKTCOUNT3_S 0
//*****************************************************************************
//
// The following are defines for the bit fields in the USB_O_RXDPKTBUFDIS
// register.
//
//*****************************************************************************
#define USB_RXDPKTBUFDIS_EP3 0x00000008 // EP3 RX Double-Packet Buffer
// Disable.
#define USB_RXDPKTBUFDIS_EP2 0x00000004 // EP2 RX Double-Packet Buffer
// Disable.
#define USB_RXDPKTBUFDIS_EP1 0x00000002 // EP1 RX Double-Packet Buffer
// Disable.
//*****************************************************************************
//
// The following are defines for the bit fields in the USB_O_TXDPKTBUFDIS
// register.
//
//*****************************************************************************
#define USB_TXDPKTBUFDIS_EP3 0x00000008 // EP3 TX Double-Packet Buffer
// Disable.
#define USB_TXDPKTBUFDIS_EP2 0x00000004 // EP2 TX Double-Packet Buffer
// Disable.
#define USB_TXDPKTBUFDIS_EP1 0x00000002 // EP1 TX Double-Packet Buffer
// Disable.
//*****************************************************************************
//
// The following are defines for the bit fields in the USB_O_EPC register.
//
//*****************************************************************************
#define USB_EPC_PFLTACT_M 0x00000300 // Power Fault Action.
#define USB_EPC_PFLTACT_UNCHG 0x00000000 // Unchanged
#define USB_EPC_PFLTACT_TRIS 0x00000100 // Tristate
#define USB_EPC_PFLTACT_LOW 0x00000200 // Low
#define USB_EPC_PFLTACT_HIGH 0x00000300 // High
#define USB_EPC_PFLTAEN 0x00000040 // Power Fault Action Enable.
#define USB_EPC_PFLTSEN_HIGH 0x00000020 // Power Fault Sense.
#define USB_EPC_PFLTEN 0x00000010 // Power Fault Input Enable.
#define USB_EPC_EPENDE 0x00000004 // EPEN Drive Enable.
#define USB_EPC_EPEN_M 0x00000003 // External Power Supply Enable
// Configuration.
#define USB_EPC_EPEN_LOW 0x00000000 // Power Enable Active Low
#define USB_EPC_EPEN_HIGH 0x00000001 // Power Enable Active High
#define USB_EPC_EPEN_VBLOW 0x00000002 // Power Enable High if VBUS Low
#define USB_EPC_EPEN_VBHIGH 0x00000003 // Power Enable High if VBUS High
//*****************************************************************************
//
// The following are defines for the bit fields in the USB_O_EPCRIS register.
//
//*****************************************************************************
#define USB_EPCRIS_PF 0x00000001 // USB Power Fault Interrupt
// Status.
//*****************************************************************************
//
// The following are defines for the bit fields in the USB_O_EPCIM register.
//
//*****************************************************************************
#define USB_EPCIM_PF 0x00000001 // USB Power Fault Interrupt Mask.
//*****************************************************************************
//
// The following are defines for the bit fields in the USB_O_EPCISC register.
//
//*****************************************************************************
#define USB_EPCISC_PF 0x00000001 // USB Power Fault Interrupt Status
// and Clear.
//*****************************************************************************
//
// The following are defines for the bit fields in the USB_O_DRRIS register.
//
//*****************************************************************************
#define USB_DRRIS_RESUME 0x00000001 // Resume Interrupt Status.
//*****************************************************************************
//
// The following are defines for the bit fields in the USB_O_DRIM register.
//
//*****************************************************************************
#define USB_DRIM_RESUME 0x00000001 // Resume Interrupt Mask.
//*****************************************************************************
//
// The following are defines for the bit fields in the USB_O_DRISC register.
//
//*****************************************************************************
#define USB_DRISC_RESUME 0x00000001 // Resume Interrupt Status and
// Clear.
//*****************************************************************************
//
// The following are defines for the bit fields in the USB_O_GPCS re?? 快捷鍵說明
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