//
    // Check the arguments.
    //
    ASSERT(ulBase == USB0_BASE);

    //
    // Disable connection to the USB bus.
    //
    HWREGB(ulBase + USB_O_POWER) &= (~USB_POWER_SOFTCONN);
}

//*****************************************************************************
//
//! Sets the address in device mode.
//!
//! \param ulBase specifies the USB module base address.
//! \param ulAddress is the address to use for a device.
//!
//! This function will set the device address on the USB bus.  This address was
//! likely received via a SET ADDRESS command from the host controller.
//!
//! \note This function should only be called in device mode.
//!
//! \return None.
//
//*****************************************************************************
void
USBDevAddrSet(unsigned long ulBase, unsigned long ulAddress)
{
    //
    // Check the arguments.
    //
    ASSERT(ulBase == USB0_BASE);

    //
    // Set the function address in the correct location.
    //
    HWREGB(ulBase + USB_O_FADDR) = (unsigned char)ulAddress;
}

//*****************************************************************************
//
//! Returns the current device address in device mode.
//!
//! \param ulBase specifies the USB module base address.
//!
//! This function will return the current device address.  This address was set
//! by a call to USBDevAddrSet().
//!
//! \note This function should only be called in device mode.
//!
//! \return The current device address.
//
//*****************************************************************************
unsigned long
USBDevAddrGet(unsigned long ulBase)
{
    //
    // Check the arguments.
    //
    ASSERT(ulBase == USB0_BASE);

    //
    // Return the function address.
    //
    return(HWREGB(ulBase + USB_O_FADDR));
}

//*****************************************************************************
//
//! Sets the base configuration for a host endpoint.
//!
//! \param ulBase specifies the USB module base address.
//! \param ulEndpoint is the endpoint to access.
//! \param ulMaxPayload is the maximum payload for this endpoint.
//! \param ulNAKPollInterval is the either the NAK timeout limit or the polling
//! interval depending on the type of endpoint.
//! \param ulTargetEndpoint is the endpoint that the host endpoint is
//! targeting.
//! \param ulFlags are used to configure other endpoint settings.
//!
//! This function will set the basic configuration for the transmit or receive
//! portion of an endpoint in host mode.  The \e ulFlags parameter determines
//! some of the configuration while the other parameters provide the rest.  The
//! \e ulFlags parameter determines whether this is an IN endpoint
//! (USB_EP_HOST_IN or USB_EP_DEV_IN) or an OUT endpoint (USB_EP_HOST_OUT or
//! USB_EP_DEV_OUT), whether this is a Full speed endpoint (USB_EP_SPEED_FULL)
//! or a Low speed endpoint (USB_EP_SPEED_LOW).
//!
//! The \b USB_EP_MODE_ flags control the type of the endpoint.
//! - \b USB_EP_MODE_CTRL is a control endpoint.
//! - \b USB_EP_MODE_ISOC is an isochronous endpoint.
//! - \b USB_EP_MODE_BULK is a bulk endpoint.
//! - \b USB_EP_MODE_INT is an interrupt endpoint.
//!
//! The \e ulNAKPollInterval parameter has different meanings based on the
//! \b USB_EP_MODE value and whether or not this call is being made for
//! endpoint zero or another endpoint.  For endpoint zero or any Bulk
//! endpoints, this value always indicates the number of frames to allow a
//! device to NAK before considering it a timeout.  If this endpoint is an
//! isochronous or interrupt endpoint, this value is the polling interval for
//! this endpoint.
//!
//! For interrupt endpoints the polling interval is simply the number of
//! frames between polling an interrupt endpoint.  For isochronous endpoints
//! this value represents a polling interval of 2 ^ (\e ulNAKPollInterval - 1)
//! frames.  When used as a NAK timeout, the \e ulNAKPollInterval value
//! specifies 2 ^ (\e ulNAKPollInterval - 1) frames before issuing a time out.
//! There are two special time out values that can be specified when setting
//! the \e ulNAKPollInterval value.  The first is \b MAX_NAK_LIMIT which is the
//! maximum value that can be passed in this variable.  The other is
//! \b DISABLE_NAK_LIMIT which indicates that there should be no limit on the
//! number of NAKs.
//!
//! The \b USB_EP_DMA_MODE_ flags enables the type of DMA used to access the
//! endpoint's data FIFOs.  The choice of the DMA mode depends on how the DMA
//! controller is configured and how it is being used.  See the ``Using USB
//! with the uDMA Controller'' section for more information on DMA
//! configuration.
//!
//! When configuring the OUT portion of an endpoint, the \b USB_EP_AUTO_SET bit
//! is specified to cause the transmission of data on the USB bus to start
//! as soon as the number of bytes specified by \e ulMaxPayload have been
//! written into the OUT FIFO for this endpoint.
//!
//! When configuring the IN portion of an endpoint, the \b USB_EP_AUTO_REQUEST
//! bit can be specified to trigger the request for more data once the FIFO has
//! been drained enough to fit \e ulMaxPayload bytes.  The \b USB_EP_AUTO_CLEAR
//! bit can be used to clear the data packet ready flag automatically once the
//! data has been read from the FIFO.  If this is not used, this flag must be
//! manually cleared via a call to USBDevEndpointStatusClear() or
//! USBHostEndpointStatusClear().
//!
//! \note This function should only be called in host mode.
//!
//! \return None.
//
//*****************************************************************************
void
USBHostEndpointConfig(unsigned long ulBase, unsigned long ulEndpoint,
                      unsigned long ulMaxPayload,
                      unsigned long ulNAKPollInterval,
                      unsigned long ulTargetEndpoint, unsigned long ulFlags)
{
    unsigned long ulRegister;

    //
    // Check the arguments.
    //
    ASSERT(ulBase == USB0_BASE);
    ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
           (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3));
    ASSERT(ulNAKPollInterval <= MAX_NAK_LIMIT);

    //
    // Endpoint zero is configured differently than the other endpoints, so see
    // if this is endpoint zero.
    //
    if(ulEndpoint == USB_EP_0)
    {
        //
        // Set the NAK timeout.
        //
        HWREGB(ulBase + USB_O_NAKLMT) = ulNAKPollInterval;

        //
        // Set the transfer type information.
        //
        HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_TYPE0) =
            ((ulFlags & USB_EP_SPEED_FULL) ? USB_TYPE0_SPEED_FULL :
             USB_TYPE0_SPEED_LOW);
    }
    else
    {
        //
        // Start with the target endpoint.
        //
        ulRegister = ulTargetEndpoint;

        //
        // Set the speed for the device using this endpoint.
        //
        if(ulFlags & USB_EP_SPEED_FULL)
        {
            ulRegister |= USB_TXTYPE1_SPEED_FULL;
        }
        else
        {
            ulRegister |= USB_TXTYPE1_SPEED_LOW;
        }

        //
        // Set the protocol for the device using this endpoint.
        //
        switch(ulFlags & USB_EP_MODE_MASK)
        {
            //
            // The bulk protocol is being used.
            //
            case USB_EP_MODE_BULK:
            {
                ulRegister |= USB_TXTYPE1_PROTO_BULK;
                break;
            }

            //
            // The isochronous protocol is being used.
            //
            case USB_EP_MODE_ISOC:
            {
                ulRegister |= USB_TXTYPE1_PROTO_ISOC;
                break;
            }

            //
            // The interrupt protocol is being used.
            //
            case USB_EP_MODE_INT:
            {
                ulRegister |= USB_TXTYPE1_PROTO_INT;
                break;
            }

            //
            // The control protocol is being used.
            //
            case USB_EP_MODE_CTRL:
            {
                ulRegister |= USB_TXTYPE1_PROTO_CTRL;
                break;
            }
        }

        //
        // See if the transmit or receive endpoint is being configured.
        //
        if(ulFlags & USB_EP_HOST_OUT)
        {
            //
            // Set the transfer type information.
            //
            HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_TXTYPE1) =
                ulRegister;

            //
            // Set the NAK timeout or polling interval.
            //
            HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_TXINTERVAL1) =
                ulNAKPollInterval;

            //
            // Set the Maximum Payload per transaction.
            //
            HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_TXMAXP1) =
                ulMaxPayload;

            //
            // Set the transmit control value to zero.
            //
            ulRegister = 0;

            //
            // Allow auto setting of TxPktRdy when max packet size has been
            // loaded into the FIFO.
            //
            if(ulFlags & USB_EP_AUTO_SET)
            {
                ulRegister |= USB_TXCSRH1_AUTOSET;
            }

            //
            // Configure the DMA Mode.
            //
            if(ulFlags & USB_EP_DMA_MODE_1)
            {
                ulRegister |= USB_TXCSRH1_DMAEN | USB_TXCSRH1_DMAMOD;
            }
            else if(ulFlags & USB_EP_DMA_MODE_0)
            {
                ulRegister |= USB_TXCSRH1_DMAEN;
            }

            //
            // Write out the transmit control value.
            //
            HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_TXCSRH1) =
                (unsigned char)ulRegister;
        }
        else
        {
            //
            // Set the transfer type information.
            //
            HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_RXTYPE1) =
                ulRegister;

            //
            // Set the NAK timeout or polling interval.
            //
            HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_RXINTERVAL1) =
                ulNAKPollInterval;

            //
            // Set the receive control value to zero.
            //
            ulRegister = 0;

            //
            // Allow auto clearing of RxPktRdy when packet of size max packet
            // has been unloaded from the FIFO.
            //
            if(ulFlags & USB_EP_AUTO_CLEAR)
            {
                ulRegister |= USB_RXCSRH1_AUTOCL;
            }

            //
            // Configure the DMA Mode.
            //
            if(ulFlags & USB_EP_DMA_MODE_1)
            {
                ulRegister |= USB_RXCSRH1_DMAEN | USB_RXCSRH1_DMAMOD;
            }
            else if(ulFlags & USB_EP_DMA_MODE_0)
            {
                ulRegister |= USB_RXCSRH1_DMAEN;
            }

            //
            // Write out the receive control value.
            //
            HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_RXCSRH1) =
                (unsigned char)ulRegister;
        }
    }
}

//*****************************************************************************
//
//! Sets the configuration for an endpoint.
//!
//! \param ulBase specifies the USB module base address.
//! \param ulEndpoint is the endpoint to access.
//! \param ulMaxPacketSize is the maximum packet size for this endpoint.
//! \param ulFlags are used to configure other endpoint settings.
//!
//! This function will set the basic configuration for an endpoint in device
//! mode.  Endpiont zero does not have a dynamic configuration, so this
//! function should not be called for endpoint zero.  The \e ulFlags parameter
//! determines some of the configuration while the other parameters provide the
//! rest.
//!
//! The \b USB_EP_MODE_ flags define what the type is for the given endpoint.
//!
//! - \b USB_EP_MODE_CTRL is a control endpoint.
//! - \b USB_EP_MODE_ISOC is an isochronous endpoint.
//! - \b USB_EP_MODE_BULK is a bulk endpoint.
//! - \b USB_EP_MODE_INT is an interrupt endpoint.
//!
//! The \b USB_EP_DMA_MODE_ flags determines the type of DMA access to the
//! endpoint data FIFOs.  The choice of the DMA mode depends on how the DMA
//! controller is configured and how it is being used.  See the ``Using USB
//! with the uDMA Controller'' section for more information on DMA
//! configuration.
//!
//! When configuring an IN endpoint, the \b USB_EP_AUTO_SET bit can be
//! specified to cause the automatic transmission of data on the USB bus as
//! soon as \e ulMaxPacketSize bytes of data are written into the FIFO for
//! this endpoint.  This is commonly used with DMA as no interaction is
//! required to start the transmission of data.
//!
//! When configuring an OUT endpoint, the \b USB_EP_AUTO_REQUEST bit is
//! specified to trigger the request for more data once the FIFO has been
//! drained enough to receive \e ulMaxPacketSize more bytes of data.  Also for
//! OUT endpoints, the \b USB_EP_AUTO_CLEAR bit can be used to clear the data
//! packet ready flag automatically once the data has been read from the FIFO.
//! If this is not used, this flag must be manually cleared via a call to
//! USBDevEndpointStatusClear().  Both of these settings can be used to remove
//! the need for extra calls when using the controller in DMA mode.
//!
//! \note This function should only be called in device mode.
//!
//! \return None.
//
//*****************************************************************************
void
USBDevEndpointConfig(unsigned long ulBase, unsigned long ulEndpoint,
                     unsigned long ulMaxPacketSize, unsigned long ulFlags)
{
    unsigned long ulRegister;