?? at91sam7a3.tcl
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set AT91C_MCI_RCRCE [expr 0x1 << 18 ]
set AT91C_MCI_RENDE [expr 0x1 << 19 ]
set AT91C_MCI_RTOE [expr 0x1 << 20 ]
set AT91C_MCI_DCRCE [expr 0x1 << 21 ]
set AT91C_MCI_DTOE [expr 0x1 << 22 ]
set AT91C_MCI_OVRE [expr 0x1 << 30 ]
set AT91C_MCI_UNRE [expr 0x1 << 31 ]
# -------- MCI_IMR : (MCI Offset: 0x4c) MCI Interrupt Mask Register --------
set AT91C_MCI_CMDRDY [expr 0x1 << 0 ]
set AT91C_MCI_RXRDY [expr 0x1 << 1 ]
set AT91C_MCI_TXRDY [expr 0x1 << 2 ]
set AT91C_MCI_BLKE [expr 0x1 << 3 ]
set AT91C_MCI_DTIP [expr 0x1 << 4 ]
set AT91C_MCI_NOTBUSY [expr 0x1 << 5 ]
set AT91C_MCI_ENDRX [expr 0x1 << 6 ]
set AT91C_MCI_ENDTX [expr 0x1 << 7 ]
set AT91C_MCI_RXBUFF [expr 0x1 << 14 ]
set AT91C_MCI_TXBUFE [expr 0x1 << 15 ]
set AT91C_MCI_RINDE [expr 0x1 << 16 ]
set AT91C_MCI_RDIRE [expr 0x1 << 17 ]
set AT91C_MCI_RCRCE [expr 0x1 << 18 ]
set AT91C_MCI_RENDE [expr 0x1 << 19 ]
set AT91C_MCI_RTOE [expr 0x1 << 20 ]
set AT91C_MCI_DCRCE [expr 0x1 << 21 ]
set AT91C_MCI_DTOE [expr 0x1 << 22 ]
set AT91C_MCI_OVRE [expr 0x1 << 30 ]
set AT91C_MCI_UNRE [expr 0x1 << 31 ]
# *****************************************************************************
# SOFTWARE API DEFINITION FOR USB Device Interface
# *****************************************************************************
# -------- UDP_FRM_NUM : (UDP Offset: 0x0) USB Frame Number Register --------
set AT91C_UDP_FRM_NUM [expr 0x7FF << 0 ]
set AT91C_UDP_FRM_ERR [expr 0x1 << 16 ]
set AT91C_UDP_FRM_OK [expr 0x1 << 17 ]
# -------- UDP_GLB_STATE : (UDP Offset: 0x4) USB Global State Register --------
set AT91C_UDP_FADDEN [expr 0x1 << 0 ]
set AT91C_UDP_CONFG [expr 0x1 << 1 ]
set AT91C_UDP_ESR [expr 0x1 << 2 ]
set AT91C_UDP_RSMINPR [expr 0x1 << 3 ]
set AT91C_UDP_RMWUPE [expr 0x1 << 4 ]
# -------- UDP_FADDR : (UDP Offset: 0x8) USB Function Address Register --------
set AT91C_UDP_FADD [expr 0xFF << 0 ]
set AT91C_UDP_FEN [expr 0x1 << 8 ]
# -------- UDP_IER : (UDP Offset: 0x10) USB Interrupt Enable Register --------
set AT91C_UDP_EPINT0 [expr 0x1 << 0 ]
set AT91C_UDP_EPINT1 [expr 0x1 << 1 ]
set AT91C_UDP_EPINT2 [expr 0x1 << 2 ]
set AT91C_UDP_EPINT3 [expr 0x1 << 3 ]
set AT91C_UDP_EPINT4 [expr 0x1 << 4 ]
set AT91C_UDP_EPINT5 [expr 0x1 << 5 ]
set AT91C_UDP_EPINT6 [expr 0x1 << 6 ]
set AT91C_UDP_EPINT7 [expr 0x1 << 7 ]
set AT91C_UDP_RXSUSP [expr 0x1 << 8 ]
set AT91C_UDP_RXRSM [expr 0x1 << 9 ]
set AT91C_UDP_EXTRSM [expr 0x1 << 10 ]
set AT91C_UDP_SOFINT [expr 0x1 << 11 ]
set AT91C_UDP_WAKEUP [expr 0x1 << 13 ]
# -------- UDP_IDR : (UDP Offset: 0x14) USB Interrupt Disable Register --------
set AT91C_UDP_EPINT0 [expr 0x1 << 0 ]
set AT91C_UDP_EPINT1 [expr 0x1 << 1 ]
set AT91C_UDP_EPINT2 [expr 0x1 << 2 ]
set AT91C_UDP_EPINT3 [expr 0x1 << 3 ]
set AT91C_UDP_EPINT4 [expr 0x1 << 4 ]
set AT91C_UDP_EPINT5 [expr 0x1 << 5 ]
set AT91C_UDP_EPINT6 [expr 0x1 << 6 ]
set AT91C_UDP_EPINT7 [expr 0x1 << 7 ]
set AT91C_UDP_RXSUSP [expr 0x1 << 8 ]
set AT91C_UDP_RXRSM [expr 0x1 << 9 ]
set AT91C_UDP_EXTRSM [expr 0x1 << 10 ]
set AT91C_UDP_SOFINT [expr 0x1 << 11 ]
set AT91C_UDP_WAKEUP [expr 0x1 << 13 ]
# -------- UDP_IMR : (UDP Offset: 0x18) USB Interrupt Mask Register --------
set AT91C_UDP_EPINT0 [expr 0x1 << 0 ]
set AT91C_UDP_EPINT1 [expr 0x1 << 1 ]
set AT91C_UDP_EPINT2 [expr 0x1 << 2 ]
set AT91C_UDP_EPINT3 [expr 0x1 << 3 ]
set AT91C_UDP_EPINT4 [expr 0x1 << 4 ]
set AT91C_UDP_EPINT5 [expr 0x1 << 5 ]
set AT91C_UDP_EPINT6 [expr 0x1 << 6 ]
set AT91C_UDP_EPINT7 [expr 0x1 << 7 ]
set AT91C_UDP_RXSUSP [expr 0x1 << 8 ]
set AT91C_UDP_RXRSM [expr 0x1 << 9 ]
set AT91C_UDP_EXTRSM [expr 0x1 << 10 ]
set AT91C_UDP_SOFINT [expr 0x1 << 11 ]
set AT91C_UDP_WAKEUP [expr 0x1 << 13 ]
# -------- UDP_ISR : (UDP Offset: 0x1c) USB Interrupt Status Register --------
set AT91C_UDP_EPINT0 [expr 0x1 << 0 ]
set AT91C_UDP_EPINT1 [expr 0x1 << 1 ]
set AT91C_UDP_EPINT2 [expr 0x1 << 2 ]
set AT91C_UDP_EPINT3 [expr 0x1 << 3 ]
set AT91C_UDP_EPINT4 [expr 0x1 << 4 ]
set AT91C_UDP_EPINT5 [expr 0x1 << 5 ]
set AT91C_UDP_EPINT6 [expr 0x1 << 6 ]
set AT91C_UDP_EPINT7 [expr 0x1 << 7 ]
set AT91C_UDP_RXSUSP [expr 0x1 << 8 ]
set AT91C_UDP_RXRSM [expr 0x1 << 9 ]
set AT91C_UDP_EXTRSM [expr 0x1 << 10 ]
set AT91C_UDP_SOFINT [expr 0x1 << 11 ]
set AT91C_UDP_ENDBUSRES [expr 0x1 << 12 ]
set AT91C_UDP_WAKEUP [expr 0x1 << 13 ]
# -------- UDP_ICR : (UDP Offset: 0x20) USB Interrupt Clear Register --------
set AT91C_UDP_EPINT0 [expr 0x1 << 0 ]
set AT91C_UDP_EPINT1 [expr 0x1 << 1 ]
set AT91C_UDP_EPINT2 [expr 0x1 << 2 ]
set AT91C_UDP_EPINT3 [expr 0x1 << 3 ]
set AT91C_UDP_EPINT4 [expr 0x1 << 4 ]
set AT91C_UDP_EPINT5 [expr 0x1 << 5 ]
set AT91C_UDP_EPINT6 [expr 0x1 << 6 ]
set AT91C_UDP_EPINT7 [expr 0x1 << 7 ]
set AT91C_UDP_RXSUSP [expr 0x1 << 8 ]
set AT91C_UDP_RXRSM [expr 0x1 << 9 ]
set AT91C_UDP_EXTRSM [expr 0x1 << 10 ]
set AT91C_UDP_SOFINT [expr 0x1 << 11 ]
set AT91C_UDP_WAKEUP [expr 0x1 << 13 ]
# -------- UDP_RST_EP : (UDP Offset: 0x28) USB Reset Endpoint Register --------
set AT91C_UDP_EP0 [expr 0x1 << 0 ]
set AT91C_UDP_EP1 [expr 0x1 << 1 ]
set AT91C_UDP_EP2 [expr 0x1 << 2 ]
set AT91C_UDP_EP3 [expr 0x1 << 3 ]
set AT91C_UDP_EP4 [expr 0x1 << 4 ]
set AT91C_UDP_EP5 [expr 0x1 << 5 ]
set AT91C_UDP_EP6 [expr 0x1 << 6 ]
set AT91C_UDP_EP7 [expr 0x1 << 7 ]
# -------- UDP_CSR : (UDP Offset: 0x30) USB Endpoint Control and Status Register --------
set AT91C_UDP_TXCOMP [expr 0x1 << 0 ]
set AT91C_UDP_RX_DATA_BK0 [expr 0x1 << 1 ]
set AT91C_UDP_RXSETUP [expr 0x1 << 2 ]
set AT91C_UDP_ISOERROR [expr 0x1 << 3 ]
set AT91C_UDP_TXPKTRDY [expr 0x1 << 4 ]
set AT91C_UDP_FORCESTALL [expr 0x1 << 5 ]
set AT91C_UDP_RX_DATA_BK1 [expr 0x1 << 6 ]
set AT91C_UDP_DIR [expr 0x1 << 7 ]
set AT91C_UDP_EPTYPE [expr 0x7 << 8 ]
set AT91C_UDP_EPTYPE_CTRL [expr 0x0 << 8 ]
set AT91C_UDP_EPTYPE_ISO_OUT [expr 0x1 << 8 ]
set AT91C_UDP_EPTYPE_BULK_OUT [expr 0x2 << 8 ]
set AT91C_UDP_EPTYPE_INT_OUT [expr 0x3 << 8 ]
set AT91C_UDP_EPTYPE_ISO_IN [expr 0x5 << 8 ]
set AT91C_UDP_EPTYPE_BULK_IN [expr 0x6 << 8 ]
set AT91C_UDP_EPTYPE_INT_IN [expr 0x7 << 8 ]
set AT91C_UDP_DTGLE [expr 0x1 << 11 ]
set AT91C_UDP_EPEDS [expr 0x1 << 15 ]
set AT91C_UDP_RXBYTECNT [expr 0x7FF << 16 ]
# -------- UDP_TXVC : (UDP Offset: 0x74) Transceiver Control Register --------
set AT91C_UDP_TXVDIS [expr 0x1 << 8 ]
set AT91C_UDP_PUON [expr 0x1 << 9 ]
# *****************************************************************************
# SOFTWARE API DEFINITION FOR Two-wire Interface
# *****************************************************************************
# -------- TWI_CR : (TWI Offset: 0x0) TWI Control Register --------
set AT91C_TWI_START [expr 0x1 << 0 ]
set AT91C_TWI_STOP [expr 0x1 << 1 ]
set AT91C_TWI_MSEN [expr 0x1 << 2 ]
set AT91C_TWI_MSDIS [expr 0x1 << 3 ]
set AT91C_TWI_SWRST [expr 0x1 << 7 ]
# -------- TWI_MMR : (TWI Offset: 0x4) TWI Master Mode Register --------
set AT91C_TWI_IADRSZ [expr 0x3 << 8 ]
set AT91C_TWI_IADRSZ_NO [expr 0x0 << 8 ]
set AT91C_TWI_IADRSZ_1_BYTE [expr 0x1 << 8 ]
set AT91C_TWI_IADRSZ_2_BYTE [expr 0x2 << 8 ]
set AT91C_TWI_IADRSZ_3_BYTE [expr 0x3 << 8 ]
set AT91C_TWI_MREAD [expr 0x1 << 12 ]
set AT91C_TWI_DADR [expr 0x7F << 16 ]
# -------- TWI_CWGR : (TWI Offset: 0x10) TWI Clock Waveform Generator Register --------
set AT91C_TWI_CLDIV [expr 0xFF << 0 ]
set AT91C_TWI_CHDIV [expr 0xFF << 8 ]
set AT91C_TWI_CKDIV [expr 0x7 << 16 ]
# -------- TWI_SR : (TWI Offset: 0x20) TWI Status Register --------
set AT91C_TWI_TXCOMP [expr 0x1 << 0 ]
set AT91C_TWI_RXRDY [expr 0x1 << 1 ]
set AT91C_TWI_TXRDY [expr 0x1 << 2 ]
set AT91C_TWI_OVRE [expr 0x1 << 6 ]
set AT91C_TWI_UNRE [expr 0x1 << 7 ]
set AT91C_TWI_NACK [expr 0x1 << 8 ]
# -------- TWI_IER : (TWI Offset: 0x24) TWI Interrupt Enable Register --------
set AT91C_TWI_TXCOMP [expr 0x1 << 0 ]
set AT91C_TWI_RXRDY [expr 0x1 << 1 ]
set AT91C_TWI_TXRDY [expr 0x1 << 2 ]
set AT91C_TWI_OVRE [expr 0x1 << 6 ]
set AT91C_TWI_UNRE [expr 0x1 << 7 ]
set AT91C_TWI_NACK [expr 0x1 << 8 ]
# -------- TWI_IDR : (TWI Offset: 0x28) TWI Interrupt Disable Register --------
set AT91C_TWI_TXCOMP [expr 0x1 << 0 ]
set AT91C_TWI_RXRDY [expr 0x1 << 1 ]
set AT91C_TWI_TXRDY [expr 0x1 << 2 ]
set AT91C_TWI_OVRE [expr 0x1 << 6 ]
set AT91C_TWI_UNRE [expr 0x1 << 7 ]
set AT91C_TWI_NACK [expr 0x1 << 8 ]
# -------- TWI_IMR : (TWI Offset: 0x2c) TWI Interrupt Mask Register --------
set AT91C_TWI_TXCOMP [expr 0x1 << 0 ]
set AT91C_TWI_RXRDY [expr 0x1 << 1 ]
set AT91C_TWI_TXRDY [expr 0x1 << 2 ]
set AT91C_TWI_OVRE [expr 0x1 << 6 ]
set AT91C_TWI_UNRE [expr 0x1 << 7 ]
set AT91C_TWI_NACK [expr 0x1 << 8 ]
# *****************************************************************************
# SOFTWARE API DEFINITION FOR Usart
# *****************************************************************************
# -------- US_CR : (USART Offset: 0x0) Debug Unit Control Register --------
set AT91C_US_RSTRX [expr 0x1 << 2 ]
set AT91C_US_RSTTX [expr 0x1 << 3 ]
set AT91C_US_RXEN [expr 0x1 << 4 ]
set AT91C_US_RXDIS [expr 0x1 << 5 ]
set AT91C_US_TXEN [expr 0x1 << 6 ]
set AT91C_US_TXDIS [expr 0x1 << 7 ]
set AT91C_US_RSTSTA [expr 0x1 << 8 ]
set AT91C_US_STTBRK [expr 0x1 << 9 ]
set AT91C_US_STPBRK [expr 0x1 << 10 ]
set AT91C_US_STTTO [expr 0x1 << 11 ]
set AT91C_US_SENDA [expr 0x1 << 12 ]
set AT91C_US_RSTIT [expr 0x1 << 13 ]
set AT91C_US_RSTNACK [expr 0x1 << 14 ]
set AT91C_US_RETTO [expr 0x1 << 15 ]
set AT91C_US_DTREN [expr 0x1 << 16 ]
set AT91C_US_DTRDIS [expr 0x1 << 17 ]
set AT91C_US_RTSEN [expr 0x1 << 18 ]
set AT91C_US_RTSDIS [expr 0x1 << 19 ]
# -------- US_MR : (USART Offset: 0x4) Debug Unit Mode Register --------
set AT91C_US_USMODE [expr 0xF << 0 ]
set AT91C_US_USMODE_NORMAL 0x0
set AT91C_US_USMODE_RS485 0x1
set AT91C_US_USMODE_HWHSH 0x2
set AT91C_US_USMODE_MODEM 0x3
set AT91C_US_USMODE_ISO7816_0 0x4
set AT91C_US_USMODE_ISO7816_1 0x6
set AT91C_US_USMODE_IRDA 0x8
set AT91C_US_USMODE_SWHSH 0xC
set AT91C_US_CLKS [expr 0x3 << 4 ]
set AT91C_US_CLKS_CLOCK [expr 0x0 << 4 ]
set AT91C_US_CLKS_FDIV1 [expr 0x1 << 4 ]
set AT91C_US_CLKS_SLOW [expr 0x2 << 4 ]
set AT91C_US_CLKS_EXT [expr 0x3 << 4 ]
set AT91C_US_CHRL [expr 0x3 << 6 ]
set AT91C_US_CHRL_5_BITS [expr 0x0 << 6 ]
set AT91C_US_CHRL_6_BITS [expr 0x1 << 6 ]
set AT91C_US_CHRL_7_BITS [expr 0x2 << 6 ]
set AT91C_US_CHRL_8_BITS [expr 0x3 << 6 ]
set AT91C_US_SYNC [expr 0x1 << 8 ]
set AT91C_US_PAR [expr 0x7 << 9 ]
set AT91C_US_PAR_EVEN [expr 0x0 << 9 ]
set AT91C_US_PAR_ODD [expr 0x1 << 9 ]
set AT91C_US_PAR_SPACE [expr 0x2 << 9 ]
set AT91C_US_PAR_MARK [expr 0x3 << 9 ]
set AT91C_US_PAR_NONE [expr 0x4 << 9 ]
set AT91C_US_PAR_MULTI_DROP [expr 0x6 << 9 ]
set AT91C_US_NBSTOP [expr 0x3 << 12 ]
set AT91C_US_NBSTOP_1_BIT [exp?? 快捷鍵說明
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