#$Id: //depot/sw/branches/ART_V48/bringup/ar5k/config/ar5001a2_mb23.eep#1 $

#EEPROM file for AR5001A+ 802.11a High Power MiniPCI Reference Design

@cal_section_begin      		# begin @cal section

TARGET_POWER_FILENAME      =  calTrgtPwr_ar5001a2_mb23.txt ; # target power filename for calibration
SUBSYSTEM_ID	           =  0x2028;   # Subsystem ID in hex
TURBO_DISABLE	           =  0;   	# Prevents software from using TURBO modes
RF_SILENT	           =  0;   	# Cards enabled with RFSilent can be easily silenced
DEVICE_TYPE		   =  3;   	# 1=>Cardbus, 2=>PCI, 3=>miniPCI, 4=>AP
TURBO_MAXPOWER_5G	   =  30.0;   	# Recommended max power in turbo mode to consume less than 2W.
A_MODE		           =  1;   	# Whether the adapter supports 802.11a functionality
B_MODE		           =  0;   	# Whether the adapter supports 802.11b functionality
G_MODE		           =  0;   	# Whether the adapter supports 802.11g functionality
ANTENNA_GAIN_5G	           =  8;   	# Antenna gain at 5.5GHz. 8-bit signed val in 0.5dB steps.
XLNA_GAIN		   =  13;  	# xLNA gain in dB (per AS 6/18/02)
NOISE_FLOOR_THRESHOLD	   = -54; 	# noise floor threshold value  (per JHfmn 6/18/02)
11a_FALSE_DETECT_BACKOFF   =  1;	# in dB. only affects channels w/ clock harmonic overlap.

@cal_section_end        		#end @cal section	


@config_section_begin   		#begin @config section
	        
#Antenna Switch Table
#6 bit (msb:lsb) value are mapped to [atten5, atten2, antD, antC, antB, antA]    	
#------------------------------------------------------------------------------
@MODE: MODE_SPECIFIC             11a   11a_turbo        11b         11g
#------------------------------------------------------------------------------
bb_switch_table_r1x12           0x12        0x12           0          0	#(AntCtl 5)
bb_switch_table_r1x2            0x22        0x22           0          0 #(AntCtl 4)
bb_switch_table_r1x1            0x12        0x12           0          0 #(AntCtl 3)
bb_switch_table_r1              0x22        0x22           0          0 #(AntCtl 2)
bb_switch_table_t1              0x18        0x18           0          0 #(AntCtl 1)

bb_switch_table_r2x12           0x18        0x18           0          0 #(AntCtl 10)
bb_switch_table_r2x2            0x28        0x28           0          0 #(AntCtl 9)
bb_switch_table_r2x1            0x18        0x18           0          0 #(AntCtl 8)
bb_switch_table_r2              0x28        0x28           0          0 #(AntCtl 7)
bb_switch_table_t2              0x12        0x12           0          0 #(AntCtl 6)

bb_rxtx_margin_2ghz               11          11          16         16         
bb_switch_settling              0x2d        0x5a           0          0
bb_txrxatten                      10          10           0          0
bb_pga_desired_size              -80         -80           0          0
bb_adc_desired_size              -32         -32           0          0
rf_b_ob                            1           1           0          0
rf_b_db                            1           1           0          0
rf_ob                              1           1           0          0
rf_db                              2           2           0          0
rf_plo_sel                         1           1           0          0
rf_pwdxpd                          0           0           0          0
rf_xpd_gain                      0xe         0xe           0          0
bb_thresh62                       15          15           0          0
bb_tx_end_to_xpab_off              0           0           0          0
bb_tx_end_to_xpaa_off              0           0           0          0
bb_tx_frame_to_xpab_on          0x0e         0xe           0          0
bb_tx_frame_to_xpaa_on          0x0e         0xe           0          0
bb_tx_end_to_xlna_on               2           2           0          0

rf_gain_I                       0x0a        0x0a           0          0

@config_section_end     # end @config section