?? mxd_sdk_api.c
字號:
PDEVICE_PROPERTY_S psDeviceProperty;
psDeviceProperty = (PDEVICE_PROPERTY_S)hDevice;
for(i=0;i<5;i++)
{
DDS_ReadReg( hDevice, DTMB_TDP_PWM_THD_REG, &agcVal );
agcSum += agcVal;
}
agcVal = (MXD_U8)(agcSum/i)*2;
if(agcVal>=100)
{
agcVal = 95;
}
DDS_ReadReg( hDevice, DTMB_TDP_IQREF_REG, ®Val );
DDS_ReadReg( hDevice, DTMB_TDP_PWM_CLK_STEP_REG, &stepVal );
DDS_ReadReg( hDevice, DTMB_FEC_ITER_REAL_NUM_REG, &iterNum );
snrVal = (agcVal*100*64)/(regVal*stepVal)-100;
if(snrVal<0)
{
snrVal = - snrVal;
}
DDS_ReadReg( hDevice, DTMB_TDP_TPS_REG, ®Val );
regVal &= 0x0f;
if((snrVal<=5)&&(iterNum>iterRefNum[regVal]))
{
snrVal = 5;
}
if((snrVal>40)&&(iterNum<3))
{
snrVal = 40;
}
snrVal = snrVal*2;
if(snrVal<10)
{
snrVal = 10;
}
if(snrVal>90)
{
snrVal = 90;
}
/*Add judge condition here */
psDeviceProperty->m_LastErrStatus = MXD_RTN_OK;
OAL_DebugPrint(1, "DTMB_GetSnr:: the snr val:0x%x\n", snrVal);
return (MXD_U8)snrVal;
}/* end of DTMB_GetSnr( ) */
/*!
* Query the RSSI of DTMB signal after AGC.
*
* \param hDevice: [in] Device handle
*
* \return RSSI value.
*
* \remark null
*
*/
MXD_U32 MXD_API DTMB_GetRssi( IN HMXDDEV hDevice )
{
MXD_U32 rssiVal;
MXD_U8 regVal;
PDEVICE_PROPERTY_S psDeviceProperty;
psDeviceProperty = (PDEVICE_PROPERTY_S)hDevice;
DDS_WriteReg( hDevice, DTMB_MISC_READ_FREEZE_REG, MISC_RSSI_READ_FREEZE_SET);
DDS_ReadReg( hDevice, DTMB_TDP_RSSI_REG, ®Val );
rssiVal = regVal*4;
psDeviceProperty->m_LastErrStatus = MXD_RTN_OK;
return rssiVal;
}/* end of DTMB_GetRssi( ) */
/*!
* Query the LDPC BLER of DTMB signal.
*
* \param hDevice: [in] Device handle
*
* \return BLER of LDPC in DTMB mode.
*
* \remark : The return value is 0:4096;
*
*/
MXD_U32 MXD_API DTMB_GetBler( IN HMXDDEV hDevice )
{
MXD_U8 fecBlerH,fecBlerL;
MXD_U32 fecBlerVal;
PDEVICE_PROPERTY_S psDeviceProperty;
psDeviceProperty = (PDEVICE_PROPERTY_S)hDevice;
DDS_WriteReg( hDevice, DTMB_MISC_READ_FREEZE_REG, MISC_BLER_READ_FREEZE_SET );
DDS_ReadReg( hDevice, DTMB_FEC_BLER_H_REG, &fecBlerH );
DDS_ReadReg( hDevice, DTMB_FEC_BLER_L_REG, &fecBlerL );
fecBlerVal = (MXD_U32)( ( fecBlerH&0x1f)<<8 ) + fecBlerL ;
psDeviceProperty->m_LastErrStatus = MXD_RTN_OK;
return fecBlerVal;
}/* end of DTMB_GetBler( ) */
/*!
* Query the DTMB system information.
*
* \param hDevice: [in] Device handle
* \param psDtmbSystemInfo: [out] pointer to the DTMB system information structure.
*
* \return Return code by MXD_RTN_CODE_E enumeration.
*
* \remark null
*
*/
MXD_RTN_CODE_E MXD_API DTMB_GetSystemInfo(
IN HMXDDEV hDevice,
OUT DTMB_SYSTEM_INFO_S *psDtmbSystemInfo )
{
MXD_RTN_CODE_E eRtnCode = MXD_RTN_OK;
MXD_U8 regVal = 0;
MXD_U8 interleaveType = 0;
MXD_U8 qamldpc = 0;
MXD_U8 qamType = 0;
MXD_U8 ldpcCodeRate = 0;
DDS_ReadReg( hDevice, DTMB_TDP_TPS_REG, ®Val );
/* Decode Interleave type */
interleaveType = ( regVal&0x3f )>>5;
if( 0 == interleaveType )
{
psDtmbSystemInfo->m_InterleaveType = INTERLEAVE_TYPE_240;/*Type 1: Interleave Width(B = 52), Interleave Depth(M = 240)*/
}
else
{
psDtmbSystemInfo->m_InterleaveType = INTERLEAVE_TYPE_720;/*Type 2: Interleave Width(B = 52), Interleave Depth(M = 720)*/
}
/* Decode QAM type and LDPC Code Rate */
qamldpc = regVal&0x0f;
switch( qamldpc )
{
case 0x0:
{
qamType = QAM_TYPE_4NR; /*4QAM-NR*/
ldpcCodeRate = LDPC_CODE_RATE_0_8; /* LDPC Code Rate Type 3: 0.8;*/
break;
}
case 0x1:
{
qamType = QAM_TYPE_16; /* 16QAM */
ldpcCodeRate = LDPC_CODE_RATE_0_8; /* LDPC Code Rate Type 3: 0.8;*/
break;
}
case 0x2:
{
qamType = QAM_TYPE_4; /* 4QAM ;*/
ldpcCodeRate = LDPC_CODE_RATE_0_8;/* LDPC Code Rate Type 3: 0.8;*/
break;
}
case 0x4:
{
qamType = QAM_TYPE_4; /* 4QAM ;*/
ldpcCodeRate = LDPC_CODE_RATE_0_4;/* LDPC Code Rate Type 1: 0.4;*/
break;
}
case 0x5:
{
qamType = QAM_TYPE_4; /* 4QAM ;*/
ldpcCodeRate = LDPC_CODE_RATE_0_6; /*LDPC Code Rate Type 2: 0.6;*/
break;
}
case 0x7:
{
qamType = QAM_TYPE_16; /* 16QAM ;*/
ldpcCodeRate = LDPC_CODE_RATE_0_4; /* LDPC Code Rate Type 1: 0.4; */
break;
}
case 0x8:
{
qamType = QAM_TYPE_16; /*16QAM ;*/
ldpcCodeRate = LDPC_CODE_RATE_0_6; /* LDPC Code Rate Type 2: 0.6;*/
break;
}
case 0xC:
{
qamType = QAM_TYPE_32; /* 32QAM */
ldpcCodeRate = LDPC_CODE_RATE_0_8; /* LDPC Code Rate Type 3: 0.8;*/
break;
}
case 0xD:
{
qamType = QAM_TYPE_64; /* 64QAM ;*/
ldpcCodeRate = LDPC_CODE_RATE_0_4; /* LDPC Code Rate Type 1: 0.4;*/
break;
}
case 0xE:
{
qamType = QAM_TYPE_64; /* 64QAM ;*/
ldpcCodeRate = LDPC_CODE_RATE_0_6; /* LDPC Code Rate Type 2: 0.6;*/
break;
}
case 0xF:
{
qamType = QAM_TYPE_64; /* 64QAM ;*/
ldpcCodeRate = LDPC_CODE_RATE_0_8; /* LDPC Code Rate Type 3: 0.8; */
break;
}
default:
{
return MXD_RTN_NOT_SUPPORTED;
}
}
psDtmbSystemInfo->m_QamType = qamType;
psDtmbSystemInfo->m_LdpcCodeRateType = ldpcCodeRate;
return eRtnCode;
}/* end of DTMB_GetSystemInfo( ) */
/*!
* Get the DTMB service map.
*
* \param hDevice: [in] Device handle
* \param psDtmbServiceMap: [out] pointer to the DTMB service map structure.
*
* \return Return code by MXD_RTN_CODE_E enumeration.
*
* \remark null
*
*/
MXD_RTN_CODE_E MXD_API DTMB_GetServiceMap(
IN HMXDDEV hDevice,
OUT DTMB_SERVICE_MAP_S *psDtmbServiceMap )
{
MXD_RTN_CODE_E eRtnCode = MXD_RTN_OK;
PDEVICE_PROPERTY_S psDeviceProperty;
DTMB_SYSTEM_INFO_S sDtmbSystemInfo;
MXD_U8 regVal;
psDeviceProperty = (PDEVICE_PROPERTY_S)hDevice;
eRtnCode = DTMB_GetSystemInfo(psDeviceProperty, &sDtmbSystemInfo );
if( MXD_SUCCESS(eRtnCode) )
{
psDtmbServiceMap->m_TpsId = (MXD_U8)(sDtmbSystemInfo.m_QamType<<3) + (MXD_U8)(sDtmbSystemInfo.m_LdpcCodeRateType<<1) + sDtmbSystemInfo.m_InterleaveType;
psDtmbServiceMap->m_FreqHz = psDeviceProperty->m_FreqHz;
if( DEV_MODE_DTMB_MC == psDeviceProperty->m_eDevMode )
{
psDtmbServiceMap->m_McOrSc = 1;
}
else
{
psDtmbServiceMap->m_McOrSc = 0;
}
DDS_ReadReg( hDevice, DTMB_TDP_FID_RESULT_REG, ®Val );
psDeviceProperty->m_PnType = regVal&0x07; /* update pntype to hDevice */
psDtmbServiceMap->m_PnType = psDeviceProperty->m_PnType;
psDtmbServiceMap->m_sDtmbSysInfo = sDtmbSystemInfo;
OAL_DebugPrint(MXD_ULTRA_TRACE," DTMB_GetServiceMap:: DeviceMode: %d, QamType:0x%x,LdpcCodeRate:0x%x,InterleaveType:0x%x....... ! \n",
psDtmbServiceMap->m_McOrSc,sDtmbSystemInfo.m_QamType,sDtmbSystemInfo.m_LdpcCodeRateType,sDtmbSystemInfo.m_InterleaveType );
}
return eRtnCode;
}/* end of DTMB_GetServiceMap( ) */
/*!
* Check TPS ok interrupt..
*
* \param hDevice: [in] Device handle
* \param milliseconds:[in] Check the status after delay( unit: ms )
*
* \return Return code by MXD_RTN_CODE_E enumeration.
*
* \remark null
*
*/
MXD_RTN_CODE_E MXD_API DTMB_IsTpsOk(
IN HMXDDEV hDevice,
IN MXD_U32 milliseconds )
{
MXD_RTN_CODE_E eRtnCode = MXD_RTN_FAIL;
MXD_U8 regVal = 0;
MXD_U32 i;
PDEVICE_PROPERTY_S psDeviceProperty;
PDEMOD_PROPERTY_S psDemodProperty;
psDeviceProperty = (PDEVICE_PROPERTY_S)hDevice;
psDemodProperty = &(psDeviceProperty->m_sDemod);
if( 1 == psDemodProperty->m_TpsStatus )
{
return MXD_RTN_OK;
}
for( i=0; i<milliseconds; i++)
{
OAL_Sleep( 1 );
DDS_ReadReg(hDevice, DTMB_TDP_INT_STATUS_REG, ®Val );
DDS_WriteReg( hDevice, DTMB_TDP_INT_MASK_REG, 0xff );
if( 0 != regVal )
{
if( regVal&0x08 )
{
psDemodProperty->m_TpsStatus = 0;
/* clear tdp tps fail interrupt */
DDS_WriteRegFields(
hDevice,
DTMB_TDP_INT_CLEAR_REG,
0x3,
1,
0x1 );
OAL_DebugPrint( MXD_ULTRA_TRACE, "DTMB_IsTpsOk:: FID Failed interrupt! \n" );
return eRtnCode;
}
if( regVal&0x40 )
{
psDemodProperty->m_TpsStatus = 0;
/* clear tdp tps fail interrupt */
DDS_WriteRegFields(
hDevice,
DTMB_TDP_INT_CLEAR_REG,
0x6,
1,
0x1 );
OAL_DebugPrint( MXD_ULTRA_TRACE, "DTMB_IsTpsOk:: CPE Timeout interrupt! \n" );
return eRtnCode;
}
if( regVal&0x04 )
{
psDemodProperty->m_TpsStatus = 1;
/* clear tdp tps ok interrupt */
DDS_WriteRegFields(
hDevice,
DTMB_TDP_INT_CLEAR_REG,
DTMB_TDP_TPS_OK_INT_SET,
1,
0x1 );
}
if( regVal&0x20 )
{
psDemodProperty->m_TpsStatus = 0;
/* clear tdp tps fail interrupt */
DDS_WriteRegFields(
hDevice,
DTMB_TDP_INT_CLEAR_REG,
DTMB_TDP_TPS_FAIL_INT_SET,
1,
0x1 );
OAL_DebugPrint( MXD_ULTRA_TRACE, "DTMB_IsTpsOk:: TPS Failed interrupt! \n" );
return eRtnCode;
}
}
DDS_WriteReg( hDevice, DTMB_TDP_INT_MASK_REG, 0x00 );
if( 1 == psDemodProperty->m_TpsStatus )
{
OAL_DebugPrint( MXD_ULTRA_TRACE, "DTMB_IsTpsOk:: TPS ok interrupt ! tdpisr:0x%x\n", regVal );
return MXD_RTN_OK;
}
}
OAL_DebugPrint( MXD_ULTRA_TRACE, "DTMB_IsTpsOk:: TPS ok interrupt timeout! tdpisr:0x%x\n", regVal );
return eRtnCode;
}/* end of DTMB_IsTdpInitOk( ) */
/*!
* Check signal is exist or not.
*
* \param hDevice: [in] Device handle
*
* \return Return code by MXD_RTN_CODE_E enumeration.
*
* \remark null
*
*/
MXD_RTN_CODE_E MXD_API DTMB_IsSignalExist(
IN HMXDDEV hDevice,
IN MXD_S32 milliseconds )
{
MXD_RTN_CODE_E eRtnCode = MXD_RTN_OK;
MXD_U8 regVal = 0;
MXD_S32 i;
MXD_U8 noSignalFlag = 0;
PDEVICE_PROPERTY_S psDeviceProperty;
PTUNER_PROPERTY_S psTunerProperty;
psDeviceProperty = (PDEVICE_PROPERTY_S)hDevice;
psTunerProperty = &(psDeviceProperty->m_sTuner);
psDeviceProperty->m_InitFo = DTMB_CalcCpp( psTunerProperty->m_LifFreqKhz, psTunerProperty->m_IfRate );
DDS_WriteReg( hDevice, DTMB_TDP_CTS_THD_REG, 0x5 );
DDS_WriteReg( hDevice, DTMB_TDP_WORK_MODE_REG, 0x09 );
DDS_WriteReg( hDevice, DTMB_TDP_INIT_FO_H_REG, (MXD_U8)(psDeviceProperty->m_InitFo>>16));
DDS_WriteReg( hDevice, DTMB_TDP_INIT_FO_M_REG, (MXD_U8)(psDeviceProperty->m_InitFo>>8));
DDS_WriteReg( hDevice, DTMB_TDP_INIT_FO_L_REG, (MXD_U8)(psDeviceProperty->m_InitFo));
DDS_WriteReg( hDevice, DTMB_TDP_INIT_REG, 0x01 );
for( i=0; i<milliseconds; i++)
{
OAL_Sleep(1);
DDS_ReadReg( hDevice, DTMB_TDP_INT_STATUS_REG, ®Val );
if( 0 != regVal )
{
if( regVal&0x80 )
{
DDS_WriteReg( hDevice, DTMB_TDP_INT_CLEAR_REG, 0xff );
OAL_DebugPrint( MXD_ULTRA_TRACE, "DTMB_IsSignalExist:: NO Signal!\n" );
return MXD_RTN_FAIL;
}
else
{
DDS_WriteReg( hDevice, DTMB_TDP_INT_CLEAR_REG, 0xff );
noSignalFlag = 1;
break;
}
}
else
{
noSignalFlag = 0;
}
}
if( 0 == noSignalFlag )
{
OAL_DebugPrint( MXD_ULTRA_TRACE, "DTMB_IsSignalExist:: Timeout! ISR is 0x%x\n" ,regVal);
return MXD_RTN_FAIL;
}
DDS_WriteReg( hDevice, DTMB_TDP_CTS_THD_REG, 0 );
DDS_WriteReg( hDevice, DTM?? 快捷鍵說明
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