/* s3c2410xSio.c - Samsung s3c2410x UART tty driver */

/* Copyright 2004 HITSAT, Inc. */

#include "copyright_wrs.h"

/*
DESCRIPTION
This is the device driver for the Advanced RISC Machines (ARM) s3c2410x
UART. This is a generic design of UART used within a number of chips
containing (or for use with) ARM CPUs such as in the Digital Semiconductor
21285 chip as used in the EBSA-285 BSP.

This design contains a universal asynchronous receiver/transmitter, a
baud-rate generator, and an InfraRed Data Association (IrDa) Serial
InfraRed (SiR) protocol encoder. The Sir encoder is not supported by
this driver. The UART contains two 16-entry deep FIFOs for receive and
transmit: if a framing, overrun or parity error occurs during
reception, the appropriate error bits are stored in the receive FIFO
along with the received data. The FIFOs can be programmed to be one
byte deep only, like a conventional UART with double buffering, but the
only mode of operation supported is with the FIFOs enabled.

The UART design does not support the modem control output signals: DTR,
RI and RTS. Moreover, the implementation in the 21285 chip does not
support the modem control inputs: DCD, CTS and DSR.

The UART design can generate four interrupts: Rx, Tx, modem status
change and a UART disabled interrupt (which is asserted when a start
bit is detected on the receive line when the UART is disabled). The
implementation in the 21285 chip has only two interrupts: Rx and Tx,
but the Rx interrupt is a combination of the normal Rx interrupt status
and the UART disabled interrupt status.

Only asynchronous serial operation is supported by the UART which
supports 5 to 8 bit bit word lengths with or without parity and with
one or two stop bits. The only serial word format supported by the
driver is 8 data bits, 1 stop bit, no parity,  The default baud rate is
determined by the BSP by filling in the s3c2410x_CHAN structure before
calling s3c2410xDevInit().

The exact baud rates supported by this driver will depend on the
crystal fitted (and consequently the input clock to the baud-rate
generator), but in general, baud rates from about 300 to about 115200
are possible.

In theory, any number of UART channels could be implemented within a
chip. This driver has been designed to cope with an arbitrary number of
channels, but at the time of writing, has only ever been tested with
one channel.

.SH DATA STRUCTURES
An s3c2410x_CHAN data structure is used to describe each channel, this
structure is described in h/drv/sio/s3c2410xSio.h.

.SH CALLBACKS
Servicing a "transmitter ready" interrupt involves making a callback to
a higher level library in order to get a character to transmit.  By
default, this driver installs dummy callback routines which do nothing.
A higher layer library that wants to use this driver (e.g. ttyDrv)
will install its own callback routine using the SIO_INSTALL_CALLBACK
ioctl command.  Likewise, a receiver interrupt handler makes a callback
to pass the character to the higher layer library.
 
.SH MODES
This driver supports both polled and interrupt modes.

.SH USAGE
The driver is typically only called by the BSP. The directly callable
routines in this modules are s3c2410xDevInit(), s3c2410xIntTx() and
s3c2410xIntRx().

The BSP's sysHwInit() routine typically calls sysSerialHwInit(), which
initialises the hardware-specific fields in the s3c2410x_CHAN structure
(e.g. register I/O addresses etc) before calling s3c2410xDevInit() which
resets the device and installs the driver function pointers.  After
this the UART will be enabled and ready to generate interrupts, but
those interrupts will be disabled in the interrupt controller.

The following example shows the first parts of the initialisation:

.CS
#include "s3c2410xSio.h"

LOCAL s3c2410x_CHAN s3c2410xChan[N_s3c2410x_UART_CHANS];

void sysSerialHwInit (void)
    {
    int i;

    for (i = 0; i < N_s3c2410x_UART_CHANS; i++)
	{
	s3c2410xChan[i].regs = devParas[i].baseAdrs;
	s3c2410xChan[i].baudRate = CONSOLE_BAUD_RATE;
	s3c2410xChan[i].xtal = UART_XTAL_FREQ; 

	s3c2410xChan[i].levelRx = devParas[i].intLevelRx;
	s3c2410xChan[i].levelTx = devParas[i].intLevelTx;

	/@
	 * Initialise driver functions, getTxChar, putRcvChar and
	 * channelMode, then initialise UART
	 @/

	s3c2410xDevInit(&s3c2410xChan[i]);
	}
    }
.CE

The BSP's sysHwInit2() routine typically calls sysSerialHwInit2(),
which connects the chips interrupts via intConnect() (the two
interrupts `s3c2410xIntTx' and `s3c2410xIntRx') and enables those interrupts,
as shown in the following example:

.CS

void sysSerialHwInit2 (void)
    {
    /@ connect and enable Rx interrupt @/

    (void) intConnect (INUM_TO_IVEC(devParas[0].vectorRx),
		       s3c2410xIntRx, (int) &s3c2410xChan[0]);
    intEnable (devParas[0].intLevelRx);


    /@ connect Tx interrupt @/

    (void) intConnect (INUM_TO_IVEC(devParas[0].vectorTx),
		       s3c2410xIntTx, (int) &s3c2410xChan[0]);
    /@
     * There is no point in enabling the Tx interrupt, as it will
     * interrupt immediately and then be disabled.
     @/

    }
.CE

.SH BSP
By convention all the BSP-specific serial initialisation is performed
in a file called sysSerial.c, which is #include'ed by sysLib.c.
sysSerial.c implements at least four functions, sysSerialHwInit()
sysSerialHwInit2(), sysSerialChanGet(), and sysSerialReset(). The first
two have been described above, the others work as follows:

sysSerialChanGet is called by usrRoot to get the serial channel
descriptor associated with a serial channel number. The routine takes a
single parameter which is a channel number ranging between zero and
NUM_TTY. It returns a pointer to the corresponding channel descriptor,
SIO_CHAN *, which is just the address of the s3c2410x_CHAN structure.
 
sysSerialReset is called from sysToMonitor() and should reset the
serial devices to an inactive state (prevent them from generating any
interrupts).

.SH INCLUDE FILES:
drv/sio/s3c2410xSio.h sioLib.h

.SH SEE ALSO:
.I "Advanced RISC Machines s3c2410x UART (AP13) Data Sheet,"
.I "Digital Semiconductor 21285 Core Logic for SA-110 Microprocessor Data
Sheet,"
.I "Digital Semiconductor EBSA-285 Evaluation Board Reference Manual."
*/

#include "vxWorks.h"
#include "intLib.h"
#include "errnoLib.h"
#include "errno.h"
#include "sioLib.h"
#include "s3c2410xSio.h"

/* local defines  */
#define s3c2410x_BAUD_MIN         18
#define s3c2410x_BAUD_MAX         1152000
#define s3c2410x_SIO_DEFAULT_BAUD 1152000


#define rEXTINT0   (*(volatile unsigned *)0x56000088) 
#define rEXTINT1   (*(volatile unsigned *)0x5600008c)
#define rEXTINT2   (*(volatile unsigned *)0x56000090) 


#define rGPGCON    (*(volatile unsigned *)0x56000060) 
#define rGPGDAT    (*(volatile unsigned *)0x56000064) 
#define rGPGUP     (*(volatile unsigned *)0x56000068) 
                        
#define rSRCPND     (*(volatile unsigned *)0x4a000000) 
#define rINTMOD     (*(volatile unsigned *)0x4a000004) 
#define rINTMSK     (*(volatile unsigned *)0x4a000008) 
#define rPRIORITY   (*(volatile unsigned *)0x4a00000c)
#define rINTPND     (*(volatile unsigned *)0x4a000010) 
#define rINTOFFSET  (*(volatile unsigned *)0x4a000014) 
#define rSUBSRCPND  (*(volatile unsigned *)0x4a000018) 
#define rINTSUBMSK  (*(volatile unsigned *)0x4a00001c) 

#define rEINTMASK  (*(volatile unsigned *)0x560000a4) 
#define rEINTPEND  (*(volatile unsigned *)0x560000a8) 




#ifndef s3c2410x_UART_REG
#define s3c2410x_UART_REG(pChan, reg) \
	(*(volatile UINT32 *)((UINT32)(pChan)->regs + (reg)))
#endif

#ifndef s3c2410x_UART_REG_READ
#define s3c2410x_UART_REG_READ(pChan, reg, result) \
	(result) = (s3c2410x_UART_REG(pChan, reg))
#endif

#ifndef s3c2410x_UART_REG_WRITE
#define s3c2410x_UART_REG_WRITE(pChan, reg, data) \
	(s3c2410x_UART_REG(pChan, reg)) = (data)
#endif

#ifndef s3c2410x_UART_REG_BIT_SET
#define s3c2410x_UART_REG_BIT_SET(pChan, reg, data) \
	(s3c2410x_UART_REG(pChan, reg)) |= (data)
#endif

#ifndef s3c2410x_UART_REG_BIT_CLR
#define s3c2410x_UART_REG_BIT_CLR(pChan, reg, data) \
	(s3c2410x_UART_REG(pChan, reg)) &= ~(data)
#endif

/* hardware access methods */
#ifndef s3c2410x_INT_REG_READ
#define s3c2410x_INT_REG_READ(reg,result) \
	((result) = *(volatile UINT32 *)(reg))
#endif

#ifndef s3c2410x_INT_REG_WRITE
#define s3c2410x_INT_REG_WRITE(reg,data) \
	(*((volatile UINT32 *)(reg)) = (data))
#endif
/* locals */

/* function prototypes */

LOCAL STATUS s3c2410xIoctl (SIO_CHAN * pSioChan, int request, int arg);
LOCAL int s3c2410xTxStartup (SIO_CHAN * pSioChan);
LOCAL int s3c2410xCallbackInstall (SIO_CHAN * pSioChan, int callbackType,
				STATUS (*callback)(), void * callbackArg);
LOCAL int s3c2410xPollInput (SIO_CHAN * pSioChan, char *);
LOCAL int s3c2410xPollOutput (SIO_CHAN * pSioChan, char);

LOCAL STATUS s3c2410xDummyCallback (void);

/* driver functions */

LOCAL SIO_DRV_FUNCS s3c2410xSioDrvFuncs =
	{
		(int (*)())s3c2410xIoctl,
		s3c2410xTxStartup,
		(int (*)())s3c2410xCallbackInstall,
		s3c2410xPollInput,
		s3c2410xPollOutput
	};

/*
 * s3c2410xDummyCallback - dummy callback routine.
 *
 * RETURNS: ERROR, always.
 */

LOCAL STATUS s3c2410xDummyCallback (void)
{
	return ERROR;
}
/*
 * s3c2410xInitChannel - initialise UART
 *
 * This routine performs hardware initialisation of the UART channel.
 *
 * RETURNS: N/A
 */

LOCAL void s3c2410xInitChannel
	(
		s3c2410x_CHAN *	pChan	/* ptr to s3c2410x_CHAN describing this channel */
	)
{
	UINT32	tempUINT32;

	/* Set UCLK, polling&interrupt mode. */
	s3c2410x_UART_REG_WRITE(pChan, OFFSET_UCON, CLK_PCLK+TxMode_IntPoll+RxMode_IntPoll);




      rGPGCON = 0x00000000;	
      rEXTINT1 = 0x11111140; 
      rEINTMASK=(rEINTMASK&(~( 1<<9) ));
      rGPGCON = 0x0000000a; 
 
     

	/* enable subInterrupt for UART0. */
	s3c2410x_INT_REG_READ(s3c2410x_INT_CSR_INTSUBMSK,tempUINT32);
	switch((int)(pChan->regs))
	{
	case UART_1_BASE_ADR:
		tempUINT32 &= ~((1<<SUBINT_LVL_RXD1)|(1<<SUBINT_LVL_TXD1));
		break;
	case UART_0_BASE_ADR:
	default:
		tempUINT32 &= ~((1<<SUBINT_LVL_RXD0)|(1<<SUBINT_LVL_TXD0));
	}
	s3c2410x_INT_REG_WRITE(s3c2410x_INT_CSR_INTSUBMSK,tempUINT32);

	/* Set baud rate to 9600. */
	s3c2410xIoctl((SIO_CHAN *)pChan, SIO_BAUD_SET, s3c2410x_SIO_DEFAULT_BAUD);

	/* Set NonInfra-red mode, 8, N, 1. */
	s3c2410xIoctl((SIO_CHAN *)pChan, SIO_HW_OPTS_SET, CLOCAL+CS8);

	s3c2410xIoctl((SIO_CHAN *)pChan, SIO_MODE_SET, SIO_MODE_POLL);

	/* Set disable FIFO */
	s3c2410x_UART_REG_WRITE(pChan, OFFSET_UFCON, FIFO_OFF);

	/* Enable pin for UART */
	s3c2410x_IO_READ(rGPHCON, tempUINT32);
	switch((int)(pChan->regs))
	{
	case UART_1_BASE_ADR:
		tempUINT32 |= (MASK_GPH4(2)+MASK_GPH5(2)+MASK_GPH6(3)+MASK_GPH7(3)); /* +MASK_GPH8(2)); */
		break;
	case UART_0_BASE_ADR:
	default:
		tempUINT32 |= (MASK_GPH0(2)+MASK_GPH1(2)+MASK_GPH2(2)+MASK_GPH3(2)); /* +MASK_GPH8(2)); */
	}
	s3c2410x_IO_WRITE(rGPHCON,tempUINT32);
	
	/* Clear Rx */
	s3c2410x_UART_REG_READ(pChan, OFFSET_URXH, tempUINT32);
}
/*
 * s3c2410xSioDevInit - initialise an s3c2410x channel
 *
 * This routine initialises some SIO_CHAN function pointers and then resets
 * the chip to a quiescent state.  Before this routine is called, the BSP
 * must already have initialised all the device addresses, etc. in the
 * s3c2410x_CHAN structure.
 *
 * RETURNS: N/A
 */

void s3c2410xSioDevInit
	(
		s3c2410x_CHAN *	pChan	/* ptr to s3c2410x_CHAN describing this channel */
	)
{
	int oldlevel = intLock();

	/* initialise the driver function pointers in the SIO_CHAN */
	pChan->sio.pDrvFuncs = &s3c2410xSioDrvFuncs;


	/* set the non BSP-specific constants */
	pChan->getTxChar = s3c2410xDummyCallback;
	pChan->putRcvChar = s3c2410xDummyCallback;

	pChan->channelMode = 0;    /* undefined */


	/* initialise the chip */
	s3c2410xInitChannel(pChan);

	intUnlock(oldlevel);
}



/*
 * s3c2410xIoctl - special device control
 *
 * This routine handles the IOCTL messages from the user.
 *
 * RETURNS: OK on success, ENOSYS on unsupported request, EIO on failed
 * request.
 */

LOCAL int s3c2410xIoctl
	(
		SIO_CHAN*	pSioChan,	/* device to control */
    		int		request,	/* request code */
    		int		arg
	)
{
	s3c2410x_CHAN *pChan = (s3c2410x_CHAN*) pSioChan;
	int oldlevel;        /* current interrupt level mask */
	UINT32 tempUINT32 = 0;