?? main.lst
字號:
__start:
__text_start:
001D EFCF LDI R28,0xFF
001E E0D2 LDI R29,2
001F BFCD OUT 0x3D,R28
0020 BFDE OUT 0x3E,R29
0021 51C0 SUBI R28,0x10
0022 40D0 SBCI R29,0
0023 EA0A LDI R16,0xAA
0024 8308 STD Y+0,R16
0025 2400 CLR R0
0026 E0E0 LDI R30,0
0027 E0F1 LDI R31,1
0028 E011 LDI R17,1
0029 30E0 CPI R30,0
002A 07F1 CPC R31,R17
002B F011 BEQ 0x002E
002C 9201 ST R0,Z+
002D CFFB RJMP 0x0029
002E 8300 STD Z+0,R16
002F E3EA LDI R30,0x3A
0030 E0F0 LDI R31,0
0031 E0A0 LDI R26,0
0032 E0B1 LDI R27,1
0033 E010 LDI R17,0
0034 33EA CPI R30,0x3A
0035 07F1 CPC R31,R17
0036 F021 BEQ 0x003B
0037 95C8 LPM
0038 9631 ADIW R30,1
0039 920D ST R0,X+
003A CFF9 RJMP 0x0034
003B D03B RCALL _main
_exit:
003C CFFF RJMP _exit
_spisend:
i --> R20
data --> R16
003D D093 RCALL push_gset1
FILE: E:\avr_first\spi.c
(0001) #include <iom48v.h>
(0002) #include <macros.h>
(0003)
(0004) #define uint unsigned int
(0005) #define ulong unsigned long
(0006) #define uchar unsigned char
(0007)
(0008) #define clk PD0//AD_clk
(0009) #define data_IO PD1//AD數據輸入輸出口
(0010) #define cs PD2//AD片選
(0011)
(0012) #define IO_DDR DDD1//數據讀入讀出口
(0013)
(0014) #define IO_PIN PIND
(0015)
(0016) //#define clk_s PD3
(0017) //#define ss_s PD4
(0018) //#define data_s PD5
(0019) //#define data_sPIN PIND5
(0020) //#define data_sDDR DDD5
(0021)
(0022)
(0023)
(0024)
(0025) void spisend(uchar data)//寫入
(0026) {
(0027) uchar i;
(0028) //IO_DDR=1;
(0029) DDRD |= 0x02;
003E 9A51 SBI 0x0A,1
(0030) //clk=0;
(0031) PORTD &= 0xfe;
003F B18B IN R24,0x0B
0040 7F8E ANDI R24,0xFE
0041 B98B OUT 0x0B,R24
(0032) for(i=8;i>0;i--)
0042 E048 LDI R20,0x8
0043 C010 RJMP 0x0054
(0033) {
(0034) if ((data&0x01)==1)
0044 2F80 MOV R24,R16
0045 7081 ANDI R24,1
0046 3081 CPI R24,1
0047 F411 BNE 0x004A
(0035) {
(0036) //data_IO=1;
(0037) PORTD |= 0x02;
0048 9A59 SBI 0x0B,1
(0038) }
0049 C003 RJMP 0x004D
(0039) else
(0040) //data_IO=0;
(0041) PORTD &= 0xFD;
004A B18B IN R24,0x0B
004B 7F8D ANDI R24,0xFD
004C B98B OUT 0x0B,R24
(0042) _NOP();
004D 0000 NOP
(0043) //clk=1;
(0044) PORTD |= 0x01;
004E 9A58 SBI 0x0B,0
(0045) //_NOP();
(0046) //clk=0;
(0047) PORTD &= 0xfe;
004F B18B IN R24,0x0B
0050 7F8E ANDI R24,0xFE
0051 B98B OUT 0x0B,R24
(0048) data>>=1;//右移一位
0052 9506 LSR R16
0053 954A DEC R20
0054 2422 CLR R2
0055 1624 CP R2,R20
0056 F368 BCS 0x0044
0057 D07C RCALL pop_gset1
0058 9508 RET
_spiread:
data --> R20
temp --> R22
i --> R10
0059 D073 RCALL push_gset3
(0049) }
(0050) }
(0051)
(0052) uchar spiread(void) //讀取
(0053) {
(0054) uchar i;
(0055) uchar data=0x00;
005A 2744 CLR R20
(0056) uchar temp;
(0057) //IO_DDR=0; //IO口作為輸入,DDR要寫0
(0058) DDRD &= 0xfd;
005B B18A IN R24,0x0A
005C 7F8D ANDI R24,0xFD
005D B98A OUT 0x0A,R24
(0059) //ss_r=0;
(0060) //clk=0;
(0061) PORTD &= 0xfe;
005E B18B IN R24,0x0B
005F 7F8E ANDI R24,0xFE
0060 B98B OUT 0x0B,R24
(0062) for(i=0;i<8;i++)
0061 24AA CLR R10
0062 C00C RJMP 0x006F
(0063) {
(0064) //clk=1;
(0065) PORTD |= 0x01;
0063 9A58 SBI 0x0B,0
(0066) //clk=0;
(0067) PORTD &= 0xfe;
0064 B18B IN R24,0x0B
0065 7F8E ANDI R24,0xFE
0066 B98B OUT 0x0B,R24
(0068) temp=IO_PIN;
0067 B169 IN R22,0x09
(0069) if (temp&0x02) //下降沿采集數據,調換則會出錯
0068 FF61 SBRS R22,1
0069 C004 RJMP 0x006E
(0070) data|=(0x01<<i);
006A E001 LDI R16,1
006B 2D1A MOV R17,R10
006C D07B RCALL lsl8
006D 2B40 OR R20,R16
006E 94A3 INC R10
006F 2D8A MOV R24,R10
0070 3088 CPI R24,0x8
0071 F388 BCS 0x0063
(0071) }
(0072) //IO_DDR=1;
(0073) DDRD |= 0x02;
0072 9A51 SBI 0x0A,1
(0074) //ss_r=1; //讀完數據后,SS拉高,同時時鐘拉高一次,上升沿重新置數
(0075) // clk=1;
(0076) PORTD |= 0x01;
0073 9A58 SBI 0x0B,0
(0077) return(data);
0074 2F04 MOV R16,R20
0075 D051 RCALL pop_gset3
0076 9508 RET
_main:
data --> Y+2
instrution --> Y+0
j --> R20
i --> R22
spidata --> Y+6
0077 9726 SBIW R28,6
(0078) }
(0079)
(0080) void main(ulong spidata)
(0081) {
(0082) uint i,j;
(0083) uchar data[4]={0,0,0,0};
0078 E384 LDI R24,0x34
0079 E090 LDI R25,0
007A 01FE MOVW R30,R28
007B 9632 ADIW R30,2
007C E004 LDI R16,4
007D E010 LDI R17,0
007E 93FA ST R31,-Y
007F 93EA ST R30,-Y
0080 939A ST R25,-Y
0081 938A ST R24,-Y
0082 D06B RCALL asgncblk
(0084) uchar instrution[2]={0,0};
0083 E388 LDI R24,0x38
0084 E090 LDI R25,0
0085 01FE MOVW R30,R28
0086 E002 LDI R16,2
0087 E010 LDI R17,0
0088 93FA ST R31,-Y
0089 93EA ST R30,-Y
008A 939A ST R25,-Y
008B 938A ST R24,-Y
008C D061 RCALL asgncblk
(0085) /*PORTA="0x00"; //燈指示
(0086) DDRA="0XFF";
(0087)
(0088) PORTB="0x00";//0101 0000
(0089) DDRB="0x07";//0000 0111接口作為模擬SPI口輸出接口要寫1
(0090)
(0091) PORTC="0x00";
(0092) DDRC="0x80";
(0093)
(0094) DDRD="0xff";//0000 0001
(0095) PORTD="0x00";*///0100 1000
(0096) //cs = 0;
(0097) PORTD &= 0xfc;
008D B18B IN R24,0x0B
008E 7F8C ANDI R24,0xFC
008F B98B OUT 0x0B,R24
(0098) for(i=0;i<2;i++)
0090 2766 CLR R22
0091 2777 CLR R23
0092 C008 RJMP 0x009B
(0099) {
(0100) spisend(instrution[i]);
0093 01CE MOVW R24,R28
0094 01FB MOVW R30,R22
0095 0FE8 ADD R30,R24
0096 1FF9 ADC R31,R25
0097 8100 LDD R16,Z+0
0098 DFA4 RCALL _spisend
0099 5F6F SUBI R22,0xFF
009A 4F7F SBCI R23,0xFF
009B 3062 CPI R22,2
009C E0E0 LDI R30,0
009D 077E CPC R23,R30
009E F3A0 BCS 0x0093
(0101) }
(0102) if(instrution[0]&0x8000)
009F 8028 LDD R2,Y+0
00A0 2433 CLR R3
00A1 FE37 SBRS R3,7
00A2 C011 RJMP 0x00B4
(0103) {
(0104) for(j=0;j<4;j++)
00A3 2744 CLR R20
00A4 2755 CLR R21
00A5 C009 RJMP 0x00AF
(0105) {
(0106) data[j]=spiread();
00A6 DFB2 RCALL _spiread
00A7 01CE MOVW R24,R28
00A8 9602 ADIW R24,2
00A9 01FA MOVW R30,R20
00AA 0FE8 ADD R30,R24
00AB 1FF9 ADC R31,R25
00AC 8300 STD Z+0,R16
00AD 5F4F SUBI R20,0xFF
00AE 4F5F SBCI R21,0xFF
00AF 3044 CPI R20,4
00B0 E0E0 LDI R30,0
00B1 075E CPC R21,R30
00B2 F398 BCS 0x00A6
(0107) }
(0108) }
00B3 C010 RJMP 0x00C4
(0109) else {
(0110) for(j=0;j<4;j++)
00B4 2744 CLR R20
00B5 2755 CLR R21
00B6 C009 RJMP 0x00C0
(0111) {
(0112) spisend(data[i]);
00B7 01CE MOVW R24,R28
00B8 9602 ADIW R24,2
00B9 01FB MOVW R30,R22
00BA 0FE8 ADD R30,R24
00BB 1FF9 ADC R31,R25
00BC 8100 LDD R16,Z+0
00BD DF7F RCALL _spisend
00BE 5F4F SUBI R20,0xFF
00BF 4F5F SBCI R21,0xFF
00C0 3044 CPI R20,4
00C1 E0E0 LDI R30,0
00C2 075E CPC R21,R30
00C3 F398 BCS 0x00B7
(0113) }
(0114) }
(0115) // cs = 1;
(0116) PORTD |= 0x40;
FILE: <library>
00C4 9A5E SBI 0x0B,6
00C5 9626 ADIW R28,6
00C6 9508 RET
pop_gset3:
00C7 E0E4 LDI R30,4
00C8 C00C RJMP pop
push_gset5:
00C9 92FA ST R15,-Y
00CA 92EA ST R14,-Y
push_gset4:
00CB 92DA ST R13,-Y
00CC 92CA ST R12,-Y
push_gset3:
00CD 92BA ST R11,-Y
00CE 92AA ST R10,-Y
push_gset2:
00CF 937A ST R23,-Y
00D0 936A ST R22,-Y
push_gset1:
00D1 935A ST R21,-Y
00D2 934A ST R20,-Y
00D3 9508 RET
pop_gset1:
00D4 E0E1 LDI R30,1
pop:
00D5 9149 LD R20,Y+
00D6 9159 LD R21,Y+
00D7 FDE0 SBRC R30,0
00D8 9508 RET
00D9 9169 LD R22,Y+
00DA 9179 LD R23,Y+
00DB FDE1 SBRC R30,1
00DC 9508 RET
00DD 90A9 LD R10,Y+
00DE 90B9 LD R11,Y+
00DF FDE2 SBRC R30,2
00E0 9508 RET
00E1 90C9 LD R12,Y+
00E2 90D9 LD R13,Y+
00E3 FDE3 SBRC R30,3
00E4 9508 RET
00E5 90E9 LD R14,Y+
00E6 90F9 LD R15,Y+
00E7 9508 RET
lsl8:
00E8 2311 TST R17
00E9 F019 BEQ 0x00ED
00EA 0F00 LSL R16
00EB 951A DEC R17
00EC CFFB RJMP lsl8
00ED 9508 RET
asgncblk:
00EE 93AA ST R26,-Y
00EF 93BA ST R27,-Y
00F0 93EA ST R30,-Y
00F1 93FA ST R31,-Y
00F2 920A ST R0,-Y
00F3 81AF LDD R26,Y+7
00F4 85B8 LDD R27,Y+8
00F5 81ED LDD R30,Y+5
00F6 81FE LDD R31,Y+6
00F7 3000 CPI R16,0
00F8 0701 CPC R16,R17
00F9 F031 BEQ 0x0100
00FA 95C8 LPM
00FB 920D ST R0,X+
00FC 9631 ADIW R30,1
00FD 5001 SUBI R16,1
00FE 4010 SBCI R17,0
00FF CFF7 RJMP 0x00F7
0100 9009 LD R0,Y+
0101 91F9 LD R31,Y+
0102 91E9 LD R30,Y+
0103 91B9 LD R27,Y+
0104 91A9 LD R26,Y+
0105 9624 ADIW R28,4
0106 9508 RET
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