?? welcome.msa
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//************************************************************
//* Project：SDK30 標準MP3-上電歡迎程序 *
//* File：welcome.msa *
//* SoftWare Engineer：jmzhang *
//* 2005-5-31 13:46 Version： 1.0 *
//* Actions Semiconductor Co., Ltd *
//* Function Description： *
//* History Record： *
//************************************************************
#include "UI_S0724.h"
name Welcome
public DispStarting
#define InitClear 132
rseg CODEDISPSTART
DispStarting: //使LCM的Reset Pin 有效
// ld (welcomeNum),a
// cp 0
// jr z,FirstGowelcome
// jr SecondGowelcome
//FirstGowelcome:
// ret //第一次進入//The first enter
//
//SecondGowelcome: //第二次進入 //The second enter
in a,(0x05)
ld b,a
or 07h
out (0x05),a
in a,(0x70)
ld c,a
set 5,a
set 4,a
out (0x70),a
ld a,b //切完IO才有RAM保存
ld (IO05Bak),a //變量區
ld a,c
ld (IO70Bak),a //變量區
in a,(0xee) //F1:GIO
and 1fh
or 0x08
out (0xee),a
//******************************** Port configuration***************************
in a,(LCMRST_GIO_EN_REG) //set GPIO_b0(Oled_RST) to Output Port.
or LCMRST_SET_BIT
out (LCMRST_GIO_EN_REG),a
in a,(LCMA0_GIO_EN_REG) //set GPIO_B2(Oled_A0) to Output Port.
or LCMA0_SET_BIT
out (LCMA0_GIO_EN_REG),a
// in a,(LCMBL_GIO_EN_REG) //set GPIO_B4(Oled_BackLightPower) to Output Port.
// or LCMBL_SET_BIT
// out (LCMBL_GIO_EN_REG),a
// in a,(0f3h)
// or 08h
// out (0f3h),a
//
// in a,(0f4h)
// or 08h
// out (0f4h),a
// in a,(LCMBL_GIO_DATA_REG)
// or LCMBL_SET_BIT
// out (LCMBL_GIO_DATA_REG),a
//***********reset S6B0724******************************
in a,(REG02_EMHiPageReg) //REG02 保存
ld (REG02_Buff),a
ld a,0x18
out (REG02_EMHiPageReg),a //enable ce3 and clear CS1B
ld c,LCMRST_SET_BIT
ld d,LCMRST_CLR_BIT
in a,(LCMRST_GIO_DATA_REG)
or c
out (LCMRST_GIO_DATA_REG),a //RESET pin high
out (LCMRST_GIO_DATA_REG),a //Delay
out (LCMRST_GIO_DATA_REG),a //Delay
and d
out (LCMRST_GIO_DATA_REG),a //RESET pin low
out (LCMRST_GIO_DATA_REG),a //Delay
out (LCMRST_GIO_DATA_REG),a //Delay
out (LCMRST_GIO_DATA_REG),a //Delay
out (LCMRST_GIO_DATA_REG),a //Delay
or c
out (LCMRST_GIO_DATA_REG),a //RESET pin high
out (LCMRST_GIO_DATA_REG),a //Delay
out (LCMRST_GIO_DATA_REG),a //Delay
//************** Initial configure
ld c,0xa2 //bias select 1/6
call sUI_CmdTrans
ld c,0xa1 //ADC select(s131-s36)
call sUI_CmdTrans
ld c,0xc0 //SHL select(com0-com31)
call sUI_CmdTrans
ld c,0x27 //1+Ra/Rb=4
call sUI_CmdTrans
ld c,0x81
call sUI_CmdTrans
ld a,0x0c//(ContrastSelect)
ld c,a
call sUI_CmdTrans ////set reference voltage register,確定電壓:5.3v
ld c,0x2f
call sUI_CmdTrans
ld c,0xaf //display on
call sUI_CmdTrans
ld c,0xa4 //entire display off
call sUI_CmdTrans
//******************************** First clear screen **************************
ld c,0xb0 //Page address set:page 0
call sUI_CmdTrans
ld c,0x10 //Column address set upper bit:0
call sUI_CmdTrans
ld c,0x00 //Column address set lower bit:0
call sUI_CmdTrans
ld b,InitClear
in a,(A0_GIO_DATA_REG)
or A0_SET_BIT
out (A0_GIO_DATA_REG),a //A0=1;Data bits:data
xor a
Clearline0_Cycle:
ld (0x8001),a
djnz Clearline0_Cycle
ld c,0xb1 //Page address set:page 1
call sUI_CmdTrans
ld c,0x10
call sUI_CmdTrans
ld c,0x0
call sUI_CmdTrans
ld b,InitClear
ld b,InitClear
in a,(A0_GIO_DATA_REG)
or A0_SET_BIT
out (A0_GIO_DATA_REG),a //A0=1;Data bits:data
xor a
Clearline1_Cycle:
ld (0x8001),a
djnz Clearline1_Cycle
ld c,0xb2 //Page address set:page 2
call sUI_CmdTrans
ld c,0x10
call sUI_CmdTrans
ld c,0x00
call sUI_CmdTrans
ld b,InitClear
in a,(A0_GIO_DATA_REG) //A0=1;Data bits:data
or A0_SET_BIT
out (A0_GIO_DATA_REG),a
xor a
Clearline2_Cycle:
ld (0x8001),a
djnz Clearline2_Cycle
ld c,0xb3 //Page address set:page 3
call sUI_CmdTrans
ld c,0x10
call sUI_CmdTrans
ld c,0x0
call sUI_CmdTrans
ld b,InitClear
in a,(A0_GIO_DATA_REG) //A0=1;Data bits:data
or A0_SET_BIT
out (A0_GIO_DATA_REG),a
xor a
Clearline3_Cycle:
ld (0x8001),a
djnz Clearline3_Cycle
in a,(4eh)
or 0x08
out (4eh),a //清除WATCHDOG
ld a,5
ld (UpdPgNum),a
ld b,128
ld c,0xb0
ld hl,DisplayBuffer
lsUpdLoop:
call sUpdOnePage //輸入參數 b=長度,c=Page選擇,hl=Buffer地址
inc c //c=Page選擇
ld a,(UpdPgNum)
dec a
ld (UpdPgNum),a
jr nz,lsUpdLoop
// in a,(4eh)
// or 0x08
// out (4eh),a //清除WATCHDOG
//
// ld c,DisplayOnReg //LCD display on
// call sUI_CmdTrans
ld a,(REG02_Buff)
out (REG02_EMHiPageReg),a //CE 恢復
ld a,(IO05Bak)
ld b,a
ld a,(IO70Bak)
out (0x70),a
ld a,b
out (0x05),a
ret
//********************************************************
sUpdOnePage: //輸入參數 b=長度,c=Page選擇,hl=Buffer地址
push bc
call sUI_CmdTrans
ld c,0x10
call sUI_CmdTrans
ld c,0
call sUI_CmdTrans
call sUI_TransPage
pop bc
ret
//********************************************************
/*
** FUNCTION: sUI_CmdTrans
** PURPOSE: Trasnport one Byte CMD data to S6B0724
** PARAMETERS: 動到寄存器A
** input---none
** output---none
** DESCRIPTION: 注意這里的函數和硬件外圍I/O分配關系密切，改動時要小心
*/
//********************************************************
sUI_CmdTrans:
push bc
in a,(LCMA0_GIO_DATA_REG) //LCM A0=0; for s2 by ccm
and LCMA0_CLR_BIT
out (LCMA0_GIO_DATA_REG),a
ld a,c
ld (0x8000),a
pop bc
ret
//******************************************************
sUI_TransPage:
in a,(LCMA0_GIO_DATA_REG) //LCM A0=1; for s2 by ccm
or LCMA0_SET_BIT
out (LCMA0_GIO_DATA_REG),a
sUI_TransPage1:
ld a,(hl)
ld (0x8001),a
inc hl
djnz sUI_TransPage1
ret
//****************************************************************8
DisplayBuffer:
defb 0x00,0x00,0x00,0x08,0xf8,0x08,0x08,0x18,0x00,0x70,0x88,0x88,0x88,0x70,0x00,0x10
defb 0xa8,0xa8,0xf8,0x08,0x00,0x00,0x70,0x88,0x88,0xf8,0x08,0x00,0x88,0xf8,0x08,0x00
defb 0x00,0x88,0xf8,0x88,0x80,0xf8,0x08,0x00,0xfe,0xaa,0xea,0x8e,0x00,0x00,0x18,0x00
defb 0x00,0x00,0x00,0x00,0x18,0x00,0x00,0x00,0x00,0x00,0x18,0x00,0x00,0x00,0x00,0x00
defb 0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
defb 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
defb 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
defb 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
defb 0x00,0x00,0x00,0x02,0x03,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
defb 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x03,0x00,0x00,0x00,0x02,0x00,0x00
defb 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
defb 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
defb 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
defb 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
defb 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
defb 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
defb 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
defb 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
defb 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
defb 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
defb 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
defb 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
defb 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
defb 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
defb 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
defb 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
defb 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
defb 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
defb 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
defb 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
defb 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
defb 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
IO05Bak defb 0 //1Byte
IO70Bak defb 0 //1Byte
IOeeBak defb 0 //1Byte
REG02_Buff defb 0
welcomeNum defb 0
UpdPgNum defb 4
welcomestringstart:
welcomestring: //"Starting..."
defb 62h,92h,92h,92h,8ch,0 //S
defb 20h,0fch,22h,02h,04h,0 //t
defb 04h,2ah,2ah,2ah,1eh,0 //a
defb 3eh,10h,20h,20h,10h,0 //r
defb 20h,0fch,22h,02h,04h,0 //t
defb 0,22h,0beh,02h,0,0 //i
defb 3eh,10h,20h,20h,1eh,0 //n
defb 30h,4ah,4ah,4ah,7ch,0 //g
defb 0,06h,06h,0,0,0 //.
defb 0,06h,06h,0,0,0 //.
defb 0,06h,06h,0,0,0 //.
welcomestringend:
end
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