/* * Universal Host Controller Interface driver for USB. * * Maintainer: Alan Stern <stern@rowland.harvard.edu> * * (C) Copyright 1999 Linus Torvalds * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com * (C) Copyright 1999 Randy Dunlap * (C) Copyright 1999 Georg Acher, acher@in.tum.de * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface *               support from usb-ohci.c by Adam Richter, adam@yggdrasil.com). * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c) * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu * * Intel documents this fairly well, and as far as I know there * are no royalties or anything like that, but even so there are * people who decided that they want to do the same thing in a * completely different way. * */#include <linux/module.h>#include <linux/pci.h>#include <linux/kernel.h>#include <linux/init.h>#include <linux/delay.h>#include <linux/ioport.h>#include <linux/slab.h>#include <linux/errno.h>#include <linux/unistd.h>#include <linux/interrupt.h>#include <linux/spinlock.h>#include <linux/debugfs.h>#include <linux/pm.h>#include <linux/dmapool.h>#include <linux/dma-mapping.h>#include <linux/usb.h>#include <linux/bitops.h>#include <linux/dmi.h>#include <asm/uaccess.h>#include <asm/io.h>#include <asm/irq.h>#include <asm/system.h>#include "../core/hcd.h"#include "uhci-hcd.h"#include "pci-quirks.h"/* * Version Information */#define DRIVER_VERSION "v3.0"#define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \Alan Stern"#define DRIVER_DESC "USB Universal Host Controller Interface driver"/* for flakey hardware, ignore overcurrent indicators */static int ignore_oc;module_param(ignore_oc, bool, S_IRUGO);MODULE_PARM_DESC(ignore_oc, "ignore hardware overcurrent indications");/* * debug = 0, no debugging messages * debug = 1, dump failed URBs except for stalls * debug = 2, dump all failed URBs (including stalls) *            show all queues in /debug/uhci/[pci_addr] * debug = 3, show all TDs in URBs when dumping */#ifdef DEBUG#define DEBUG_CONFIGURED	1static int debug = 1;module_param(debug, int, S_IRUGO | S_IWUSR);MODULE_PARM_DESC(debug, "Debug level");#else#define DEBUG_CONFIGURED	0#define debug			0#endifstatic char *errbuf;#define ERRBUF_LEN    (32 * 1024)static struct kmem_cache *uhci_up_cachep;	/* urb_priv */static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state);static void wakeup_rh(struct uhci_hcd *uhci);static void uhci_get_current_frame_number(struct uhci_hcd *uhci);/* * Calculate the link pointer DMA value for the first Skeleton QH in a frame. */static __le32 uhci_frame_skel_link(struct uhci_hcd *uhci, int frame){	int skelnum;	/*	 * The interrupt queues will be interleaved as evenly as possible.	 * There's not much to be done about period-1 interrupts; they have	 * to occur in every frame.  But we can schedule period-2 interrupts	 * in odd-numbered frames, period-4 interrupts in frames congruent	 * to 2 (mod 4), and so on.  This way each frame only has two	 * interrupt QHs, which will help spread out bandwidth utilization.	 *	 * ffs (Find First bit Set) does exactly what we need:	 * 1,3,5,...  => ffs = 0 => use period-2 QH = skelqh[8],	 * 2,6,10,... => ffs = 1 => use period-4 QH = skelqh[7], etc.	 * ffs >= 7 => not on any high-period queue, so use	 *	period-1 QH = skelqh[9].	 * Add in UHCI_NUMFRAMES to insure at least one bit is set.	 */	skelnum = 8 - (int) __ffs(frame | UHCI_NUMFRAMES);	if (skelnum <= 1)		skelnum = 9;	return LINK_TO_QH(uhci->skelqh[skelnum]);}#include "uhci-debug.c"#include "uhci-q.c"#include "uhci-hub.c"/* * Finish up a host controller reset and update the recorded state. */static void finish_reset(struct uhci_hcd *uhci){	int port;	/* HCRESET doesn't affect the Suspend, Reset, and Resume Detect	 * bits in the port status and control registers.	 * We have to clear them by hand.	 */	for (port = 0; port < uhci->rh_numports; ++port)		outw(0, uhci->io_addr + USBPORTSC1 + (port * 2));	uhci->port_c_suspend = uhci->resuming_ports = 0;	uhci->rh_state = UHCI_RH_RESET;	uhci->is_stopped = UHCI_IS_STOPPED;	uhci_to_hcd(uhci)->state = HC_STATE_HALT;	uhci_to_hcd(uhci)->poll_rh = 0;	uhci->dead = 0;		/* Full reset resurrects the controller */}/* * Last rites for a defunct/nonfunctional controller * or one we don't want to use any more. */static void uhci_hc_died(struct uhci_hcd *uhci){	uhci_get_current_frame_number(uhci);	uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr);	finish_reset(uhci);	uhci->dead = 1;	/* The current frame may already be partway finished */	++uhci->frame_number;}/* * Initialize a controller that was newly discovered or has lost power * or otherwise been reset while it was suspended.  In none of these cases * can we be sure of its previous state. */static void check_and_reset_hc(struct uhci_hcd *uhci){	if (uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr))		finish_reset(uhci);}/* * Store the basic register settings needed by the controller. */static void configure_hc(struct uhci_hcd *uhci){	/* Set the frame length to the default: 1 ms exactly */	outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF);	/* Store the frame list base address */	outl(uhci->frame_dma_handle, uhci->io_addr + USBFLBASEADD);	/* Set the current frame number */	outw(uhci->frame_number & UHCI_MAX_SOF_NUMBER,			uhci->io_addr + USBFRNUM);	/* Mark controller as not halted before we enable interrupts */	uhci_to_hcd(uhci)->state = HC_STATE_SUSPENDED;	mb();	/* Enable PIRQ */	pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,			USBLEGSUP_DEFAULT);}static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci){	int port;	/* If we have to ignore overcurrent events then almost by definition	 * we can't depend on resume-detect interrupts. */	if (ignore_oc)		return 1;	switch (to_pci_dev(uhci_dev(uhci))->vendor) {	    default:		break;	    case PCI_VENDOR_ID_GENESYS:		/* Genesys Logic's GL880S controllers don't generate		 * resume-detect interrupts.		 */		return 1;	    case PCI_VENDOR_ID_INTEL:		/* Some of Intel's USB controllers have a bug that causes		 * resume-detect interrupts if any port has an over-current		 * condition.  To make matters worse, some motherboards		 * hardwire unused USB ports' over-current inputs active!		 * To prevent problems, we will not enable resume-detect		 * interrupts if any ports are OC.		 */		for (port = 0; port < uhci->rh_numports; ++port) {			if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &					USBPORTSC_OC)				return 1;		}		break;	}	return 0;}static int remote_wakeup_is_broken(struct uhci_hcd *uhci){	int port;	char *sys_info;	static char bad_Asus_board[] = "A7V8X";	/* One of Asus's motherboards has a bug which causes it to	 * wake up immediately from suspend-to-RAM if any of the ports	 * are connected.  In such cases we will not set EGSM.	 */	sys_info = dmi_get_system_info(DMI_BOARD_NAME);	if (sys_info && !strcmp(sys_info, bad_Asus_board)) {		for (port = 0; port < uhci->rh_numports; ++port) {			if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &					USBPORTSC_CCS)				return 1;		}	}	return 0;}static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state)__releases(uhci->lock)__acquires(uhci->lock){	int auto_stop;	int int_enable, egsm_enable;	auto_stop = (new_state == UHCI_RH_AUTO_STOPPED);	dev_dbg(&uhci_to_hcd(uhci)->self.root_hub->dev,			"%s%s\n", __FUNCTION__,			(auto_stop ? " (auto-stop)" : ""));	/* If we get a suspend request when we're already auto-stopped	 * then there's nothing to do.	 */	if (uhci->rh_state == UHCI_RH_AUTO_STOPPED) {		uhci->rh_state = new_state;		return;	}	/* Enable resume-detect interrupts if they work.	 * Then enter Global Suspend mode if _it_ works, still configured.	 */	egsm_enable = USBCMD_EGSM;	uhci->working_RD = 1;	int_enable = USBINTR_RESUME;	if (remote_wakeup_is_broken(uhci))		egsm_enable = 0;	if (resume_detect_interrupts_are_broken(uhci) || !egsm_enable ||			!device_may_wakeup(				&uhci_to_hcd(uhci)->self.root_hub->dev))		uhci->working_RD = int_enable = 0;	outw(int_enable, uhci->io_addr + USBINTR);	outw(egsm_enable | USBCMD_CF, uhci->io_addr + USBCMD);	mb();	udelay(5);	/* If we're auto-stopping then no devices have been attached	 * for a while, so there shouldn't be any active URBs and the	 * controller should stop after a few microseconds.  Otherwise	 * we will give the controller one frame to stop.	 */	if (!auto_stop && !(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) {		uhci->rh_state = UHCI_RH_SUSPENDING;		spin_unlock_irq(&uhci->lock);		msleep(1);		spin_lock_irq(&uhci->lock);		if (uhci->dead)			return;	}	if (!(inw(uhci->io_addr + USBSTS) & USBSTS_HCH))		dev_warn(&uhci_to_hcd(uhci)->self.root_hub->dev,			"Controller not stopped yet!\n");	uhci_get_current_frame_number(uhci);	uhci->rh_state = new_state;	uhci->is_stopped = UHCI_IS_STOPPED;	uhci_to_hcd(uhci)->poll_rh = !int_enable;	uhci_scan_schedule(uhci);	uhci_fsbr_off(uhci);}static void start_rh(struct uhci_hcd *uhci){	uhci_to_hcd(uhci)->state = HC_STATE_RUNNING;	uhci->is_stopped = 0;	/* Mark it configured and running with a 64-byte max packet.	 * All interrupts are enabled, even though RESUME won't do anything.	 */	outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD);	outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP,			uhci->io_addr + USBINTR);	mb();	uhci->rh_state = UHCI_RH_RUNNING;	uhci_to_hcd(uhci)->poll_rh = 1;}static void wakeup_rh(struct uhci_hcd *uhci)__releases(uhci->lock)__acquires(uhci->lock){	dev_dbg(&uhci_to_hcd(uhci)->self.root_hub->dev,			"%s%s\n", __FUNCTION__,			uhci->rh_state == UHCI_RH_AUTO_STOPPED ?				" (auto-start)" : "");	/* If we are auto-stopped then no devices are attached so there's	 * no need for wakeup signals.  Otherwise we send Global Resume	 * for 20 ms.	 */	if (uhci->rh_state == UHCI_RH_SUSPENDED) {		uhci->rh_state = UHCI_RH_RESUMING;		outw(USBCMD_FGR | USBCMD_EGSM | USBCMD_CF,				uhci->io_addr + USBCMD);		spin_unlock_irq(&uhci->lock);		msleep(20);		spin_lock_irq(&uhci->lock);		if (uhci->dead)			return;		/* End Global Resume and wait for EOP to be sent */		outw(USBCMD_CF, uhci->io_addr + USBCMD);		mb();		udelay(4);		if (inw(uhci->io_addr + USBCMD) & USBCMD_FGR)			dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n");	}	start_rh(uhci);	/* Restart root hub polling */	mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);}static irqreturn_t uhci_irq(struct usb_hcd *hcd){	struct uhci_hcd *uhci = hcd_to_uhci(hcd);	unsigned short status;	unsigned long flags;	/*	 * Read the interrupt status, and write it back to clear the	 * interrupt cause.  Contrary to the UHCI specification, the	 * "HC Halted" status bit is persistent: it is RO, not R/WC.	 */	status = inw(uhci->io_addr + USBSTS);	if (!(status & ~USBSTS_HCH))	/* shared interrupt, not mine */		return IRQ_NONE;	outw(status, uhci->io_addr + USBSTS);		/* Clear it */	if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) {		if (status & USBSTS_HSE)			dev_err(uhci_dev(uhci), "host system error, "					"PCI problems?\n");		if (status & USBSTS_HCPE)			dev_err(uhci_dev(uhci), "host controller process "					"error, something bad happened!\n");		if (status & USBSTS_HCH) {			spin_lock_irqsave(&uhci->lock, flags);			if (uhci->rh_state >= UHCI_RH_RUNNING) {				dev_err(uhci_dev(uhci),					"host controller halted, "					"very bad!\n");				if (debug > 1 && errbuf) {					/* Print the schedule for debugging */					uhci_sprint_schedule(uhci,							errbuf, ERRBUF_LEN);					lprintk(errbuf);				}				uhci_hc_died(uhci);				/* Force a callback in case there are				 * pending unlinks */				mod_timer(&hcd->rh_timer, jiffies);			}			spin_unlock_irqrestore(&uhci->lock, flags);		}	}	if (status & USBSTS_RD)		usb_hcd_poll_rh_status(hcd);	else {		spin_lock_irqsave(&uhci->lock, flags);		uhci_scan_schedule(uhci);		spin_unlock_irqrestore(&uhci->lock, flags);	}	return IRQ_HANDLED;}/* * Store the current frame number in uhci->frame_number if the controller * is runnning.  Expand from 11 bits (of which we use only 10) to a * full-sized integer. * * Like many other parts of the driver, this code relies on being polled * more than once per second as long as the controller is running. */static void uhci_get_current_frame_number(struct uhci_hcd *uhci){	if (!uhci->is_stopped) {		unsigned delta;		delta = (inw(uhci->io_addr + USBFRNUM) - uhci->frame_number) &				(UHCI_NUMFRAMES - 1);		uhci->frame_number += delta;	}}/* * De-allocate all resources */static void release_uhci(struct uhci_hcd *uhci){	int i;	if (DEBUG_CONFIGURED) {		spin_lock_irq(&uhci->lock);		uhci->is_initialized = 0;		spin_unlock_irq(&uhci->lock);		debugfs_remove(uhci->dentry);	}	for (i = 0; i < UHCI_NUM_SKELQH; i++)		uhci_free_qh(uhci, uhci->skelqh[i]);	uhci_free_td(uhci, uhci->term_td);	dma_pool_destroy(uhci->qh_pool);	dma_pool_destroy(uhci->td_pool);	kfree(uhci->frame_cpu);	dma_free_coherent(uhci_dev(uhci),			UHCI_NUMFRAMES * sizeof(*uhci->frame),			uhci->frame, uhci->frame_dma_handle);}static int uhci_init(struct usb_hcd *hcd){	struct uhci_hcd *uhci = hcd_to_uhci(hcd);	unsigned io_size = (unsigned) hcd->rsrc_len;	int port;