?? dwc_otg_attr.c
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/* ========================================================================== * $File: //dwh/usb_iip/dev/software/otg_ipmate/linux/drivers/dwc_otg_attr.c $ * $Revision: 1.1 $ * $Date: 2008/03/31 00:20:10 $ * $Change: 993572 $ * * Synopsys HS OTG Linux Software Driver and documentation (hereinafter, * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless * otherwise expressly agreed to in writing between Synopsys and you. * * The Software IS NOT an item of Licensed Software or Licensed Product under * any End User Software License Agreement or Agreement for Licensed Product * with Synopsys or any supplement thereto. You are permitted to use and * redistribute this Software in source and binary forms, with or without * modification, provided that redistributions of source code must retain this * notice. You may not view, use, disclose, copy or distribute this file or * any information contained herein except pursuant to this license grant from * Synopsys. If you do not agree with this notice, including the disclaimer * below, then you are not authorized to use the Software. * * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. * ========================================================================== *//** @file * * The diagnostic interface will provide access to the controller for * bringing up the hardware and testing. The Linux driver attributes * feature will be used to provide the Linux Diagnostic * Interface. These attributes are accessed through sysfs. *//** @page "Linux Module Attributes" * * The Linux module attributes feature is used to provide the Linux * Diagnostic Interface. These attributes are accessed through sysfs. * The diagnostic interface will provide access to the controller for * bringing up the hardware and testing. The following table shows the attributes. <table> <tr> <td><b> Name</b></td> <td><b> Description</b></td> <td><b> Access</b></td> </tr> <tr> <td> mode </td> <td> Returns the current mode: 0 for device mode, 1 for host mode</td> <td> Read</td> </tr> <tr> <td> hnpcapable </td> <td> Gets or sets the "HNP-capable" bit in the Core USB Configuraton Register. Read returns the current value.</td> <td> Read/Write</td> </tr> <tr> <td> srpcapable </td> <td> Gets or sets the "SRP-capable" bit in the Core USB Configuraton Register. Read returns the current value.</td> <td> Read/Write</td> </tr> <tr> <td> hnp </td> <td> Initiates the Host Negotiation Protocol. Read returns the status.</td> <td> Read/Write</td> </tr> <tr> <td> srp </td> <td> Initiates the Session Request Protocol. Read returns the status.</td> <td> Read/Write</td> </tr> <tr> <td> buspower </td> <td> Gets or sets the Power State of the bus (0 - Off or 1 - On)</td> <td> Read/Write</td> </tr> <tr> <td> bussuspend </td> <td> Suspends the USB bus.</td> <td> Read/Write</td> </tr> <tr> <td> busconnected </td> <td> Gets the connection status of the bus</td> <td> Read</td> </tr> <tr> <td> gotgctl </td> <td> Gets or sets the Core Control Status Register.</td> <td> Read/Write</td> </tr> <tr> <td> gusbcfg </td> <td> Gets or sets the Core USB Configuration Register</td> <td> Read/Write</td> </tr> <tr> <td> grxfsiz </td> <td> Gets or sets the Receive FIFO Size Register</td> <td> Read/Write</td> </tr> <tr> <td> gnptxfsiz </td> <td> Gets or sets the non-periodic Transmit Size Register</td> <td> Read/Write</td> </tr> <tr> <td> gpvndctl </td> <td> Gets or sets the PHY Vendor Control Register</td> <td> Read/Write</td> </tr> <tr> <td> ggpio </td> <td> Gets the value in the lower 16-bits of the General Purpose IO Register or sets the upper 16 bits.</td> <td> Read/Write</td> </tr> <tr> <td> guid </td> <td> Gets or sets the value of the User ID Register</td> <td> Read/Write</td> </tr> <tr> <td> gsnpsid </td> <td> Gets the value of the Synopsys ID Regester</td> <td> Read</td> </tr> <tr> <td> devspeed </td> <td> Gets or sets the device speed setting in the DCFG register</td> <td> Read/Write</td> </tr> <tr> <td> enumspeed </td> <td> Gets the device enumeration Speed.</td> <td> Read</td> </tr> <tr> <td> hptxfsiz </td> <td> Gets the value of the Host Periodic Transmit FIFO</td> <td> Read</td> </tr> <tr> <td> hprt0 </td> <td> Gets or sets the value in the Host Port Control and Status Register</td> <td> Read/Write</td> </tr> <tr> <td> regoffset </td> <td> Sets the register offset for the next Register Access</td> <td> Read/Write</td> </tr> <tr> <td> regvalue </td> <td> Gets or sets the value of the register at the offset in the regoffset attribute.</td> <td> Read/Write</td> </tr> <tr> <td> remote_wakeup </td> <td> On read, shows the status of Remote Wakeup. On write, initiates a remote wakeup of the host. When bit 0 is 1 and Remote Wakeup is enabled, the Remote Wakeup signalling bit in the Device Control Register is set for 1 milli-second.</td> <td> Read/Write</td> </tr> <tr> <td> regdump </td> <td> Dumps the contents of core registers.</td> <td> Read</td> </tr> <tr> <td> spramdump </td> <td> Dumps the contents of core registers.</td> <td> Read</td> </tr> <tr> <td> hcddump </td> <td> Dumps the current HCD state.</td> <td> Read</td> </tr> <tr> <td> hcd_frrem </td> <td> Shows the average value of the Frame Remaining field in the Host Frame Number/Frame Remaining register when an SOF interrupt occurs. This can be used to determine the average interrupt latency. Also shows the average Frame Remaining value for start_transfer and the "a" and "b" sample points. The "a" and "b" sample points may be used during debugging bto determine how long it takes to execute a section of the HCD code.</td> <td> Read</td> </tr> <tr> <td> rd_reg_test </td> <td> Displays the time required to read the GNPTXFSIZ register many times (the output shows the number of times the register is read). <td> Read</td> </tr> <tr> <td> wr_reg_test </td> <td> Displays the time required to write the GNPTXFSIZ register many times (the output shows the number of times the register is written). <td> Read</td> </tr> </table> Example usage: To get the current mode: cat /sys/devices/lm0/mode To power down the USB: echo 0 > /sys/devices/lm0/buspower */#include <linux/kernel.h>#include <linux/module.h>#include <linux/moduleparam.h>#include <linux/init.h>#include <linux/device.h>#include <linux/errno.h>#include <linux/types.h>#include <linux/stat.h> /* permission constants */#include <linux/version.h>#include <asm/sizes.h>#include <asm/io.h>#include <asm/arch/lm.h>#include <asm/sizes.h>#include "linux/dwc_otg_plat.h"#include "dwc_otg_attr.h"#include "dwc_otg_driver.h"#include "dwc_otg_pcd.h"#include "dwc_otg_hcd.h"#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)/* * MACROs for defining sysfs attribute */#define DWC_OTG_DEVICE_ATTR_BITFIELD_SHOW(_otg_attr_name_,_addr_,_mask_,_shift_,_string_) \static ssize_t _otg_attr_name_##_show (struct device *_dev, struct device_attribute *attr, char *buf) \{ \ struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev); \ dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev); \ uint32_t val; \ val = dwc_read_reg32 (_addr_); \ val = (val & (_mask_)) >> _shift_; \ return sprintf (buf, "%s = 0x%x\n", _string_, val); \}#define DWC_OTG_DEVICE_ATTR_BITFIELD_STORE(_otg_attr_name_,_addr_,_mask_,_shift_,_string_) \static ssize_t _otg_attr_name_##_store (struct device *_dev, struct device_attribute *attr, \ const char *buf, size_t count) \{ \ struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev); \ dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev); \ uint32_t set = simple_strtoul(buf, NULL, 16); \ uint32_t clear = set; \ clear = ((~clear) << _shift_) & _mask_; \ set = (set << _shift_) & _mask_; \ dev_dbg(_dev, "Storing Address=0x%08x Set=0x%08x Clear=0x%08x\n", (uint32_t)_addr_, set, clear); \ dwc_modify_reg32(_addr_, clear, set); \ return count; \}/* * MACROs for defining sysfs attribute for 32-bit registers */#define DWC_OTG_DEVICE_ATTR_REG_SHOW(_otg_attr_name_,_addr_,_string_) \static ssize_t _otg_attr_name_##_show (struct device *_dev, struct device_attribute *attr, char *buf) \{ \ struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev); \ dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev); \ uint32_t val; \ val = dwc_read_reg32 (_addr_); \ return sprintf (buf, "%s = 0x%08x\n", _string_, val); \}#define DWC_OTG_DEVICE_ATTR_REG_STORE(_otg_attr_name_,_addr_,_string_) \static ssize_t _otg_attr_name_##_store (struct device *_dev, struct device_attribute *attr, \ const char *buf, size_t count) \{ \ struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev); \ dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev); \ uint32_t val = simple_strtoul(buf, NULL, 16); \ dev_dbg(_dev, "Storing Address=0x%08x Val=0x%08x\n", (uint32_t)_addr_, val); \ dwc_write_reg32(_addr_, val); \ return count; \}#else/* * MACROs for defining sysfs attribute */#define DWC_OTG_DEVICE_ATTR_BITFIELD_SHOW(_otg_attr_name_,_addr_,_mask_,_shift_,_string_) \static ssize_t _otg_attr_name_##_show (struct device *_dev, char *buf) \{ \ dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);\ uint32_t val; \ val = dwc_read_reg32 (_addr_); \ val = (val & (_mask_)) >> _shift_; \ return sprintf (buf, "%s = 0x%x\n", _string_, val); \}#define DWC_OTG_DEVICE_ATTR_BITFIELD_STORE(_otg_attr_name_,_addr_,_mask_,_shift_,_string_) \static ssize_t _otg_attr_name_##_store (struct device *_dev, const char *buf, size_t count) \{ \ dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);\ uint32_t set = simple_strtoul(buf, NULL, 16); \ uint32_t clear = set; \ clear = ((~clear) << _shift_) & _mask_; \ set = (set << _shift_) & _mask_; \ dev_dbg(_dev, "Storing Address=0x%08x Set=0x%08x Clear=0x%08x\n", (uint32_t)_addr_, set, clear); \ dwc_modify_reg32(_addr_, clear, set); \ return count; \}/* * MACROs for defining sysfs attribute for 32-bit registers */#define DWC_OTG_DEVICE_ATTR_REG_SHOW(_otg_attr_name_,_addr_,_string_) \static ssize_t _otg_attr_name_##_show (struct device *_dev, char *buf) \
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