;==============================================================================; Cyan Technology Ltd; Example application software for eCOG;; FILE - irq.asm;  Contains the interrupt vectors and the initial branch to the main code.;; DESCRIPTION;==============================================================================                  MODULE   irq                  .ALL;; Interrupt vectors are sign-extended 24 bit absolute branch addresses.; For example a vector containing H'1234 will start executing at H'1234; and a vector containing H'8765 will start executing at H'ff8765.; All unused interrupts are handled by the default code in minimal_handler.;                  ORG      H'0                  bra      $?cstart_code                  ORG      H'4ex_debug                        DC $minimal_handlerex_tim_wdog_ufl                 DC $minimal_handlerex_adr_err                      DC $address_errorreserved                        DC $minimal_handlerex_tim                          DC $minimal_handlerex_reserved                     DC $minimal_handlerex_usart_a                      DC $minimal_handlerex_usart_b                      DC $minimal_handlerex_uart_a                       DC $usr_ex_handler??ex_uart_b                       DC $minimal_handlerint_tim_tmr_ufl                 DC $minimal_handlerint_tim_cnt1_ufl                DC $timer1_isr??int_tim_cnt2_ufl                DC $timer2_isr??int_tim_cnt1_match              DC $minimal_handlerint_tim_cnt2_match              DC $minimal_handlerint_tim_pwm1_ufl                DC $minimal_handlerint_tim_pwm2_ufl                DC $minimal_handlerint_tim_pwm1_match              DC $minimal_handlerint_tim_pwm2_match              DC $minimal_handlerint_tim_cap_ofl                 DC $minimal_handlerint_tim_cap1                    DC $minimal_handlerint_tim_cap2                    DC $minimal_handlerint_tim_cap3                    DC $minimal_handlerint_tim_cap4                    DC $minimal_handlerint_tim_cap5                    DC $minimal_handlerint_tim_cap6                    DC $minimal_handlerint_tim_ltmr_ufl                DC $minimal_handlerint_reserved1                   DC $minimal_handlerint_reserved2                   DC $minimal_handlerint_reserved3                   DC $minimal_handlerint_reserved4                   DC $minimal_handlerint_reserved5                   DC $minimal_handlerint_reserved6                   DC $minimal_handlerint_reserved7                   DC $minimal_handlerint_reserved8                   DC $minimal_handlerint_usart_a_rx                  DC $minimal_handlerint_usart_a_tx                  DC $minimal_handlerint_usart_b_rx                  DC $minimal_handlerint_usart_b_tx                  DC $minimal_handlerint_sci_tx_done                 DC $minimal_handlerint_sci_tx_err                  DC $minimal_handlerint_sci                         DC $minimal_handlerint_ifr_tx_done                 DC $minimal_handlerint_ifr_rx_done                 DC $minimal_handlerint_ifr_rx_err                  DC $minimal_handlerint_ifr_frame_done              DC $minimal_handlerint_uart_a_tx_rdy               DC $usra_tx_handler??int_uart_a_rx_rdy               DC $usr_rx_handler??int_uart_b_tx_rdy               DC $usrb_tx_handler??int_uart_b_rx_rdy               DC $minimal_handlerint_ehi                         DC $minimal_handlerint_gpio                        DC $minimal_handlerint_adc                         DC $minimal_handler                  ENDMOD