?? abc.mdl
字號:
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
ZoomFactor "100"
Block {
BlockType Inport
Name "I1A"
Position [25, 108, 55, 122]
}
Block {
BlockType Inport
Name "I1B"
Position [25, 243, 55, 257]
Port "2"
}
Block {
BlockType Inport
Name "I1C"
Position [25, 383, 55, 397]
Port "3"
}
Block {
BlockType Integrator
Name "Integrator"
Ports [1, 1]
Position [210, 65, 240, 95]
}
Block {
BlockType Integrator
Name "Integrator1"
Ports [1, 1]
Position [210, 200, 240, 230]
}
Block {
BlockType Integrator
Name "Integrator2"
Ports [1, 1]
Position [210, 340, 240, 370]
}
Block {
BlockType Gain
Name "R1A"
Position [95, 100, 125, 130]
}
Block {
BlockType Gain
Name "R1B"
Position [95, 235, 125, 265]
}
Block {
BlockType Gain
Name "R1C"
Position [95, 375, 125, 405]
}
Block {
BlockType Sum
Name "Sum"
Ports [2, 1]
Position [155, 25, 180, 135]
ShowName off
Inputs "|+-"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
}
Block {
BlockType Sum
Name "Sum1"
Ports [2, 1]
Position [155, 160, 180, 270]
ShowName off
Inputs "|+-"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
}
Block {
BlockType Sum
Name "Sum2"
Ports [2, 1]
Position [155, 300, 180, 410]
ShowName off
Inputs "|+-"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
}
Block {
BlockType Constant
Name "UA"
Position [50, 65, 80, 95]
}
Block {
BlockType Constant
Name "UB"
Position [50, 200, 80, 230]
}
Block {
BlockType Constant
Name "UC"
Position [50, 340, 80, 370]
}
Block {
BlockType Outport
Name "psiA"
Position [280, 73, 310, 87]
}
Block {
BlockType Outport
Name "psiB"
Position [280, 208, 310, 222]
Port "2"
}
Block {
BlockType Outport
Name "psiC"
Position [280, 348, 310, 362]
Port "3"
}
Line {
SrcBlock "I1A"
SrcPort 1
DstBlock "R1A"
DstPort 1
}
Line {
SrcBlock "UA"
SrcPort 1
DstBlock "Sum"
DstPort 1
}
Line {
SrcBlock "R1A"
SrcPort 1
DstBlock "Sum"
DstPort 2
}
Line {
SrcBlock "Sum"
SrcPort 1
DstBlock "Integrator"
DstPort 1
}
Line {
SrcBlock "Integrator"
SrcPort 1
DstBlock "psiA"
DstPort 1
}
Line {
SrcBlock "I1B"
SrcPort 1
DstBlock "R1B"
DstPort 1
}
Line {
SrcBlock "UB"
SrcPort 1
DstBlock "Sum1"
DstPort 1
}
Line {
SrcBlock "R1B"
SrcPort 1
DstBlock "Sum1"
DstPort 2
}
Line {
SrcBlock "Sum1"
SrcPort 1
DstBlock "Integrator1"
DstPort 1
}
Line {
SrcBlock "Integrator1"
SrcPort 1
DstBlock "psiB"
DstPort 1
}
Line {
SrcBlock "I1C"
SrcPort 1
DstBlock "R1C"
DstPort 1
}
Line {
SrcBlock "UC"
SrcPort 1
DstBlock "Sum2"
DstPort 1
}
Line {
SrcBlock "R1C"
SrcPort 1
DstBlock "Sum2"
DstPort 2
}
Line {
SrcBlock "Sum2"
SrcPort 1
DstBlock "Integrator2"
DstPort 1
}
Line {
SrcBlock "Integrator2"
SrcPort 1
DstBlock "psiC"
DstPort 1
}
}
}
Block {
BlockType Outport
Name "psiA"
Position [840, 208, 870, 222]
}
Block {
BlockType Outport
Name "psiB"
Position [840, 243, 870, 257]
Port "2"
}
Block {
BlockType Outport
Name "psiC"
Position [840, 278, 870, 292]
Port "3"
}
Block {
BlockType Outport
Name "psia"
Position [830, 413, 860, 427]
Port "4"
}
Block {
BlockType Outport
Name "psib"
Position [830, 448, 860, 462]
Port "5"
}
Block {
BlockType Outport
Name "psic"
Position [830, 483, 860, 497]
Port "6"
}
Block {
BlockType Outport
Name "psiA1"
Position [205, 238, 235, 252]
Port "7"
}
Block {
BlockType Outport
Name "psiB1"
Position [400, 243, 430, 257]
Port "8"
}
Block {
BlockType Outport
Name "psiC1"
Position [595, 243, 625, 257]
Port "9"
}
Block {
BlockType Outport
Name "psia1"
Position [205, 468, 235, 482]
Port "10"
}
Block {
BlockType Outport
Name "psib1"
Position [400, 473, 430, 487]
Port "11"
}
Block {
BlockType Outport
Name "psic1"
Position [595, 473, 625, 487]
Port "12"
}
Line {
SrcBlock "Stator-U"
SrcPort 1
DstBlock "psiA"
DstPort 1
}
Line {
SrcBlock "I1A"
SrcPort 1
DstBlock "Stator-U"
DstPort 1
}
Line {
SrcBlock "Stator-U"
SrcPort 2
DstBlock "psiB"
DstPort 1
}
Line {
SrcBlock "I1B"
SrcPort 1
DstBlock "Stator-U"
DstPort 2
}
Line {
SrcBlock "Stator-U"
SrcPort 3
DstBlock "psiC"
DstPort 1
}
Line {
SrcBlock "I1C"
SrcPort 1
DstBlock "Stator-U"
DstPort 3
}
Line {
SrcBlock "Rotor-U\n"
SrcPort 1
DstBlock "psia"
DstPort 1
}
Line {
SrcBlock "I2a"
SrcPort 1
DstBlock "Rotor-U\n"
DstPort 1
}
Line {
SrcBlock "Rotor-U\n"
SrcPort 2
DstBlock "psib"
DstPort 1
}
Line {
SrcBlock "I2b"
SrcPort 1
DstBlock "Rotor-U\n"
DstPort 2
}
Line {
SrcBlock "Rotor-U\n"
SrcPort 3
DstBlock "psic"
DstPort 1
}
Line {
SrcBlock "I2c"
SrcPort 1
DstBlock "Rotor-U\n"
DstPort 3
}
Line {
SrcBlock "IA"
SrcPort 1
DstBlock "PSIA"
DstPort 1
}
Line {
SrcBlock "IB"
SrcPort 1
DstBlock "PSIA"
DstPort 2
}
Line {
SrcBlock "IC"
SrcPort 1
DstBlock "PSIA"
DstPort 3
}
Line {
SrcBlock "PSIA"
SrcPort 1
DstBlock "psiA1"
DstPort 1
}
Line {
SrcBlock "Ia"
SrcPort 1
DstBlock "PSIA"
DstPort 4
}
Line {
SrcBlock "Ib"
SrcPort 1
DstBlock "PSIA"
DstPort 5
}
Line {
SrcBlock "Ic"
SrcPort 1
DstBlock "PSIA"
DstPort 6
}
Line {
SrcBlock "IA1"
SrcPort 1
DstBlock "PSIB"
DstPort 1
}
Line {
SrcBlock "IB1"
SrcPort 1
DstBlock "PSIB"
DstPort 2
}
Line {
SrcBlock "IC1"
SrcPort 1
DstBlock "PSIB"
DstPort 3
}
Line {
SrcBlock "PSIB"
SrcPort 1
DstBlock "psiB1"
DstPort 1
}
Line {
SrcBlock "Ia1"
SrcPort 1
DstBlock "PSIB"
DstPort 4
}
Line {
SrcBlock "Ib1"
SrcPort 1
DstBlock "PSIB"
DstPort 5
}
Line {
SrcBlock "Ic1"
SrcPort 1
DstBlock "PSIB"
DstPort 6
}
Line {
SrcBlock "IA2"
SrcPort 1
DstBlock "PSIC"
DstPort 1
}
Line {
SrcBlock "IB2"
SrcPort 1
DstBlock "PSIC"
DstPort 2
}
Line {
SrcBlock "IC2"
SrcPort 1
DstBlock "PSIC"
DstPort 3
}
Line {
SrcBlock "PSIC"
SrcPort 1
DstBlock "psiC1"
DstPort 1
}
Line {
SrcBlock "Ia2"
SrcPort 1
DstBlock "PSIC"
}
Line {
SrcBlock "Ib2"
SrcPort 1
DstBlock "PSIC"
DstPort 5
}
Line {
SrcBlock "Ic2"
SrcPort 1
DstBlock "PSIC"
DstPort 6
}
Line {
SrcBlock "IA3"
SrcPort 1
DstBlock "PSIa"
DstPort 1
}
Line {
SrcBlock "IB3"
SrcPort 1
DstBlock "PSIa"
DstPort 2
}
Line {
SrcBlock "IC3"
SrcPort 1
DstBlock "PSIa"
DstPort 3
}
Line {
SrcBlock "PSIa"
SrcPort 1
DstBlock "psia1"
DstPort 1
}
Line {
SrcBlock "Ia3"
SrcPort 1
DstBlock "PSIa"
DstPort 4
}
Line {
SrcBlock "Ib3"
SrcPort 1
DstBlock "PSIa"
DstPort 5
}
Line {
SrcBlock "Ic3"
SrcPort 1
DstBlock "PSIa"
DstPort 6
}
Line {
SrcBlock "IA4"
SrcPort 1
DstBlock "PSIb"
DstPort 1
}
Line {
SrcBlock "IB4"
SrcPort 1
DstBlock "PSIb"
DstPort 2
}
Line {
SrcBlock "IC4"
SrcPort 1
DstBlock "PSIb"
DstPort 3
}
Line {
SrcBlock "PSIb"
SrcPort 1
DstBlock "psib1"
DstPort 1
}
Line {
SrcBlock "Ia4"
SrcPort 1
DstBlock "PSIb"
DstPort 4
}
Line {
SrcBlock "Ib4"
SrcPort 1
DstBlock "PSIb"
DstPort 5
}
Line {
SrcBlock "Ic4"
SrcPort 1
DstBlock "PSIb"
DstPort 6
}
Line {
SrcPort 1
DstBlock "PSIc"
DstPort 1
}
Line {
SrcBlock "IB5"
SrcPort 1
DstBlock "PSIc"
DstPort 2
}
Line {
SrcBlock "IC5"
SrcPort 1
DstBlock "PSIc"
DstPort 3
}
Line {
SrcBlock "PSIc"
SrcPort 1
DstBlock "psic1"
DstPort 1
}
Line {
SrcBlock "Ia5"
SrcPort 1
DstBlock "PSIc"
DstPort 4
}
Line {
SrcBlock "Ib5"
SrcPort 1
DstBlock "PSIc"
DstPort 5
}
Line {
SrcBlock "Ic5"
SrcPort 1
DstBlock "PSIc"
DstPort 6
}
}
}
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