## For a description of the syntax of this configuration file,# see Documentation/kbuild/config-language.txt.## Additional changes:#  (c) Copyright 2001-2002 - S3C4530 by Arcturus Networks Inc.#  (c) Copyright 2002-2003 - S3C2500 by Arcturus Networks Inc.#mainmenu_name "Linux Kernel Configuration"define_bool CONFIG_ARM ydefine_bool CONFIG_SBUS ndefine_bool CONFIG_UID16 ydefine_bool CONFIG_RWSEM_GENERIC_SPINLOCK y# Begin uclinux additions -----------------------------------------------------define_bool CONFIG_UCLINUX ydefine_bool MAGIC_ROM_PTR y# End uclinux additions -------------------------------------------------------#------------------------------------------------------------------------------#                         C o d e    m a t u r i t y#------------------------------------------------------------------------------mainmenu_option next_commentcomment 'Code maturity level options'bool 'Prompt for development and/or incomplete code/drivers' CONFIG_EXPERIMENTALbool 'Prompt for obsolete code/drivers' CONFIG_OBSOLETEendmenu#------------------------------------------------------------------------------#                      L o a d a b l e    M o d u l e#------------------------------------------------------------------------------mainmenu_option next_commentcomment 'Loadable module support'bool 'Enable loadable module support' CONFIG_MODULESif [ "$CONFIG_MODULES" = "y" ]; then   bool '  Set version information on all module symbols' CONFIG_MODVERSIONS   bool '  Kernel module loader' CONFIG_KMODfiendmenu#------------------------------------------------------------------------------#                               S y s t e m#------------------------------------------------------------------------------mainmenu_option next_commentcomment 'System Type'choice 'ARM system type' \	 "TI-DSC21		CONFIG_ARCH_DSC21 \	  TI-C5471		CONFIG_ARCH_C5471 \	  Conexant		CONFIG_ARCH_CNXT \	  NET+ARM		CONFIG_ARCH_NETARM \	  Triscend-A7S		CONFIG_ARCH_TA7S \	  Triscend-A7V		CONFIG_ARCH_TA7V \	  SWARM			CONFIG_ARCH_SWARM \	  Samsung		CONFIG_ARCH_SAMSUNG \	  Atmel			CONFIG_ARCH_ATMEL" TI-DSC21if [ "$CONFIG_ARCH_TA7V" = "y" ]; then   choice ' Triscend A7V Derivative' \   	" A7VL		CONFIG_ARCH_TA7VL \	  A7VE 		CONFIG_ARCH_TA7VE \	  A7VC 		CONFIG_ARCH_TA7VC \	  A7VT		CONFIG_ARCH_TA7VT" A7VTfiif [ "$CONFIG_ARCH_TA7S" != "y" -a "$CONFIG_ARCH_TA7V" != "y" ]; then   bool 'Generate big endian code' CONFIG_CPU_BIG_ENDIANfiif [ "$CONFIG_ARCH_CNXT" = "y" ]; then   choice ' Conexant/Mindspeed architecture' \   	" P52xxCtrl		CONFIG_ARCH_P52 \	  sp_CN9414 		CONFIG_ARCH_SPIPE \	  CX821xxCtrl		CONFIG_ARCH_CX821XX" CX821xxCtrl    if [ "$CONFIG_ARCH_P52" = "y" ]; then      choice ' P52xx board implementation' \	" IAD_EVM		CONFIG_IAD_EVM \	  JSCHornet		CONFIG_HORNET" IAD_EVM   fi   if [ "$CONFIG_ARCH_CX821XX" = "y" ] ; then      choice ' Board Support Package' \        " HASBANI		CONFIG_BD_HASBANI \	  HUMBER		CONFIG_BD_HUMBER \	  GOLDENGATE		CONFIG_BD_GOLDENGATE \	  MACKINAC		CONFIG_BD_MACKINAC \	  RUSHMORE		CONFIG_BD_RUSHMORE" MACKINAC      if [ "$CONFIG_BD_HASBANI" = "y" ]; then         define_bool CONFIG_CHIP_P52 y      fi      if [ "$CONFIG_BD_GOLDENGATE" = "y" -o "$CONFIG_BD_HUMBER" = "y" ]; then         define_bool CONFIG_CHIP_CX82100 y      fi      if [ "$CONFIG_BD_MACKINAC" = "y" ]; then         define_bool CONFIG_CHIP_CX82110 y      fi      if [ "$CONFIG_BD_RUSHMORE" = "y" ]; then         define_bool CONFIG_CHIP_CX82110 y      fi   fifiif [ "$CONFIG_ARCH_NETARM" = "y" ]; then   choice ' NET+ARM Processor type' \   	" NET+15	CONFIG_NETARM_NET15 \   	  NET+40	CONFIG_NETARM_NET40 \   	  NET+50	CONFIG_NETARM_NET50 \	  NS7520	CONFIG_NETARM_NS7520" NET+40   if [ "$CONFIG_NETARM_NS7520" = "y" ]; then      bool '  Forth-Systeme UNC20 Board Support ' CONFIG_BOARD_UNC20      if [ "$CONFIG_BOARD_UNC20" = "y" ]; then         bool '   UNC20 Evaluation baseboard support ' CONFIG_BOARD_UNC20_BAS0      fi   fi	bool '  NET+Lx bootloader output on second serial port ' CONFIG_NETARM_BOOTLOADER_SECOND_SERIAL	bool '  NET+Lx bootloader debug output on ' CONFIG_NETARM_BOOTLOADER_DEBUG_OUTPUT	bool '  NET+Lx bootloader debugger support ' CONFIG_NETARM_BOOTLOADER_DEBUG_DEBUGGER	bool '  NET+Lx bootloader memory ramp test ' CONFIG_NETARM_BOOTLOADER_DEBUG_RAMPTESTfiif [ "$CONFIG_ARCH_TA7S" = "y" ]; then  choice 'Triscend development board' \    "A7DB		CONFIG_BOARD_A7DB \     DevA7		CONFIG_BOARD_DevA7" DevA7fiif [ "$CONFIG_ARCH_TA7V" = "y" ]; then  choice 'Triscend development board' \    "A7VxDB		CONFIG_BOARD_A7VXDB \     TA7VT05_RevA	CONFIG_BOARD_TA7VT05_RevA" A7VxDBfiif [ "$CONFIG_ARCH_TA7S" = "y" -o "$CONFIG_ARCH_TA7V" = "y" ]; then  bool 'Include A7HAL drivers' CONFIG_USE_A7HAL  bool 'System clock comes from external oscillator' CONFIG_USE_OSC  if [ "$CONFIG_USE_OSC" = "y" ]; then      int 'Oscillator frequency (Hz)' CONFIG_OSC_FREQ 25000000  fifibool 'Set flash/sdram size and base addr' CONFIG_SET_MEM_PARAMif [ "$CONFIG_SET_MEM_PARAM" = "y" ]; then   hex '(S)DRAM Base Address' DRAM_BASE 0x00800000   hex '(S)DRAM Size ' DRAM_SIZE 0x00800000   hex 'FLASH Base Address ' FLASH_MEM_BASE 0x00400000   hex 'FLASH Size ' FLASH_SIZE 0x00400000fiif [ "$CONFIG_ARCH_TA7S" != "y" -a "$CONFIG_ARCH_TA7V" != "y" ]; thenchoice 'Kernel executes from' \   " RAM	CONFIG_RAMKERNEL \     ROM	CONFIG_ROMKERNEL" ROMfi# ARM940Tif [ "$CONFIG_ARCH_CNXT" = "y" ]; then   define_bool CONFIG_CPU_32 y   define_bool CONFIG_CPU_26 n   define_bool CONFIG_CPU_ARM940T y   define_bool CONFIG_NO_PGT_CACHE y   define_bool CONFIG_CPU_WITH_CACHE y   define_bool CONFIG_CPU_WITH_MCR_INSTRUCTION y   if [ "$CONFIG_SET_MEM_PARAM" = "n" ]; then      define_hex DRAM_BASE 0x00800000      define_hex DRAM_SIZE 0x00800000      define_hex FLASH_MEM_BASE 0x00400000      define_hex FLASH_SIZE 0x00400000   fi   bool '  ARM940T CPU idle' CONFIG_CPU_ARM940_CPU_IDLE   bool '  ARM940T I-Cache on' CONFIG_CPU_ARM940_I_CACHE_ON   bool '  ARM940T D-Cache on' CONFIG_CPU_ARM940_D_CACHE_ON   if [ "$CONFIG_CPU_ARM940_D_CACHE_ON" = "y" ] ; then      bool '  Force write through caches on ARM940T' CONFIG_CPU_ARM940_WRITETHROUGH   fifiif [ "$CONFIG_ARCH_DSC21" = "y" ]; then   define_bool CONFIG_CPU_ARM710 y   define_bool CONFIG_CPU_32 y   define_bool CONFIG_CPU_26 n   define_bool CONFIG_NO_PGT_CACHE y   define_bool CONFIG_CPU_WITH_CACHE y   define_bool CONFIG_CPU_WITH_MCR_INSTRUCTION y   if [ "$CONFIG_SET_MEM_PARAM" = "n" ]; then      define_hex DRAM_BASE 0x08000000      define_hex DRAM_SIZE 0x00200000      define_hex FLASH_MEM_BASE 0x08400000      define_hex FLASH_SIZE 0x00200000   fi   define_bool CONFIG_DUMMY_CONSOLE yfiif [ "$CONFIG_ARCH_C5471" = "y" ]; then   define_bool CONFIG_CPU_ARM710 y   define_bool CONFIG_CPU_ARM7TDMI y   define_bool CONFIG_CPU_32 y   define_bool CONFIG_CPU_32v4 y   define_bool CONFIG_CPU_26 n   define_bool CONFIG_NO_PGT_CACHE y   define_bool CONFIG_CPU_WITH_CACHE y   define_bool CONFIG_CPU_WITH_MCR_INSTRUCTION n   if [ "$CONFIG_SET_MEM_PARAM" = "n" ]; then      define_hex DRAM_BASE 0x10000000      define_hex DRAM_SIZE 0x01000000      define_hex FLASH_MEM_BASE 0x00000000      define_hex FLASH_SIZE 0x00800000   fi   define_bool CONFIG_DUMMY_CONSOLE yfiif [ "$CONFIG_ARCH_SWARM" = "y" ]; then#  define_bool CONFIG_CPU_ARM610 y   define_bool CONFIG_CPU_32 y   define_bool CONFIG_CPU_26 n   define_bool CONFIG_CPU_32v3 y   define_bool CONFIG_CPU_ARM7V3 y   define_bool CONFIG_NO_PGT_CACHE y   define_bool CONFIG_CPU_WITH_MCR_INSTRUCTION y   define_hex FLASH_MEM_BASE 0x00000000   define_hex FLASH_SIZE 0x00100000fiif [ "$CONFIG_ARCH_ATMEL" = "y" ]; then   define_bool CONFIG_NO_PGT_CACHE y   define_bool CONFIG_CPU_ARM710 y   define_bool CONFIG_CPU_32 y   define_bool CONFIG_CPU_32v4 y   define_bool CONFIG_CPU_WITH_CACHE n   define_bool CONFIG_CPU_WITH_MCR_INSTRUCTION n   define_bool CONFIG_SERIAL_ATMEL y     int  'CPU clock frequency' CONFIG_ARM_CLK 40000000    bool 'Serial Console' CONFIG_SERIAL_ATMEL_CONSOLE   if [ "$CONFIG_SET_MEM_PARAM" = "n" ]; then      define_hex DRAM_BASE 0x01000000      define_hex DRAM_SIZE 0x00600000      define_hex FLASH_MEM_BASE 0x01600000      define_hex FLASH_SIZE 0x00200000   fi	   hex 'Memory mapped 16-bit io base' CONFIG_MEM16_BASE 0x03000000   hex 'Memory mapped 8-bit io base' CONFIG_MEM8_BASE 0x03000000   hex '16-bit io base' CONFIG_IO16_BASE 0x02000000   hex '8-bit io base' CONFIG_IO8_BASE 0x02000000	   choice ' Atmel CPU' \   	" AT91x40		CONFIG_CPU_AT91X40 \	  AT91x63 		CONFIG_CPU_AT91X63" AT91x40   bool 'Atmel Kernel-Debug hack' CONFIG_ATMEL_DEBUG   if [ "$CONFIG_ATMEL_DEBUG" = "y" ]; then      hex 'Debug buffer address' AT91_DEBUG_BASE 0x01400000   fifiif [ "$CONFIG_ARCH_NETARM" = "y" ]; then   define_bool CONFIG_CPU_ARM710 y   define_bool CONFIG_CPU_ARM7TDMI y   define_bool CONFIG_CPU_32 y   define_bool CONFIG_CPU_26 n   if [ "$CONFIG_NETARM_NS7520" = "y" ]; then      define_bool CONFIG_CPU_WITH_CACHE n      define_bool CONFIG_NETARM_PLL_BYPASS y      if [ "$CONFIG_BOARD_UNC20_BAS0" = "y" ]; then         define_bool CONFIG_CMDLINE_BOOL y         define_bool CONFIG_NETARM_BOOTLOADER_SECOND_SERIAL y         define_string CONFIG_CMDLINE "console=ttyS1"      fi   else      define_bool CONFIG_CPU_WITH_CACHE y   fi   define_bool CONFIG_CPU_WITH_MCR_INSTRUCTION n   define_bool CONFIG_NO_PGT_CACHE y      if [ "$CONFIG_NETARM_NET40" = "y" ]; then      bool 'NET+ARM NET+40 Rev2' CONFIG_NETARM_NET40_REV2      if [ "$CONFIG_NETARM_NET40_REV2" = "n" ]; then         bool 'NET+ARM NET+40 Rev4' CONFIG_NETARM_NET40_REV4      fi      bool 'NET+ARM PLL Bypass Patch' CONFIG_NETARM_PLL_BYPASS      bool 'NET+ARM EMLIN Board' CONFIG_NETARM_EMLIN   fi#  default memory configuration for Net40 and EMLIN boards   if [ "$CONFIG_SET_MEM_PARAM" = "n" ]; then      if [ "$CONFIG_NETARM_NS7520" = "y" ]; then	 # This should work for the UNC20, at least         define_hex DRAM_BASE 0x00000000         define_hex FLASH_MEM_BASE 0x01000000         define_hex DRAM_SIZE 0x00800000         define_hex FLASH_SIZE 0x00400000      else         define_hex DRAM_BASE 0x00000000         define_hex FLASH_MEM_BASE 0x10000000         if [ "$CONFIG_NETARM_EMLIN" = "y" ]; then            define_hex DRAM_SIZE 0x01000000            define_hex FLASH_SIZE 0x00200000         else            define_hex DRAM_SIZE 0x02000000            define_hex FLASH_SIZE 0x00800000            define_bool CONFIG_NETARM_EEPROM y         fi      fi   fifiif [ "$CONFIG_ARCH_SAMSUNG" = "y" ]; then   choice 'Board Implementation' \      " S3C3410-SMDK40100	CONFIG_BOARD_SMDK40100 \        S3C44B0X-MBA44  	CONFIG_BOARD_MBA44 \        S3C4530-HEI		CONFIG_BOARD_EVS3C4530HEI \        S3C2500-REF-RGP		CONFIG_BOARD_S3C2500REFRGP \        SMDK2500		CONFIG_BOARD_SMDK2500 \        S3C4510-SNDS100		CONFIG_BOARD_SNDS100" S3C4510-SNDS100fiif [ "$CONFIG_BOARD_SMDK40100" = "y" ]; then    define_string CONFIG_CPU_NAME "S3C3410X"    define_bool CONFIG_CPU_S3C3410          y    define_bool CONFIG_CPU_ARM710           y    define_bool CONFIG_CPU_32v4             y    define_bool CONFIG_CPU_32               y    define_bool CONFIG_CPU_26               n    define_bool CONFIG_NO_PGT_CACHE         y    define_bool CONFIG_CPU_WITH_CACHE       y    define_bool CONFIG_CPU_WITH_MCR_INSTRUCTION n    define_int  CONFIG_ARM_CLK              40000000    define_bool CONFIG_SERIAL_S3C3410       y    define_int  CONFIG_FORCE_MAX_ZONEORDER  5    if [ "$CONFIG_SET_MEM_PARAM" = "n" ]; then       define_hex DRAM_BASE      0x00000000       define_hex DRAM_SIZE      0x00800000       define_hex FLASH_MEM_BASE 0x01000000       define_hex FLASH_SIZE     0x00200000    fifiif [ "$CONFIG_BOARD_MBA44" = "y" ]; then    define_string CONFIG_SPU_NAME "S3C44B0X"    define_bool CONFIG_CPU_S3C44B0X         y    define_bool CONFIG_CPU_ARM710           y    define_bool CONFIG_CPU_32v4             y    define_bool CONFIG_CPU_32               y    define_bool CONFIG_CPU_26               n    define_bool CONFIG_NO_PGT_CACHE         y    define_bool CONFIG_CPU_WITH_CACHE       y    define_bool CONFIG_CPU_WITH_MCR_INSTRUCTION n    define_int  CONFIG_ARM_CLK              60000000    define_bool CONFIG_SERIAL_S3C44B0X      y    define_int  CONFIG_FORCE_MAX_ZONEORDER  5    if [ "$CONFIG_SET_MEM_PARAM" = "n" ]; then       define_hex DRAM_BASE      0x00000000       define_hex DRAM_SIZE      0x00800000       define_hex FLASH_MEM_BASE 0x01000000       define_hex FLASH_SIZE     0x00200000    fifiif [ "$CONFIG_BOARD_EVS3C4530HEI" = "y" ]; then