/* blkmem.c: Block access to memory spaces * * Copyright (C) 2001  SnapGear Inc. <davidm@snapgear.com> * Copyright (C) 2000  Lineo, Inc.  (www.lineo.com)    * Copyright (C) 1997, 1998  D. Jeff Dionne <jeff@lineo.ca>, *                           Kenneth Albanowski <kjahds@kjahds.com>, * Copyright (C) 1999-2003   Greg Ungerer <gerg@snapgear.com> * * Based z2ram - Amiga pseudo-driver to access 16bit-RAM in ZorroII space * Copyright (C) 1994 by Ingo Wilken (Ingo.Wilken@informatik.uni-oldenburg.de) * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose and without fee is hereby granted, provided * that the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation.  This software is provided "as is" without express or * implied warranty. * * NOV/2000 -- hacked for Linux kernel 2.2 and NETtel/x86 (gerg@snapgear.com) * VZ Support/Fixes             Evan Stawnyczy <e@lineo.ca> */#include <linux/module.h>#include <linux/config.h>#include <linux/major.h>#include <linux/slab.h>#include <linux/reboot.h>#include <linux/ledman.h>#include <linux/init.h>#include <linux/devfs_fs_kernel.h>#include <linux/tqueue.h>#include <asm/semaphore.h>#include <asm/uaccess.h>#include <asm/io.h>#undef VERBOSE#undef DEBUG#define TRUE                  (1)#define FALSE                 (0)#define	BLKMEM_MAJOR	31#define MAJOR_NR BLKMEM_MAJOR#if defined(CONFIG_ARCH_CX821XX)#define	FIXED_ROMARRAY	0x500000#elif defined(CONFIG_ARCH_CNXT)#define	CONFIG_FLASH_SNAPGEAR	1#define DEVEL  1 /* everything in SDRAM for now */#endif// #define DEVICE_NAME "blkmem"#define DEVICE_REQUEST do_blkmem_request#define DEVICE_NR(device) (MINOR(device))#define DEVICE_ON(device)#define DEVICE_OFF(device)#define DEVICE_NO_RANDOM#define TIMEOUT_VALUE (6 * HZ)#include <linux/blkmem.h>#include <linux/blk.h>#ifdef CONFIG_LEDMAN#include <linux/ledman.h>#endif#include <asm/bitops.h>#include <asm/delay.h>#include <asm/semaphore.h>/* *	Timeout loop counter for FLASH operations. * * On the flash part on the M5272C3, it can take up to 60 seconds for a write * in a non-ideal environment.  The counter above wasn't enough even in an * ideal one. */#define	FTIMEOUT	990000000/* * Please, configure the ROMFS for your system here *//* Samsung S3C4510-SNDS100 arch */#ifdef CONFIG_BOARD_SNDS100extern char romfs_data[];extern char romfs_data_end[];#endif/* v850e; this config stuff is ugly, ugly, ugly! */#ifdef CONFIG_V850E#include <asm/blkmem.h>#endif#ifdef CONFIG_MICROBLAZE#include <asm/blkmem.h>#endif#if defined(CONFIG_ARCH_TA7S) || defined(CONFIG_ARCH_TA7V)#include <asm/arch/blkmem.h>#endif/* (es) *//* note: this is configured somewhere in arch/m68knommu/kernel/setup.c *//* does it need to be here? */#if defined( CONFIG_M68328 ) || defined ( CONFIG_M68EZ328 ) || defined( CONFIG_M68VZ328)#include <asm/shglports.h>#define CAT_ROMARRAY#endif/* (/es) */#if defined( CONFIG_PILOT ) && defined( CONFIG_M68EZ328 )extern char _flashstart[];#define FIXED_ROMARRAY _flashstart#endif/* (es) */#if defined(CONFIG_UCSIMM) || defined(CONFIG_UCDIMM) || defined (CONFIG_DRAGEN2) || defined (CONFIG_CWEZ328) || defined (CONFIG_CWVZ328)#define CAT_ROMARRAY#endif/* (/es) */#ifdef CONFIG_M68EZ328ADS#ifdef CONFIG_M68EZ328ADS_RAMextern char _flashstart[];#define FIXED_ROMARRAY _flashstart#else#define CAT_ROMARRAY#endif #endif #ifdef CONFIG_ARCH_TRIO#define FIXED_ROMARRAY (char*)(3512*1024)#endif#ifdef CONFIG_EXCALIBURextern char _romfs_start[];#define FIXED_ROMARRAY _romfs_start#endif#ifdef CONFIG_ALMA_ANS#ifdef CONFIG_ALMA_ANS_RAMextern char _flashstart[];#define FIXED_ROMARRAY _flashstart#else#define CAT_ROMARRAY#endif #endif #ifdef CONFIG_COLDFIRE#ifdef CONFIG_TELOS#define CAT_ROMARRAY#elseunsigned char *romarray;extern char _ebss;#ifndef CONFIG_ROMFS_FROM_ROM  #define FIXUP_ARENAS 	arena[0].address = (unsigned long) &_ebss;#else  #define FIXUP_ARENAS	{ \		register char *sp = (char *) arena[4].address; \		register char *ep = sp + arena[4].length; \		if (strncmp((char *) &_ebss, "-rom1fs-", 8) == 0) { \			sp = (char *) &_ebss; \		} else { \			while (sp < ep && strncmp(sp, "-rom1fs-", 8)) \				sp++; \			if (sp >= ep) \				sp = &_ebss; \		} \		arena[0].address = (unsigned long) sp; \	}#endif /* CONFIG_ROMFS_FROM_ROM *//* *  Stub out the LED functions for now. */#define SET_ALARM_LED(x)#define GET_COMM_STATUS_LED(x)#define SET_COMM_STATUS_LED(x)#define SET_COMM_ERROR_LED(x)#endif /* CONFIG_TELOS */#endif /* CONFIG_COLDFIRE */#if defined(CONFIG_ARCH_DSC21) || defined(CONFIG_ARCH_ATMEL)#define FIXED_ROMARRAY (char *)(FLASH_MEM_BASE)#endif#if defined( CONFIG_M68360 )#define CAT_ROMARRAY#endif/* *	Lineo hardware has similar FLASH layouts on all devices. */#if defined(CONFIG_NETtel) ||	\    defined(CONFIG_eLIA) ||	\    defined(CONFIG_DISKtel) ||	\    defined(CONFIG_SECUREEDGEMP3) || \    defined(CONFIG_SE1100) || \    defined(CONFIG_GILBARCONAP)#define	CONFIG_FLASH_SNAPGEAR	1#endif#if defined(CONFIG_CPU_H8300H) || defined(CONFIG_CPU_H8S)#if defined(CONFIG_INTELFLASH)  #define CONFIG_FLASH_SNAPGEAR	1  extern char _ebss;  #define FIXUP_ARENAS 	arena[0].address = ((unsigned long) &_ebss) + 512;#elseextern char _blkimg[];#define FIXED_ROMARRAY _blkimg#endif#endif#if defined(CONFIG_BOARD_SMDK40100)extern char __romfs_start[];#define FIXED_ROMARRAY __romfs_start#endif/******* END OF BOARD-SPECIFIC CONFIGURATION ************//* Simple romfs, at internal, cat on the end of kernel, or seperate fixed adderess romfs. */#ifdef INTERNAL_ROMARRAY#include "romdisk.c"#endif#ifdef CAT_ROMARRAYunsigned char *romarray;extern char __data_rom_start[];extern char _edata[];extern char __data_start[];#ifndef FIXUP_ARENAS#define FIXUP_ARENAS \	arena[0].address = (unsigned long)__data_rom_start + (unsigned long)_edata - (unsigned long)__data_start;#endif#endif#if defined(CONFIG_WATCHDOG)extern void watchdog_disable(void);extern void watchdog_enable(void);#endif#ifdef FIXED_ROMARRAYunsigned char *romarray = (char *)(FIXED_ROMARRAY);#endif/* If defined, ROOT_ARENA causes the root device to be the specified arena, useful with romfs *//* Now defining ROOT_DEV in arch/setup.c *//*#define ROOT_ARENA 0*/struct arena_t;typedef void (*xfer_func_t)(struct arena_t *, unsigned long address, unsigned long length, char * buffer);typedef void (*erase_func_t)(struct arena_t *, unsigned long address);typedef void (*program_func_t)(struct arena_t *, struct blkmem_program_t * prog);#ifndef CONFIG_COLDFIREvoid program_main(struct arena_t *, struct blkmem_program_t *);void read_spare(struct arena_t *, unsigned long, unsigned long, char *);void write_spare(struct arena_t *, unsigned long, unsigned long, char *);void erase_spare(struct arena_t *, unsigned long);#endif#if defined(CONFIG_ARNEWSH) || defined(CONFIG_M5206eC3)void flash_amd8_pair_write(struct arena_t *, unsigned long, unsigned long, char *);void flash_amd8_pair_erase(struct arena_t *, unsigned long);#endif#if defined(CONFIG_M5272C3) || defined(CONFIG_COBRA5272) /* *	M5272C3 evaluation board with 16bit AMD FLASH. *	(The COBRA5272 has the same flash) */static void flash_amd16_writeall(struct arena_t *, struct blkmem_program_t *);static void flash_amd16_write(struct arena_t *, unsigned long, unsigned long, char *);static void flash_amd16_erase(struct arena_t *, unsigned long);#define	flash_erase	flash_amd16_erase#define	flash_write	flash_amd16_write#define	flash_writeall	flash_amd16_writeall#endif#if defined(CONFIG_FLASH_SNAPGEAR)#if defined(CONFIG_INTELFLASH)/* *	Lineo hardware with INTEL FLASH. */static void flash_intel_writeall(struct arena_t *, struct blkmem_program_t *);static void flash_intel_write(struct arena_t *, unsigned long, unsigned long, char *);static void flash_intel_erase(struct arena_t *, unsigned long);#define	flash_erase	flash_intel_erase#define	flash_write	flash_intel_write#define	flash_writeall	flash_intel_writeall#else#ifdef CONFIG_FLASH8BIT/* *	Lineo hardware with 8bit AMD FLASH. */static void flash_amd8_writeall(struct arena_t *, struct blkmem_program_t *);static void flash_amd8_write(struct arena_t *, unsigned long, unsigned long, char *);static void flash_amd8_erase(struct arena_t *, unsigned long);#define	flash_erase	flash_amd8_erase#define	flash_write	flash_amd8_write#define	flash_writeall	flash_amd8_writeall#else/* *	Lineo hardware with 16bit AMD FLASH (this is the default). */static void flash_amd16_writeall(struct arena_t *, struct blkmem_program_t *);static void flash_amd16_write(struct arena_t *, unsigned long, unsigned long, char *);static void flash_amd16_erase(struct arena_t *, unsigned long);#define	flash_erase	flash_amd16_erase#define	flash_write	flash_amd16_write#define	flash_writeall	flash_amd16_writeall#endif /* !COFNIG_FLASH8BIT */#endif /* !CONFIG_INTELFLASH */#endif /* CONFIG_FLASH_SNAPGEAR */#if defined(CONFIG_HW_FEITH)/* *	Feith hardware with 16bit AMD FLASH (this is the default). */static void flash_amd16_writeall(struct arena_t *, struct blkmem_program_t *);static void flash_amd16_write(struct arena_t *, unsigned long, unsigned long, char *);static void flash_amd16_erase(struct arena_t *, unsigned long);#define	flash_erase	flash_amd16_erase#define	flash_write	flash_amd16_write#define	flash_writeall	flash_amd16_writeall#endif#ifdef CONFIG_BLACKFINextern char ramdisk_begin;extern char ramdisk_end;#define	FIXUP_ARENAS	arena[0].length=&ramdisk_end - &ramdisk_begin;#endif/* This array of structures defines the actual set of memory arenas, including   access functions (if the memory isn't part of the main address space) */struct arena_t {	int rw;	unsigned long address; /* Address of memory arena */	unsigned long length;  /* Length of memory arena. If -1, try to get size from romfs header */	program_func_t program_func; /* Function to program in one go */	xfer_func_t read_func; /* Function to transfer data to main memory, or zero if none needed */	xfer_func_t write_func; /* Function to transfer data from main memory, zero if none needed */	erase_func_t erase_func; /* Function to erase a block of memory to zeros, or 0 if N/A */	unsigned long blksize; /* Size of block that can be erased at one time, or 0 if N/A */	unsigned long unitsize;	unsigned char erasevalue; /* Contents of sectors when erased */		/*unsigned int auto_erase_bits;	unsigned int did_erase_bits;*/	} arena[] = {#ifdef CONFIG_BLACKFIN	{0, &ramdisk_begin, 0},#endif#ifdef INTERNAL_ROMARRAY	{0, (unsigned long)romarray, sizeof(romarray)},#endif#ifdef CAT_ROMARRAY	{0, 0, -1},#endif#ifdef FIXED_ROMARRAY	{0, (unsigned long) FIXED_ROMARRAY, -1},#endif#ifdef CONFIG_BOARD_SNDS100	{0, romfs_data, -1},#endif#if defined(CONFIG_ARCH_CNXT) && !defined(CONFIG_ARCH_CX821XX)    /*  AM29LV004T flash     *  rom0 -- root file-system     */#ifdef DEVEL	/*	 * rom0 currently  in RAM	 */	{1, 0x800000, 0x100000,0,0, flash_write, flash_erase, 0x10000, 0x10000, 0xff},#else		{1, 0x400000, 0x10000,0,0, flash_write, flash_erase, 0x10000, 0x10000, 0xff},	{1, 0x410000, 0xf0000,0,0, flash_write, flash_erase, 0x10000, 0x10000, 0xff},	{1, 0x500000,0x100000,0,0, flash_write, flash_erase, 0x10000,0x10000,0xff},	{1, 0x600000,0x200000,0,0, flash_write, flash_erase,0x10000,0x10000,0xff},	{1, 0x801000,0xff000,0,0, flash_write,flash_erase,0xff000,0xff000,0xff},#endif#endif /* CONFIG_ARCH_CNXT*/#if (defined(CONFIG_CPU_H8300H) || defined(CONFIG_CPU_H8S)) && \		defined(CONFIG_INTELFLASH)    {0, 0, -1}, /* In RAM romfs */    {1,0x00000000,0x020000,0,0,flash_write,flash_erase,0x20000,0x20000,0xff},    {1,0x00020000,0x020000,0,0,flash_write,flash_erase,0x20000,0x20000,0xff},    {1,0x00040000,0x3c0000,0,0,flash_write,flash_erase,0x20000,0x20000,0xff},    {1,0x00000000,0x400000,0,0,flash_write,flash_erase,0x20000,0x20000,0xff},#endif#ifdef CONFIG_COLDFIRE    /*     *	The ROM file-system is RAM resident on the ColdFire eval boards.     *	This arena is defined for access to it.     */    {0, 0, -1},#ifdef CONFIG_ARN5206    /*     *	The spare FLASH segment on the Arnewsh 5206 board.     */    {1,0xffe20000,0x20000,0,0,flash_amd8_pair_write,flash_amd8_pair_erase,0x8000,0x20000,0xff},#endif#if defined(CONFIG_ARN5307) || defined(CONFIG_M5206eC3)    /*  pair of AM29LV004T flash for 1Mbyte total     *  rom0 -- root file-system (actually in RAM)     *  rom1 -- FLASH SA0   128K boot     *  rom2 -- FLASH SA1-6 768k kernel & romfs     *  rom3 -- FLASH SA7   64k spare     *  rom4 -- FLASH SA8   16k spare     *  rom5 -- FLASH SA9   16k spare     *  rom6 -- FLASH SA10  32k spare     */    {1,0xffe00000,0x20000,0,0,flash_amd8_pair_write,flash_amd8_pair_erase,0x20000,0x20000,0xff},    {1,0xffe20000,0xc0000,0,0,flash_amd8_pair_write,flash_amd8_pair_erase,0x20000,0xc0000,0xff},    {1,0xffee0000,0x10000,0,0,flash_amd8_pair_write,flash_amd8_pair_erase,0x10000,0x10000,0xff},    {1,0xffef0000,0x4000,0,0,flash_amd8_pair_write,flash_amd8_pair_erase,0x4000,0x4000,0xff},    {1,0xffef4000,0x4000,0,0,flash_amd8_pair_write,flash_amd8_pair_erase,0x4000,0x4000,0xff},    {1,0xffef8000,0x8000,0,0,flash_amd8_pair_write,flash_amd8_pair_erase,0x8000,0x8000,0xff},#endif /* CONFIG_ARNEWSH || CONFING_M5206eC3 */#if defined(CONFIG_M5272C3) || defined(CONFIG_COBRA5272)/* *	Motorola M5272C3 evaluation board with 2MB FLASH. *	The following devices are supported: *		rom0 -- root file-system (actually in RAM) *		rom1 -- FLASH boot block (256k) *		rom2 -- FLASH low boot chunks (32k total) *		rom3 -- FLASH high large boot area hunk (224k) *		rom4 -- FLASH kernel+file-system binary (1792k) *		rom5 -- FLASH config file-system (top 1024k) *		rom6 -- FLASH the whole thing (2MB)! * * (The COBRA5272 board has the same flash layout) */    {1,0xffe00000,0x040000,flash_writeall, 0, 0, 0,    0x40000,0x040000,0xff},    {1,0xffe00000,0x008000,flash_writeall, 0, 0, 0,    0x08000,0x008000,0xff},    {1,0xffe08000,0x038000,0,0,flash_write,flash_erase,0x38000,0x038000,0xff},    {1,0xffe40000,0x1c0000,0,0,flash_write,flash_erase,0x40000,0x1c0000,0xff},    {1,0xfff00000,0x100000,0,0,flash_write,flash_erase,0x40000,0x100000,0xff},    {1,0xffe00000,0x200000,flash_writeall, 0, 0, 0,    0x40000,0x200000,0xff},#endif#if defined(CONFIG_SE1100)/* SE1100 hardware has a slightly different layout to the standard